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DLD Lec 2

The document discusses various topics related to digital logic design including fractional numbers in binary and octal number systems, binary arithmetic operations like addition, subtraction, multiplication and division, signed number representations using signed magnitude and complement methods, and registers for storing numbers. It provides examples and rules for performing binary arithmetic and converting between decimal, binary, and octal number systems. It also explains how signed numbers are represented using the signed magnitude and complement methods in fixed-width registers.

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Amir Qayyum
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0% found this document useful (0 votes)
11 views32 pages

DLD Lec 2

The document discusses various topics related to digital logic design including fractional numbers in binary and octal number systems, binary arithmetic operations like addition, subtraction, multiplication and division, signed number representations using signed magnitude and complement methods, and registers for storing numbers. It provides examples and rules for performing binary arithmetic and converting between decimal, binary, and octal number systems. It also explains how signed numbers are represented using the signed magnitude and complement methods in fixed-width registers.

Uploaded by

Amir Qayyum
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Digital Logic Design

By: Fahim Shahzad


Fractional Numbers
Fractional numbers in binary numbers
Fractional numbers in octal numbers
Fractional decimal to binary
Fractional decimal to octal
Binary Arithmetic
Binary Addition

Rule for binary addition is as follows:

0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
 1 + 1 = 0 plus a carry of 1 to next higher
column
Binary Addition (Example)
Binary Addition (Example 2)
Binary Subtraction

Rule for binary subtraction is as follows:

0 - 0 = 0
 0 - 1 = 1 with a borrow from the next column
1 - 0 = 1
1 - 1 = 0
Binary Subtraction (Example)
Binary Multiplication

Table for binary multiplication is as follows:

0 x 0 = 0
0 x 1 = 0
1 x 0 = 0
1 x 1 = 1
Binary Multiplication (Example)
Binary Division

Table for binary division is as follows:


0 ÷ 0 = Divide by zero error
0 ÷ 1 = 0
1 ÷ 0 = Divide by zero error
1 ÷ 1 = 1
As in the decimal number system (or in any other
number system), division by zero is meaningless.
The computer deals with this problem by raising
an error condition called ‘Divide by zero’ error.
Binary Division
Complements
Two complement methods have generally been used.
1. The diminished radix complement method {(R-1)’s
Complement }, and
2. The radix complement method (R’s Complement).
R-1’s Complement
R-1’s Complement (Example)
R-1’s Complement (Example 2)
R-1’s Complement of a binary number
Registers
Digital computers store numbers in special digital electronic
devices called Registers.
Registers consist of a fixed number n of storage elements.
Each storage element is capable of storing one bit of data
(either 0 or 1}.
The register size is the number of storage bits in this register.
Register size is typically a power of 2, e.g. 8, 16, 32, 64, etc.
An n-bit register can store one of 2n Distinct Values.
Numbers stored in registers may be either unsigned or signed
numbers.
For example, 13 is an unsigned number but +13 and –13 are
signed numbers.
Unsigned number representation
Unsigned number representation
A register of n-bits, can store any unsigned number that has n-
bits or less.
Typically, the rightmost bit of the register is designated to be
the least significant bit (LSB), while the leftmost bit is
designated to be the most significant bit (MSB).
When representing an integer number , this n-bit register can
hold values from 0 up to (2n – 1).
Unsigned number representation
Example:
Show how the value (13)10 (or D in Hexadecimal) is stored in
a 4-bit register and in an 8-bit register.
Signed number representation
The n-bits of the register holding an unsigned number need
only represent the value (magnitude) of the number.
No sign information needs to be represented in this case.
In the case of a signed number, the n-bits of the register
should represent both the magnitude of the number and its
sign as well.
Two major techniques are used to represent signed numbers:
1. Signed Magnitude Representation
2. Complement method
Signed number representation
Signed number representation
Signed number representation
Signed number representation
Signed magnitude method has Two representations for
0.{+0 , -0}.
Harder to implement addition/subtraction.
The sign and magnitude parts have to be processed
independently.
Sign bits of the operands have to be examined to
determine the actual operation (addition or subtraction).
Separate circuits are required to perform the addition
and subtraction operations.
Multiplication & division are less problematic.
Complement representation
Positive numbers (+N) are represented in exactly the same
way as in signed magnitude system.
Negative numbers (-N) are represented by the complement
of N (N’).
The Complement of the Complement of some number N is
the original number N.
N’ =M-N
( N’ )’ = M- (M-N) = N
This is a required property to match the negation process
since a number negated twice must yield the original
number {- (-N) = N}.
Thank you.

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