The Data Link Layer

Error Control
Dr. Ajay Singh Raghuvanshi
Electronics & Communication
Engineering, NIT, Raipur
Error Detection and Correction
 Two basic strategies to deal with errors:
1. Include enough redundant information to enable the
receiver to deduce what the transmitted data must
have been.
Error correcting codes.
2. Include only enough redundancy to allow the receiver
to deduce that an error has occurred (but not which
error).
Error detecting codes.
Error Detection & Correction Code

1. Hamming codes (Block Code).

2. Binary convolutional codes.
3. Reed-Solomon codes.
4. Low-Density Parity Check codes.

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Error Detection & Correction Code
 For all m number of message bits 2m possible data messages
are legal, but due to the presence of r check bits, n = m + r all 2n
possible code words are used.
 Only small fraction of 2m/2n=1/2r are possible will be legal code
words.
 The error-detecting and error-correcting codes of the block code
depend on minimum Hamming distance d.
 To reliably detect x error, one would need a Hamming distance of
d= x+1 code or .
 To correct x errors, one would need a Hamming distance of d=
2x+1 code.
 Hamming Code(n, m)
 Codeword: n bits b1 b2 b3 b4 ….
 Check bits: The bits that are powers of 2 (p1, p2, p4,
p8, p16, …).
 The rest of bits (m3, m5, m6, m7, m9, …) are filled
with m data bits.
 Example of the Hamming code with n = 7 total code
length in bits and m = 4 number of message bits is
given in the next slide.
 The Hamming Code
Consider a message having four data bits (D) which is to be
transmitted as a 7-bit codeword by adding three error control bits.
This would be called a (7,4) code. The three bits to be added are
three EVEN Parity bits (P), where the parity of each is computed on
different subsets of the message bits as shown below.
7 6 5 4 3 2 1

D D D P D P P 7-BIT CODEWORD

D - D - D - P (EVEN PARITY)

D D - - D P - (EVEN PARITY)

D D D P - - - (EVEN PARITY)
 Hamming Code
 Why Those Bits? - The three parity bits (1,2,4) are related to the data
bits (3,5,6,7) as shown at right. In this diagram, each overlapping circle
corresponds to one parity bit and defines the four bits contributing to
that parity computation. For example, data bit 3 contributes to parity
bits 1 and 2. Each circle (parity bit) encompasses a total of four bits,
and each circle must have EVEN parity. Given four data bits, the three
parity bits can easily be chosen to ensure this condition.
 It can be observed that changing any one bit numbered 1..7 uniquely
affects the three parity bits. Changing bit 7 affects all three parity bits,
while an error in bit 6 affects only parity bits 2 and 4, and an error in a
parity bit affects only that bit. The location of any single bit error is
determined directly upon checking the three parity circles.
Hamming Code
Hamming Code
 For example, the message 1101 would be sent
as
7 6 5 4 3 2 1

1 1 0 0 1 1 0 7-BIT CODEWORD
1 - 0 - 1 - 0 (EVEN PARITY)
1 1 - - 1 1 - (EVEN PARITY)
1 1 0 0 - - - (EVEN PARITY)

message 1101 would be sent as1100110

Hamming Code
 It may now be observed that if an error occurs in any of the seven
bits, that error will affect different combinations of the three parity
bits depending on the bit position.

 For example, suppose the above message 1100110 is sent and a

single bit error occurs such that the code word 1110110 is received:
transmitted message received message
1100110 ------------> 1110110
BIT: 7 6 5 4 3 2 1 BIT: 7 6 5 4 3 2 1

The above error (in bit 5) can be corrected by examining which of the
three parity bits was affected by the bad bit:
 transmitted message received message
1 1 0 0 1 1 0 ------------> 1110110
BIT: 7 6 5 4 3 2 1 BIT: 7 6 5 4 3 2 1

7 6 5 4 3 2 1
1 1 1 0 1 1 0 7-BIT CODEWORD
1 - 1 - 1 - 0 (EVEN PARITY) NOT! 1
1 1 - - 1 1 - (EVEN PARITY) OK! 0
1 1 1 0 - - - (EVEN PARITY) NOT! 1
In fact, the bad parity bits labeled 101 point directly to the bad bit since 101 binary equals 5. Examination
of the 'parity circles' confirms that any single bit error could be corrected in this way.
The value of the Hamming code can be summarized:
1. Detection of 2 bit errors (assuming no correction is attempted);
2. Correction of single bit errors;
3. Cost of 3 bits added to a 4-bit message.
The ability to correct single bit errors comes at a cost which is less than sending the entire message twice.
(Recall that simply sending a message twice accomplishes no error correction.)
Practically Error-Detecting Codes
 Cost of re-transmission over a network link is
much smaller than computational complexity
needed to implement error correction.
 Hence in practical data networks Error
detection is employed with retransmission.

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Error-Detecting Codes
Linear, systematic block codes
1. Parity.
2. Checksums.
3. Cyclic Redundancy Checks (CRCs).
4. Interleaving

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 Parity
Parity is the simplest form of error checking. It adds one bit to the pattern
and then requires that the modulo-2 sum of all the bits of the pattern and
the parity bit have a defined answer. The answer is 0 for even parity and 1
for odd parity
Vertical Redundancy Check (VRC)
Append a single bit at the end of data block such that the number
of ones is even
 Even Parity (odd parity is similar)
0110011  01100110
0110001  01100011
VRC is also known as Parity Check
Performance:
Detects all odd-number errors in a data block
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 Parity Check Algorithm

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 Longitudinal Redundancy Check
 Longitudinal Redundancy Check (LRC)
 Organize data into a table and create a parity for each column

11100111 11011101 00111001 10101001

11100111
11011101
00111001
10101001
10101010

11100111 11011101 00111001 10101001 10101010

Original Data LRC

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Dr.Ajay Singh Raghuvanshi
Two-dimension Parity Check
Performance can be improved by using two-dimensional parity check, which organizes the block
of bits in the form of a table. Parity check bits are calculated for each row, which is equivalent to a
simple parity check bit. Parity check bits are also calculated for all columns then both are sent
along with the data. At the receiving end these are compared with the parity bits calculated on the
received data

Interleaving of parity bits to

detect a burst error.

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 Checksum
In checksum error detection scheme, the data is divided into k
segments each of m bits. In the sender’s end the segments are added
using 1’s complement arithmetic to get the sum. The sum is
complemented to get the checksum. The checksum segment is sent
along with the data segments
Like LRC, but it uses one’s complement arithmetic
Performance
The checksum detects all errors involving an odd number of
bits. It also detects most errors involving even number of
bits
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 At Receiver
At Sender End
End

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 Cyclic Redundancy Checks (CRC)
This Cyclic Redundancy Check is the most powerful and
easy to implement technique. Unlike checksum scheme,
which is based on addition, CRC is based on binary division.
In CRC, a sequence of redundant bits, called cyclic
redundancy check bits, are appended to the end of data unit
so that the resulting data unit becomes exactly divisible by a
second, pre-determined binary number. At the destination, the
incoming data unit is divided by the same number. If at this
step there is no remainder, the data unit is assumed to be
correct and is therefore accepted
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Generator Polynomial
 Let us assume k message bits and
n bits of redundancy xxxxxxxxxx yyyy Block of length k+n

k bits n bits

 Associate bits with coefficients of a polynomial

1 0 1 1 0 1 1
1x6+0x5+1x4+1x3+0x2+1x+1
P(x) = x6+x4+x3+x+1

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Theory of CRC
 Sending
1. Multiply M(x) by xn
2. Divide xnM(x) by P(x)
3. Ignore the quotient and keep the reminder C(x)
4. Form and send F(x) = xnM(x)+C(x)
 Receiving
1. Receive F’(x)
2. Divide F’(x) by P(x)
3. Accept if remainder is 0, reject otherwise

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Proof of CRC Generation

Note: Binary modular

addition is equivalent to
binary modular subtraction
Remainder 0 Remainder 0  C(x)+C(x)=0

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Some Standard CRC Generator Polynomials
CRC12 = x12+x11+x3+x2+x+1

CRC16 = X16 + X15 + X2 + 1

CRCCCITT = X16 + X12 + X5 + 1

CRC32 = X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10

+ X8 + X7 + X5 + X 4 + X 2 + 1
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Performance
CRC is a very effective error detection technique. If the divisor is
chosen according to the previously mentioned rules, its performance
can be summarized as follows:
CRC can detect all single-bit errors
CRC can detect all double-bit errors (three 1’s)
CRC can detect any odd number of errors (X+1)
CRC can detect all burst errors of less than the degree of the
polynomial.
CRC detects most of the larger burst errors with a high probability.
For example, CRC-12 detects 99.97% of errors with a length 12 or
more.

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