Digital Switching Techniques
Digital Switching Techniques
Department of
Electronics and Communication Engineering
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Introduction
• A switching system is called digital when the input to and
output from the switching system can directly support
digital signal
• The functions of the digital switching network is to
connect pairs of channels
– So that information arriving at the switching center in a
particular channel on one PCM multiplex system can be passed
to some other channel on an outgoing PCM multiplex systems
• To achieve this switching, two processes referred to as
time switching and space switching are used
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Introduction Cont’d…
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Digital Signals & Digitization
• A digital signal is a discrete signal which is discretized
against a continuously variable analog signal
• Characteristics of digital signal:
– Holds a fixed value for a specific length of time
– Has sharp, abrupt changes
– A preset number of values allowed
• A digital signal is represented by two voltage levels
known as pulses (ON/OFF). Each pulse gives a binary
digit (bit)
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Digitization
• The process of converting analog signal into digital
signals :- digitization.
• To convert analog signals to digital signals PCM
coding system is used
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Space Division Switching (SDS)
• The paths in the circuit are separated from each other
spatially. i.e. separate physical path
• A cross point switch: it moves a bit stream from one bus to
another
• The cross points can be connected via control signals which
are provided by microprocessor-actuated controllers
• The switching can be in
– Single stage or
– Multistage switching
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Two basic configurations of SDS:
– Rectangular (Two-sided matrix): (N2-N) cross points
– Triangular/Diagonal Switching (One-sided matrix)
• (N2-N)/2 cross points
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Multistage Switching
• Multistage switching allows sharing cross points
by more than one user
• Note: If a particular cross point is shared by
more than one potential connection, then
– The number of cross points decrease & increases
utilization
– Less number of cross points are needed
• More than one route for a connection
• A blocking switching type
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Three stage SDS
• Large switch built from multiple stages of small switches
• The n inputs to a first stage switch share k paths through
intermediate crossbar switches
• Larger k (more intermediate switches) means more paths to
output
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• Total number of cross points:
• Where:
– N = number of inputs-outputs
– n = number of each input-output group
– k = number of intermediate switch
– The first term in the equation represents the number of cross
points in 1st and 3rd stage
– The second term is the number of cross points in the second
stage
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Non-Blocking Condition
• How many intermediate switches are required to make switch
non-blocking?
– Request connection from last input to input switch j to last output in
output switch m
– Worst case: All other inputs have seized top (n-1) middle switches
AND all other outputs have seized next (n-1) middle switches.
If k = 2n-1, there is
another path left to
connect desired input
to desired output.
=> #(Internal links =
2 x #(External links)
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Minimum Complexity
The number of cross points for non-blocking switch (substituting for
k = 2n-1 into eq(1)):
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• If p (the probability that an inlet is busy) is known, the
probability that an inter stage link is busy is given by:
Where
• There are β = k/n times as many interstage links as there are
inlets and outlets
• β is the factor by which the percentage of interstage links that
are busy is reduced. If β is less than 1, then the first stage is
concentrating the incoming traffic.
• The blocking probability of a three-stage switch in terms of
the inlet utilization p:
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Time Division Switching (TDS)
• TDS permits sharing of x-points for a short period of time
• Time slot interchanging (TSI) involves moving data contained in
each time slot from the incoming bit stream to an outgoing bit stream
but with different time slot arrangement in accordance with the
destination of each time slot.
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TDS Cont’d…
• Consider a T-Switch with N-inlets and N-outlets as shown below.
• Assuming time slots TS1 and TS2 are entering inlet 1, time slots TS21 and TS22
are entering inlet 2 and so on, the TSI, which is a memory reassignment system,
reassigns different time slots to different outlets via controller commands.
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TDS Cont’d…
• T-switch has three basic functional blocks:
– Memory for speech: store the incoming bit streams. It has as many
cells as there are time slots.
– Memory for control: controls the readout of the speech memory.
– Time-slot counter or processor: controls the writing of incoming
time slots into speech memory.
• There are two choices in handling the time-switch:
– Sequential write, random read
• The time slots are written into the speech memory as they appear in the
incoming bit stream
– Random write, sequential read
• The incoming time slots are written into memory in the order of
appearance in the outgoing bit stream
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TSI Time Switch T: Sequential write, Random read
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TSI, time switch T: Random write, Sequential read
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Combination of T and S
• To support a large number of simultaneous
connections, a combination of time and space
switches are configured
• Combination of time and space switches can appear
in any order or in time switches only.
• We use the letter T to designate a time switching
stage and use S to designate a space-switching stage.
– E.g. TST switch is Time-Space-Time switching
– STS switch: Space-Time-Space Switching
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Time-Space-Time (TST) Switch
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TST Switch Cont’d
• The space array is sandwiched between set of TSI
switches
• First T-stage interchanges time-slots in time domain
between external incoming digital channels and the
subsequent space stage
• Space-stage provides connectivity between the time
stages at the input and output. i.e. it acts as a
multiplier of call-handling capacity.
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• Space switch connects time slots in a spatial
configuration.
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TST Cont’d…
• Space-stage time slots need not have any relation to
either external incoming or outgoing time-slots
regarding numbering or position.
– For instance, incoming time slot 4 can be connected to
outgoing time slot 19 via space network time slot 8.
• Blocking probability can be minimized if number of
space-stage, time slots is large.
– A TST switch is non-blocking if
l = 2c − 1
– Where l is the number of space-stage time slots and c is the
number of external TDM time slots.
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TST Switch design
• For N = 960
– Single stage space switch ~ 1 million cross points
– T-S-T
• Let n = 120, N/n = 8 TSIs
• k = 2n – 1 = 239 for non-blocking
• Pick k = 240 time slots
• Need 8x8 time-multiplexed space switch
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TST Cont’d…
• Replace n input x k output space switch by TSI switch that
takes n-slot input frame and switches it to k-slot output frame
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Flow of time slots between switches
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STS switching structure
• Establishing a path through an STS switch requires finding a time
switch array with an available write access during the incoming time
slot and an available read access during the desired outgoing time slot.
• The input side space stage as well as the output side space stage is free
to utilize any free time switch modules.
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Example
• Suppose that an incoming time slot 5 on port No.1
must be connected to an output slot 12 at outgoing
port 4. This can be accomplished by time-slot
interchanger No.1 which would switch it to time slot
12; then the outgoing space stage would place that on
outgoing trunk No.4. Alternatively, time slot 5 could
be placed at the input of TSI No.4 by the incoming
space switch where it would be switched to time slot
12, hence out port No.4.
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TST Compared to STS
• Both TST and STS switches can be designed with identical
call carrying capacity and blocking probabilities
• The architecture of TST switching is more complex than STS
switching with space concentration
• The TST switch becomes more cost effective because time
expansion can be achieved at less cost than space expansion
• TST switches have a distinct advantage of implementation
over STS switches when a large amount of traffic must be
handled.
• For small switches STS is favored due to reduced
implementation complexities.
• Generally STS implementations are simpler b/c of simpler
control requirements.
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QUIZ II
• Show a three stage SDS for N=16,n=4,k=8
• Check if it is blocking or non-blocking switch.
• Using block diagrams show the architecture
of TST and STS switches?
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