Digital logic circuits

What is digital logic circuits?

• Digital logic circuit, also known as digital electronics, is a branch of

electronics that performs various tasks to fulfil multiple requirements with
the help of digital signals.
• The logic gates are known for performing logical operations in a faster rate.
Using logic gates, the design helps the circuit to move from one state to
another.
• The input signal used for this circuit is in digital form, which is 0’s and 1’s
binary language format.
• The circuit can be of two forms, either in a combinational way or a
sequential way.
 Combinational logic circuits
• Some salient features:
– The output of a combinational circuit depends entirely on the present input.
– It exhibits a faster speed.
– It is comparatively easier to design.
– No feedback is present between the input and output.
– Logic gates form the basic building blocks of such circuits.
– They don’t hold the capacity of storing any state.
– These circuits do not have a clock – thus, they don’t require triggering.
– They do not possess any memory element.
– Example: Multiplexer, Decoder, Encoder, Demultiplexer etc.
 What is sequential logic circuits?
• Some salient features are:
– The output of a Sequential Circuit depends on both- past as well as present inputs.
– It works at a comparatively slower speed.
– The design of these circuits is comparatively much tougher than the Combinational Circuit.
– A feedback path exists between the output and the input.
– The circuit is time-dependent.
– Flip-flops constitute the building blocks of such a circuit.
– People mainly use them for storing data and information.
– They possess the capability of storing any data state or retaining an earlier state at any given point.
– Because a Sequential circuit depends on a clock, it usually requires triggering.
– They always possess a memory element.
– A user may not be able to handle and use these circuits easily.
– For Example – Counters, Flip-flops, etc.
 Binary addition
• Conceptually, binary addition is quite similar to decimal
addition.
• Let us take a ex. 1010 + 11
Cont.
 Home task
• Add binary numbers 11010 and 1100.
• Add 11011110 with 10101101.
 Half Adder
• Logic device that adds two binary numbers.
• A typical adder circuit produces a sum bit (denoted by S) and a
carry bit (denoted by C) as the output.
 Designing half adder
• Truth Table
• As two outputs such as ‘sum’ and ‘carry’ can be
observed, we will find two expressions.
sum

• So the expression for SUM will be AB’ + A’B

• This is the expression for XOR gate.
Carry

• The expression will be A.B

• It was the expression for AND gate.
implementation
 Full adder
• Full Adder is the adder that adds three inputs and
produces two outputs.
• The first two inputs are A and B and the third input is
an input carry as C-IN.
• The output carry is designated as C-OUT and the
normal output is designated as S which is SUM.
• A full adder logic is designed in such a manner that can
take eight inputs together and cascade the carry bit
from one adder to another.
• we use a full adder because when a carry-in bit is
available, another 1-bit adder must be used since a 1-
bit half-adder does not take a carry-in bit. A 1-bit full
adder adds three operands and generates 2-bit results.
Truth table for full adder
Designing full adder
 Full Adder = 2 Half Adders
Manipulating the Equations:
S= XY Z
C = XY + XZ + YZ
Construction of full adder using half adder’s
 Cont.
• There are two half adder circuits that are combined using the OR gate. The first half
adder has two single-bit binary inputs A and B.
• As we know that, the half adder produces two outputs, i.e., Sum and Carry. The
'Sum' output of the first adder will be the first input of the second half adder, and the
'Carry' output of the first adder will be the second input of the second half adder.
• The second half adder will again provide 'Sum' and 'Carry'.
• The final outcome of the Full adder circuit is the 'Sum' bit. In order to find the final
output of the 'Carry', we provide the 'Carry' output of the first and the second adder
into the OR gate.
• The outcome of the OR gate will be the final carry out of the full adder circuit.
 Full Adder = 2 Half Adders
Manipulating the Equations:
S=(XY)Z
C = XY + XZ + YZ
= XY + XYZ + XY’Z + X’YZ + XYZ
= XY( 1 + Z) + Z(XY’ + X’Y)
= XY + Z(X  Y )
 Full Adder = 2 Half Adders
Manipulating the Equations:
S=(XY)Z
C = XY + XZ + YZ = XY + Z(X  Y )

Think of Z as
a carry in

Src: Mano’s Book

 Home task
• Implement full adder using both universal gates.
Half subtractor