Unit –I

Chapter 3
Transistor

Basic Electronics, 2020-2021, Even Semester

 Contents
Session No. Contents covered

01 BJT, transistor voltages and currents, Signal amplifier (Fixed bias, Collector base bias, Voltage divider
bias, CE configuration)

02 DC load line (Q-point), Voltage, current and power gains

03 Transistor as a switch: NOT Gate, Basic (DTL) NAND gate.

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 Do we have assessment for this chapter?

In the form of Post- Test

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 Topic Learning Outcomes
At the end of the topic, students should be able to:

•1.Discuss on the transistor CE configuration.

•2.Explain significance of DC load line and operating point.
•3.Realize the simple applications using transistor.

CO-2: Describe the characteristics of semiconductor devices and their applications in

rectifiers, switches, regulators and gates.
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 Key concepts
1. Transistor construction and operation
2. Transistor voltages and currents
3. Common emitter input and output characteristics
4. DC Load line & Q Point
5. Transistor biasing
6. Base bias circuit
7. Collector base circuit
8. Voltage divider circuit
9. Transistor as switch: NOT gate and DTL NAND gate
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 Transistor Definition
• Transistor is an electronic device made of three layers of semiconductor
material that can act as insulator and a conductor.

• The three layered transistor is also known as the bipolar junction

transistor.

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 Bipolar Junction Transistors(BJT’s)

• It can be used as amplifier and logic switches.

• BJT consists of three terminals:
 Collector: C
 Base: B
 Emitter: E
• Two types of BJT : npn and pnp

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 Transistor Construction
• 3 layer semiconductor device consists of :
 2 n- and 1 p- type layers of material ->npn transisitor
 2 p- and 1 n- type layers of material ->pnp transisitor
• A single pn junction has two different types of bias:
 Forward bias
 Reverse bias
• Thus, a two-pn-junction device has four types of bias.

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 Position of terminals and symbol of BJT
• Base is located at the middle and
more thin from the level of
collector and emitter.

• The collector and emitter terminals

are made of the same type of
semiconductor material, while the
base of the other type material.

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 Transistor currents
1. The arrow is always drawn
on the emitter
2. The arrow always points
toward the n-type.
3. The arrow indicates the
direction of emitter current:

IC = Collector current
pnp: E->B IB = Base current
npn: B->E IE = Emitter current
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 Transistor Voltages
1. The supply voltage between the
base and the emitter is denoted
by VBE.
2. The supply voltage between the
collector and the base is denoted
by VCB.
3. The collector is biased to a higher
negative level than the base to
keep the collector-base junction
reverse biased.

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 NPN Transistor operation
1. The base-emitter junction is connected in
the forward bias condition by supply
voltage VEE.

2. And the collector-base junction is

connected in the reverse bias condition by
supply voltage VCC.

3. The depletion region of the emitter-base

region is thin compared to the depletion
region of the collector-base junction

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 NPN Transistor operation
4. In N-type emitter, the majority charge carrier is electrons. the current will
start flowing the emitter-base junction. This current is known as emitter current
IE.

5. These electrons move further to the base. The base is a P-type semiconductor.
Therefore, it has holes. But the base region is very thin and lightly doped.

6. So, it has a few holes to recombine with the electrons. Hence, most of the
electrons will pass the base region and few of them will recombine with the
holes.

7. Because of the recombination, the current will flow through the circuit and
this current is known as base current IB.

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 PNP Transistor operation
1. The positive terminal of a voltage source
(VEB) is connected with Emitter (P-type) and
the negative terminal is connected with the
Base terminal (N-type). Therefore, the
Emitter-Base junction is connected in
forward bias.

2. And the positive terminal of a voltage source

(VCB) is connected with the Base terminal
(N-type) and the negative terminal is
connected with the Collector terminal (P-
type). Hence, the Collector-Base junction is
connected in reverse bias.
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 PNP Transistor operation
4. The depletion region at Emitter-Base junction is narrow, because it is
connected in forward bias. While the Collector-Base junction is in reverse bias
and hence the depletion region at Collector-Base junction is wide.

5. The Emitter-base junction is in forward bias. Therefore, a very large number of

holes from emitter cross the depletion region and enter the Base.
Simultaneously, very few electrons enter in Emitter from the base and
recombine with the holes.

6. Because of the movement of holes, the current will flow through the Emitter-
Base junction. This current is known as Emitter current (IE). The holes are
majority charge carriers to flow the Emitter current.

7. The remaining holes which do not recombine with electrons in Base, that
holes will further travel to the Collector. The Collector current (IC) flows through
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the Collector-Base region due to holes.
 αdc and βdc for a transistor
αdc is emitter to collector current gain. It is the ratio of collector to emitter
IC
current i.e., dc 
IE
Where Ic is dc collector current and IE is dc emitter current.

βdc is base to collector current gain. It is the ratio of collector to base current
i.e., IC
dc 
IB
Where IB is dc Base current.
βdc is commonly known as hFE based on h-parameter analysis of transistor.
IC
hFE 
IB
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 Equation for collector current
From figure IE = I C + I B
………………1

IC
By definition
 dc 
IE
………………2

or IC = αdc IE ………………3

From equations 1 & 2

IC  dc ( IC  IB )

Or IC  dcIC  dcIB
dc
Ic  IB
1  dc
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 Relationship between αdc and βdc

dc
dc 
1  dc

βdc in terms of αdc

dc
dc 
1  dc

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 Problem 1
For the circuit shown below find:
a) Values of αdc and βdc of the transistor
b) Value of IB for a desired IC of 5mA

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 Problem 2
Find the values of IC and IE for a transistor with αdc=0.97 and
IB =50A. Find βdc of transistor used.

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 Common-emitter input characteristics

1. The base to emitter voltage varies by adjusting the potentiometer R1. And the
collector to emitter voltage varied by adjusting the potentiometer R2.
2. For the various setting, the current and voltage are taken from the milliammeters
and voltmeter. On the basis of these readings, the input and output curve plotted
on the curve

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 Common-emitter input characteristics
1. The curve plotted between base
current IB and the base-emitter
voltage VEB is called Input
characteristics curve.
2. For drawing the input characteristic
the reading of base currents is taken
through the ammeter on emitter
voltage VBE at constant collector-
emitter current.
3. The base current IB increases with
the increases in the emitter-base
voltage V . 
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 Common-emitter output characteristics
1. The curve draws between collector
current IC and collector-emitter voltage
VCE at a constant base current IB is
called output characteristic. 
2. In the active region, the collector
current increases slightly as collector-
emitter VCE current increases. The slope
of the curve is quite more than the
output characteristic of CB
configuration.
3. When the VCE falls, the IC also
decreases rapidly. The collector-base
junction of the transistor always in
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 DC Load line
1. DC Load line for a transistor circuit is a straight line drawn on
transistor output characteristics.

2. For a common emitter(CE) circuit, the load line is a graph of

collector current(IC) versus collector-emitter voltage (VCE), for a
given value of collector resistance(RC) and a given supply
voltage(VCC).

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 Procedure for drawing DC Load line

The dc supply voltage VCC forward biases base-emitter and reverse biases collector-base
junction.
Apply KVL to base-emitter circuit
VCC=IBRB+VBE
VCC  VBE
IB 
RB
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 Procedure for drawing DC Load line

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 Procedure for drawing DC Load line
To obtain B
When the IC = 0, then VCE is maximum and
will be equal to the VCC.
This gives the maximum value of IC.
This is shown as
VCE=VCC−ICRCVCE=VCC−ICRC
=VCC=VCC
(As IC = 0)
This gives the point B, which means (OB = VCC) on
The collector voltage axis shown in the above figure.

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 Q-Point

1. The dc bias point or Q point also known as dc operating point.

2. It identifies the transistor collector current and collector-emitter
voltage when there is no input signal at base terminal.
3. The intersection of dc load line with output characteristics curve
gives the coordinates of the Q point

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 Transistor biasing
1. Transistor needs to be operated in an appropriate region based on the
application of circuit.

2. When transistor is used as amplifier it must be in active region i.e., base-

emitter is forward biased and collector-base junction is reverse biased.

3. The dc voltages and currents in circuit are established by using resistance

network .

4. This process is called biasing and resistance network is called bias circuit.

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 Transistor biasing
Three biasing circuits

1. Base bias circuit

2. Collector-base bias circuit

3. Voltage divider bias circuit

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 Base bias circuit
Apply KVL to base emitter circuit
VCC=IBRB+VBE

VCC  VBE
IB  ………………………1
RB
As VBE=0.7V for SI and 0.3V for GE VCC>>VBE
Therefore eqn 1 will be
VCC
IB  IC  hFEIB
RB
Apply KVL to collector emitter circuit
VCC = ICRC + VCE
VCE = VCC – ICRC
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 Procedure for design of Base bias circuit
The values of VCC, VCE, VBE, IC and hFE will be given.
The design steps are as follows
1. Calculate RC using the relation
VCC  VCE ………………………1
RC 
IC
2. Then calculate IB using relation
IC
IB 
hFE
3. Finally calculate RB using relation
VCC  VBE
RB 
IB
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 Problem 2
For the base bias circuit shown below, find IB,IC and VCE if
RC=2.2k, RB=470K, VCC=18V, hFE=100, VBE=0.7V. Draw DC load
line and indicate the Q point.

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 Collector-to-base bias circuit
Apply KVL to path VCE, IBRB and VBE
VCE  IBRB  VBE  0 ………………………1

VCE  IBRB  VBE ………………………2

VCE  VBE
IB 
RB
Apply KVL to collector-emitter circuit,

VCC  RC ( IB  IC )  VCE  0
VCE  VCC  RC ( IB  IC ) ………………………3

Substitute VCE from eqn 1 in eqn 3,

IBRB  IBRC  ICRC  VCC  VBE
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 Collector-to-base bias circuit
Using IC=hFEIB
IBRB  IBRC  hFEIBRC  VCC ………………………1
VBE
VCC  VBE
IB  ………………………2
RB  (1  hFE ) RC

Stability of the operating point

If IC increases above design level,

• ICRC increases
• VCE decreases
• IB decreases
• IC=hFEIB decreases
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 Design procedure of Collector-to-base bias circuit
The values of VCC, VCE, VBE, IC and hFE will be given.
The design steps are as follows
1.Calculate IB using the relation
IC
IB 
hFE
2. Then calculate RC using relation
VCC  VCE
RC 
IC  IB

3.Then calculate RC using relation

VCE  VBE
RB 
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 Problem 3
For the collector-to-base bias circuit shown below, Determine the
VCE and IC levels. The circuit has VCC =15V, RC=1.8k, RB=39K,
VBE=0.7V, hFE=50, VBE=0.7V. Draw DC load line and indicate the Q
point.

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 Voltage divider bias circuit(approximate analysis)
Also known as emitter current bias
From fig:
I1=I2+IB
As IB is very small I2>>IB, hence I2 I1
VCC  I 1R1  I 2 R 2
VCC
I2 
R1  R 2

VCCR 2
VB 
R1  R 2R2 is VB=I2R2,
Voltage across

VB  VBE  VE
VE  VB  VBE
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 Voltage divider bias circuit(approximate analysis)
But VE=IERE
VB  VBE VE
IE  
RE RE

IE=IB+ICIC, since base current is small

Apply KVL to collector emitter circuit,

VCC  ICRC  VCE  IERE

Since IE  IC,

VCE  VCC  IC ( RC  RE )

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 Problem 4
A voltage divider bias circuit has VCC=18V, R1=33k, R2=12k, RE=1K, RC=1.2k, hFE=50.
Taking VBE=0.7V, find VE,VCE,IC and VC. Draw the DC load line and locate Q point

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 Transistor as a switch: NOT Gate
1. A NOT gate simply inverts its input. If the
input is HIGH, the output is LOW, and if the
input is LOW, the output is HIGH.
2. The input is connected through resistor R2 to
the transistor’s base.
3. When no voltage is present on the input, the
transistor turns off. When the transistor is off,
no current flows through the collector-emitter
path.
4. Thus, current from the supply voltage (Vcc in
the schematic) flows through resistor R1 to
the output. In this way, the circuit’s output is
HIGH when its input is LOW.

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 DTL NAND Gate
1. When both input A and B are given with 0 V,
both of the diodes are in forward biased
condition that is in ON condition.
2. Supply voltage will get path to the ground
through diode D1 and D2.
3. When both of the inputs are given with +5 V
that is logical 1, both of the diodes are in OFF
condition and hence supply voltage will
appear at the base terminal of the transistor T
which makes it switched ON and supply
voltage gets a path to the ground through this
transistors.

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 References
1. https://www.tutorialspoint.com/amplifiers/methods_of_transist
or_biasing.htm
2. https://www.britannica.com/technology/transistor

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Thank You