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Internship Presentation

The document presents a student's mini project presentation on VLSI SoC design using Verilog HDL. It includes an outline of topics to be covered such as introduction to VLSI, SoC design, ASIC vs FPGA, VLSI design flow, introduction to Verilog, data types and operators in Verilog. The objective of the project is to learn and strengthen knowledge on chip design process and how to design VLSI SoC using Verilog HDL.

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Satyam Singh
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171 views

Internship Presentation

The document presents a student's mini project presentation on VLSI SoC design using Verilog HDL. It includes an outline of topics to be covered such as introduction to VLSI, SoC design, ASIC vs FPGA, VLSI design flow, introduction to Verilog, data types and operators in Verilog. The objective of the project is to learn and strengthen knowledge on chip design process and how to design VLSI SoC using Verilog HDL.

Uploaded by

Satyam Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Mini Project/ Internship Presentation

VLSI SoC Design using Verilog HDL

Name : Lokesh Singh


Roll No: 2100910319004
Mentor :Mr. Rakesh Kumar

DEPARTMENT OF ELECTRONICS AND COMMUNICATION


ENGINEERING
Presentation Outline

1. Objective
2. Certificate of Mini project/ Internship
3. Introduction to VLSI
4. SoC Design
5. ASIC Vs FPGA
6. VLSI design flow
7. Front end design flow
8. Back end design flow
9. Introduction to Verilog
10. Data types in Verilog
11. Verilog Operators
12. Conclusion
Objective

This course explains VLSI


Technology, SoC Architecture
and Design process.
It explains the concept of
hardware description language
and basic concepts like data
types and operators.

The objective is to learn


and strengthen the
knowledge on chip
design process.
We’ve learned how to
design VLSI SoC using
Verilog HDL.
INTRODUCTION TO VLSI
- Very-large-scale integration (VLSI)
is the process of creating an
integrated circuit (IC) by combining
thousands of transistors into a
single chip.

- VLSI began in the 1970s when


complex semiconductor and
communication technologies were
being developed.

- Examples: Microprocessor, RAM,


Microcontroller.

- Before the introduction of VLSI


technology, most ICs had a limited
set of functions they could perform
SoC Design
- SoC refers to the term System on a
Chip. It is a single chip which
integrates a whole electronic or a
system into it.

- A current-day system on a chip


(SoC) consists of several different
components of a system such as
the CPU (a microprocessor or
microcontroller),memory,
input/output (I/O) interface and
wireless blocks, on a single silicon
substrate.

- Most SoC also use various pre-


designed hardware block, called
as IP cores, to improve design time
to market.
ASIC Vs FPGA
ASIC : It is a device that is created for a specific purpose or functionality. They contain
only one functionality in them and through the lifetime of the chip, it can perform only
that function.

FGPA : It is an integrated circuit which can be “field” programmed to work as per the
intended design. It means it can work as a microprocessor, or as an encryption unit, or
graphics card, or even all these three at once.

ASIC – Application Specific FPGA – Field Programmable Gate


Integrated Circuit Array
Low unit cost High unit cost
High development cost Low development cost
Long manufacturing cycle Short manufacturing cycle
Low power dissipation High power dissipation
Small footprint and multiple Large footprint and limited
package options package options
Analog, Digital, and Mixed-Signal Digital with limited Analog IP
technology options blocks
VLSI DESIGN FLOW
Front end design flow

Front end design flow


Back end design flow

Back end design flow


INTRODUCTION TO VERILOG

Verilog HDL is one of the two most common


Hardware Description Languages (HDL) used by
integrated circuit (IC) designers.

Designs described in HDL are technology-


independent, easy to design and debug..

Verilog can be used to describe designs at four levels of abstraction:

1. Algorithmic level

2. Register transfer level

3. Gate level

4. Switch level
DATA TYPES IN VERILOG
VERILOG OPERATORS
Arithmetic Operators : Relational Operators : Bit-wise Operators :
+ (addition) < (less than)
(subtraction) <= (less than or equal to) ~ (bitwise NOT)
* (multiplication) > (greater than) & (bitwise AND)
/ (division) >= (greater than or equal to) | (bitwise OR) ^
% (modulus) == (equal to) (bitwise XOR)
!= (not equal to) ~^ or ^~(bitwise XNOR)

Logical Operators : Shift Operators : Reduction Operators :


! (logical NOT) << (shift left) & (reduction AND)
&& (logical AND) >> (shift right) | (reduction OR)
|| (logical OR) ~& (reduction NAND)
~| (reduction NOR)
^ (reduction XOR)
~^ or ^~(reduction XNOR)
Conditional Operator: “?”
(cond) ? (result if cond true):
(result if cond false)
CONCLUSION
- VLSI Is a mature field of ECE which deals with the semiconductor
properties to design patterns that forms the building blocks .

- Learned the application and scopes of VLSI.

- Learned about the SoC design.

- Learned about the Verilog HDL programming.

- Learned about the design flow.

- Frontend-Design Flow And Backend-Design Flow.

- Learned about the Verilog Data Types and Operators.

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