Gate Level Minimization

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Grouping and Minimizing
Number of elements in a Groups must be 2n
where n=whole number
All 1s must be part of at least one group
Group size must be maximized: e.g. if a group can be formed of four, do
NOT make two groups (two in each).
1s can be shared among different groups
Minimizing
For each group, select only those variables that are NOT changing their value
throughout the group
Unchanged variables be named as x’ or x representing 0 or 1 in that group

2
Four Variable Maps
F(A,B,C,D) = Σ(0,1,2,4,5,6,8,9,12,13,14)

CD
AB 00 01 11 10

00 1 1 1
01 1 1 1
11 1 1 1
10 1 1
F = C’ + A’D’ + BD’
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Four Variable Maps
F(A,B,C,D) = Σ(0,1,4,5,10,11)

CD
AB 00 01 11 10

00

01

11

10

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Four Variable Maps
F(A,B,C,D) = Σ(0,2,3,5,7,8,9,10,11,13,15)

CD
AB 00 01 11 10

00

01

11

10

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 Don’t Care Conditions

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 Don’t Care Conditions
F(w,x,y,z) = ∑ (1,3,7,11,15) +
d(w,x,y,z) = ∑ (0,2,5)
yz
F = yz + w’z
wx 00 01 11 10

00 X 1 1 X

01 X 1

11 1

10 1

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 Don’t Care Conditions
F(w,x,y,z) = ∑ (1,3,7,11,15) +
d(w,x,y,z) = ∑ (0,2,5)
yz
F = yz + w’x’
wx 00 01 11 10

00 X 1 1 X

01 X 1

11 1

10 1

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Don’t Care Conditions (Example)
F(w,x,y,z) = ∑ (0,1,2,4,5) +
d(w,x,y,z) = ∑ (3,6,7)
yz
wx 00 01 11 10

00 1 1 X 1 F = w’

01 1 1 X X

11

10

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 NAND implementation

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NAND Implementation
Two Graphic Symbols

x x x’+y’+z’ = (xyz)’
y (xyz)’ y
z z
AND - Invert Invert - OR

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NAND – Two Level Implementation
1. (Simplified) Equation must be in Sum-of-Products form. (Two Levels)

2. Draw AND-OR diagram

Assume all variables and their complements are available. i.e. do not
use inverters to take complement of a variable.

3. Replace AND gates with AND-Invert symbol.

Replace OR gates with Invert-OR symbols

4. If an input is directly going into the second level, invert it

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NAND – Two Level Implementation
 Example
 F(x,y,z) = Σ(1,2,3,4,5,7)
1. Step-1: Simplify and express it in Sum of Products form
 Use K-Map to simplify and convert into sum-of-product form
 F = xy’ + x’y + z
2. Draw an AND-OR diagram

3. Replace AND gates with AND-Invert symbols

 Replace OR gates with Invert-OR symbols

4. Invert the symbol going into the second level

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Multilevel NAND Circuit
 If three or more levels in the equation, follow these steps.

1. Draw a simple AND-OR diagram

Assume all variables and their complements are available. i.e. do not
use inverters to take complement of a variable.
2. Convert all AND gates to NAND gates with AND-Invert Graphic
symbols
Convert all OR gates to NAND gates with Invert-OR Graphic symbols
3. Check for all the bubbles in the diagram (i.e. must have two bubbles
per connecting line). Compensate all bubbles (with inverter)

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 Multilevel NAND Circuit
 Example:
 F = A(CD + B) + BC’
 Step-1: Draw AND-OR Diagram

 Step-2: AND to NAND, OR to Invert-OR

 Step-3: Compensate Bubbles

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Multilevel NAND Circuit
 Examples
 F = (AB’ + A’B)(C + D’)

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 NOR Implementation

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NOR Implementation
Two Graphic Symbols

x x x’.y’.z’ = (x+y+z)’
y (x+y+z)’ y
z z

OR - Invert Invert - AND

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NOR – Two Level Implementation
1. Equation must be in Product-of-Sum form. (Two Levels)

2. Draw a AND-OR diagram

3. Replace OR gates with OR-Invert symbol.

Replace AND gates with Invert-AND symbols

4. If an input is directly going into the second level, invert it

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NOR – Two Level Implementation
 Example
 F= (A + B)(C + D)E

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Multilevel NOR Circuit
 If three or more levels in the equation, follow these steps.

1. Draw a simple AND-OR diagram

2. Convert all OR gates to NOR gates with
OR-Invert Graphic symbols
Convert all AND gates to NAND gates with Invert-AND Graphic
symbols
3. Check for all the bubbles in the diagram. Compensate all bubbles
(with inverter)

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Multilevel NOR Circuit
 Example:
 F = (AB’ + A’B)(C + D’)

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 Selected Problems

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Problem 3-16: Simplify the following expression and
implement with two-level NAND circuit
F = AB’ + ABD + ABD’ + A’C’D’ + A’BC’
Step-1: Simplified circuit be in SOP form
F = A + BC’ + C’D’
CD
AB 00 01 11 10

00 1

01 1 1

11 1 1 1 1

10 1 1 1 1

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Problem 3-16: Simplify the following expression and
implement with two-level NAND circuit
 Step-1: Simplified circuit be in SOP form
 F = A + BC’ + C’D’
 Step-2: Draw AND-OR Diagram

 Step-3: Replace AND with AND-Invert

OR with Invert-OR

 Step-4: Input A is going directly to second level. Invert it.

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Problem 3-19: Simplify the following expression and
implement with two-level NOR circuit
F(w, x, y, z) = ∑(5,6,9,10)
Step-1: Simplified circuit be in POS form
yz
wx 00 01 11 10

00 0 0 0 0

01 0 1 0 1

11 0 0 0 0

10 0 1 0 1

F’ = w’x’ + wx + y’z’ + yz

F = (w+x)(w’+x’)(y+z)(y’+z’)
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Problem 3-20: Draw the multiple-level NAND circuit for
the following expression
(AB’ + CD’) + BC(A+B)
 Step-1: Draw AND-OR Diagram

 Step-2: AND to NAND, OR to Invert-OR

 Step-3: Compensate Bubbles

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Problem 3-22: Convert the following logic diagram into
multiple-level NAND circuit
D'
1 2
Z

D 1
3
CD 1
C 2
2
3
Y
1
3 1 2
2
(C+D)'
C+D 1
3
B 2

2
3
X
1
3
1 2 2

1
3
2
1
3
W
A 2

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