Addressing Modes

Prerequisite - Introduction to parts of CPU

• Arithmetic and Logic Unit (ALU)
It performs all the arithmetic and logical
micro operations.
CU
• Floating Point Unit (FPU)

REGISTERS
It performs operations on floating point
numbers.
ALU
• Memory Unit (MU)
It stores the set of instructions.

FPU • Control Unit (CU)

It supervises the sequence of micro
operations.

MU • Registers
Temporary storage area, which holds the
data during the execution of an instruction.
Prerequisite - Registers inside CPU
Accumulator Flag Register / Program Status Word (PSW)
A C S = Sign, Z = Zero, CY = Carry,
A (8-bit) S Z P
AC = Auxiliary Carry, P = Parity,
C Y
B (8-bit) C (8-bit)

D (8-bit) E (8-bit) General Purpose Registers

H (8-bit) L (8-bit)

PC (16-bit)
Index Registers
SP (16-bit)
Addressing Modes
• Microprocessor executes the instructions stored in memory (RAM).
• It executes one instruction at a time.
• Each of the instruction contains operations and operands.
• Operation specifies the type of action to be performed.
• For example: ADD, SUB, MOV, INC, LOAD, STORE
• Operands are the data on which the operation is to be performed.

MOV B, A Here MOV is operation and (B & A) are operands.

ADD Here ADD is operation and (B) is operand.

B
Addressing Modes
• Operand can be place either in one of the processor register or in
memory.

• There are different ways to get the operands.

• The way in which the operand is taken from register or memory is

named as addressing mode.
Addressing Modes
1. Immediate Addressing Mode
2. Register Addressing Mode
3. Register Indirect Addressing Mode
4. Direct Addressing Mode
5. Indirect Addressing Mode
6. Implied Addressing Mode
7. Relative Addressing Mode
8. Indexed Addressing Mode
9. Base Register Addressing Mode
10. Autoincrement or Autodecrement Addressing Mode
1. Immediate Addressing Mode
• The operand is specified with in the instruction.
• Operand itself is provided in the instruction rather than its
address.
Move Immediate
MVI A , 15h A ← 15h Here 15h is the immediate operand

Add Immediate
ADI 3Eh A ← A + 3Eh Here 3Eh is the immediate operand
2. Register Addressing Mode
• The operand is specified with in one of the processor register.
• Instruction specifies the register in which the operand is stored.

Move
MOV C , A C←A Here A is the operand specified in register

Add
ADD B A← A+B Here B is the operand specified in register
3. Register Indirect Addressing Mode
• The instruction specifies the register in which the memory
address of operand is placed.
• It do not specify the operand itself but its location with in the
memory where operand is placed.

Move
MOV A , M A ← [[H][L]]

It moves the data from memory location specified by HL register pair to A.

3. Register Indirect Addressing Mode
MOV A , M A ← [[H][L]]
It moves the data from memory location specified by HL register pair to A.

Before

After
2807 A A9 2807
2806 2806
H
A 28 2805 A9 H 28 2805 A9
2804 2804
L 05 2803
L 05 2803
2802 2802
2801 2801
A ← [2805] A ← A9
2800 2800
4. Direct Addressing Mode
• The instruction specifies the direct address of the operand.
• The memory address is specified where the actual operand is.

Load Accumulator
LDA 2805h A ← [2805]
It loads the data from memory location 2805 to A.

Store Accumulator
STA 2803h [2803] ← A
It stores the data from A to memory location 2803.
4. Direct Addressing Mode
LDA 2805h A ← [2805]
It loads the data from memory location 2805 to A.
Before After

A 2807 A 5C 2807
2806 2806
2805 5C 2805 5C
A ← [2805] 2804 A ← 5C 2804
2803 2803
2802 2802
2801 2801
2800 2800
4. Direct Addressing Mode
STA 2803h [2803] ← A
It stores the data from A to memory location 2803.
Before After

A 9B 2807 A 9B 2807
2806 2806
2805 2805
[2803] ← A 2804 [2803] ← 9B 2804
2803 2803 9B
2802 2802
2801 2801
2800 2800
5. Indirect Addressing Mode
• The instruction specifies the indirect address where the effective
address of the operand is placed.
• The memory address is specified where the actual address of
operand is placed.

Move
MOV A, 2802h A ← [[2802]]
It moves the data from memory location specified by the location 2802 to A.
5. Indirect Addressing Mode
MOV A, 2802h A ← [[2802]]
It moves the data from memory location specified by the location
2802 to A.
Before After

A 2807 A FF 2807
2806 FF 2806 FF
2805 2805
A ← [[2802]] 2804 A ← FF 2804
2803 06 2803 06
2802 28 2802 28
2801 2801
2800 2800
6. Implied Addressing Mode
• It is also called inherent addressing mode.
• The operand is implied by the instruction.
• The operand is hidden/fixed inside the instruction.

Complement Accumulator CMA

(Here accumulator A is implied by the instruction)

Complement Carry Flag CMC

(Here Flags register is implied by the instruction)

Set Carry Flag STC

(Here Flags register is implied by the instruction)
7. Relative Addressing Mode
• In relative addressing mode, contents of Program Counter PC is
added to address part of instruction to obtain effective address.

• The address part of the instruction is called as offset and it can +ve
or –ve.

• When the offset is added to the PC the resultant number is the

memory location where the operand will be placed.
7. Relative Addressing Mode

2807 22 2807 22
2806 FF 2806 FF Actual Operand
Offset = 04h 2805 6D 2805 6D
2804 59 2804 59
PC 2801 2803 08 2803 08
2802 2E 2802 2E
2801 F3 2801 F3
2800 9F 2800 9F

Effective address of operand = PC + 01 + offset

Effective address of operand = 2801 + 01 + 04
Effective address of operand = 2806h
7. Relative Addressing Mode

2807 22 2807 22 Actual Operand

2806 FF 2806 FF
Offset = 03h 2805 6D 2805 6D
2804 59 2804 59
PC 2803 2803 08 2803 08
2802 2E 2802 2E
2801 F3 2801 F3
2800 9F 2800 9F

Effective address of operand = PC + 01 + offset

Effective address of operand = 2803 + 01 + 03
Effective address of operand = 2807h
8. Indexed Addressing Mode
• In index addressing mode, contents of Index register is added to
address part of instruction to obtain effective address.

• The address part of instruction holds the beginning/base address and is

called as base.

• The index register hold the index value, which is +ve.

• Base remains same, the index changes.

• When the base is added to the index register the resultant number is
the memory location where the operand will be placed.
8. Indexed Addressing Mode
Base = 2800h
Effective address of operand = Base + IX
2807 22 2807 22 2807 22 2807 22
2806 FF 2806 FF 2806 FF 2806 FF
2805 6D 2805 6D 2805 6D 2805 6D
2804 59 2804 59 2804 59 2804 59
2803 08 2803 08 2803 08 2803 08
2802 2E 2802 2E 2802 2E 2802 2E
2801 F3 2801 F3 2801 F3 2801 F3
2800 9F 2800 9F 2800 9F 2800 9F

IX 0000 IX 0001 IX 0002 IX 0003

2800h + 0000h = 2800h 2800h + 0001h = 2801h 2800h + 0002h = 2802h 2800h + 0003h = 2803h
8. Indexed Addressing Mode
Base = 2802h
Effective address of operand = Base + IX
2807 22 2807 22 2807 22 2807 22
2806 FF 2806 FF 2806 FF 2806 FF
2805 6D 2805 6D 2805 6D 2805 6D
2804 59 2804 59 2804 59 2804 59
2803 08 2803 08 2803 08 2803 08
2802 2E 2802 2E 2802 2E 2802 2E
2801 F3 2801 F3 2801 F3 2801 F3
2800 9F 2800 9F 2800 9F 2800 9F

IX 0000 IX 0001 IX 0002 IX 0003

2802h + 0000h = 2802h 2802h + 0001h = 2803h 2802h + 0002h = 2804h 2802h + 0003h = 2805h
9. Base Register Addressing Mode
• In base register addressing mode, contents of base register is added to address part
of instruction to obtain effective address.

• It is similar to the indexed addressing mode except the register now is called as base
instead of index.

• The base register hold the beginning/base address.

• The address part of instruction holds the offset.

• Offset remains same, the base changes.

• When the offset is added to the base register the resultant number is the memory
location where the operand will be placed.
9. Base Register Addressing Mode
Offset= 0001h
Effective address of operand = Base Register + offset
2807 22 2807 22 2807 22 2807 22
2806 FF 2806 FF 2806 FF 2806 FF
2805 6D 2805 6D 2805 6D 2805 6D
2804 59 2804 59 2804 59 2804 59
2803 08 2803 08 2803 08 2803 08
2802 2E 2802 2E 2802 2E 2802 2E
2801 F3 2801 F3 2801 F3 2801 F3
2800 9F 2800 9F 2800 9F 2800 9F

Base 2800 Base 2801 Base 2802 Base 2803

2800h + 0001h = 2801h 2801h + 0001h = 2802h 2802h + 0001h = 2803h 2803h + 0001h = 2804h
9. Base Register Addressing Mode
Offset= 0003h
Effective address of operand = Base Register + offset
2807 22 2807 22 2807 22 2807 22
2806 FF 2806 FF 2806 FF 2806 FF
2805 6D 2805 6D 2805 6D 2805 6D
2804 59 2804 59 2804 59 2804 59
2803 08 2803 08 2803 08 2803 08
2802 2E 2802 2E 2802 2E 2802 2E
2801 F3 2801 F3 2801 F3 2801 F3
2800 9F 2800 9F 2800 9F 2800 9F

Base 2800 Base 2801 Base 2802 Base 2803

2800h + 0003h = 2803h 2801h + 0003h = 2804h 2802h + 0003h = 2805h 2803h + 0003h = 2806h
10. Autoincrement or Autodecrement Addressing Mode

• It is similar to register indirect addressing mode.

• Here the register is incremented or decremented before or after its

value is used.
10. Autoincrement or Autodecrement Addressing Mode
HL pair incremented after its value is used

At start: HL 2802

2807 22 2807 22 2807 22 2807 22

2806 FF 2806 FF 2806 FF 2806 FF
2805 6D 2805 6D 2805 6D 2805 6D
2804 59 2804 59 2804 59 2804 59
2803 08 2803 08 2803 08 2803 08
2802 2E 2802 2E 2802 2E 2802 2E
2801 F3 2801 F3 2801 F3 2801 F3
2800 9F 2800 9F 2800 9F 2800 9F

HL 2802 HL 2803 HL 2804 HL 2805

1st Time 2nd Time 3rd Time 4th Time

10. Autoincrement or Autodecrement Addressing Mode
HL pair incremented before its value is used

At start: HL 2803

2807 22 2807 22 2807 22 2807 22

2806 FF 2806 FF 2806 FF 2806 FF
2805 6D 2805 6D 2805 6D 2805 6D
2804 59 2804 59 2804 59 2804 59
2803 08 2803 08 2803 08 2803 08
2802 2E 2802 2E 2802 2E 2802 2E
2801 F3 2801 F3 2801 F3 2801 F3
2800 9F 2800 9F 2800 9F 2800 9F

HL 2804 HL 2805 HL 2806 HL 2807

1st Time 2nd Time 3rd Time 4th Time

Example problem
Address Memory
PC 200 200 Load to AC Mode PC = Program Counter
Address = 500 R1 = Register
R1 400 201
XR = Index Register
202 Next Instruction
AC = Accumulator
XR 100
399 450 • Memory is having first instruction to load AC
AC 400 700 • Mode will specify the addressing mode to get operand.
• Address field of instruction is 500.

500 800

600 900 Find out the effective address of operand and

operand value by considering different
702 325 addressing modes.

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 1. Immediate Addressing Mode
201 Address = 500
R1 400 • As instruction contains immediate number 500.
202 Next Instruction
• It is stored as address 201.
XR 100
399 450
AC 400 700 Effective Address = 201
Operand = 500
500 800

AC 500
600 900

702 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 2. Register Addressing Mode
201 Address = 500
R1 400 • Register R1 contains 400.
202 Next Instruction
• As operand is in register so no any memory location.
XR 100
399 450
AC 400 700 Effective Address = Nil
Operand = 400
500 800

AC 400
600 900

702 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 3. Register Indirect Addressing Mode
201 Address = 500
R1 400 • Register R1 contains 400.
202 Next Instruction
• So effective address of operand is 400.
XR 100 • The data stored at 400 is 700.
399 450
AC 400 700
Effective Address = 400
500 800
Operand = 700

AC 700
600 900

702 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 4. Direct Addressing Mode
201 Address = 500
R1 400 • Instruction contains the address 500.
202 Next Instruction
• So effective address of operand is 500.
XR 100 • The data stored at 500 is 800.
399 450
AC 400 700
Effective Address = 500
500 800
Operand = 800

AC 800
600 900

702 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 5. Indirect Addressing Mode
201 Address = 500
R1 400 • Instruction contains the address 500.
202 Next Instruction
• Address at 500 is 800.
XR 100 • So effective address of operand is 800.
399 450 • The data stored at 800 is 300.
AC 400 700

Effective Address = 800

500 800
Operand = 300

600 900
AC 300

702 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 6. Relative Addressing Mode
201 Address = 500
R1 400 • PC = 200.
202 Next Instruction
• Offset = 500.
XR 100 • Instruction is of 2 bytes.
399 450 • So effective address = PC + 2 + offset = 200 + 500 +2 =
AC 400 700 702 .
• The data stored at 702 is 325.

500 800

Effective Address = 702

600 900 Operand = 325

702 325
AC 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 7. Index Addressing Mode
201 Address = 500
R1 400 • XR = 100.
202 Next Instruction
• Base = 500.
XR 100 • So effective address = Base + XR = 500 + 100 = 600 .
399 450 • The data stored at 600 is 900.
AC 400 700

Effective Address = 600

500 800
Operand = 900

600 900
AC 900

702 325

800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 8. Autoincrement Addressing Mode
201 Address = 500
R1 400 • It is same as register indirect addressing mode except
202 Next Instruction
the contents of R1 are incremented after the execution.
XR 100 • R1 contains 400.
399 450 • So effective address of operand is 400.
AC 400 700 • The data stored at 400 is 700.

500 800
Effective Address = 400
Operand = 700
600 900

R1 401
702 325
AC 700
800 300
Example problem
Address Memory
PC 200 200 Load to AC Mode 9. Autodecrement Addressing Mode
201 Address = 500
R1 400 • It is same as register indirect addressing mode except
202 Next Instruction
the contents of R1 are decremented before the
XR 100
execution.
399 450 • R1 contains 400.
AC 400 700 • R1 is first decremented to 399.
• So effective address of operand is 399.
• The data stored at 399 is 450.
500 800

600 900 Effective Address = 399

Operand = 450
702 325 R1 399

800 300 AC 450

Example problem
Addressing Mode Effective Address Operand
Immediate Addressing Mode 201 500
Register Addressing Mode Nil 400
Register Indirect Addressing Mode 400 700
Direct Addressing Mode 500 800
Indirect Addressing Mode 800 300
Relative Addressing Mode 702 325
Indexed Addressing Mode 600 900
Autoincrement Addressing Mode 400 700
Autodecrement Addressing Mode 399 450