Input/Output Subsystem
I/O System
• The I/O subsystem is treated as an independent unit in the
computer
• The CPU initiates I/O commands generically
• Read, write, scan, etc
• This simplifies the CPU
• I/O modules are components that connect an I/O device to the I/O bus
• The I/O module is an intermediary between CPU and the I/O device, and possibly
between memory and the I/O device
• This allows us to tailor I/O devices to specific uses without having to
worry about how the CPU might be able to handle that new type of
device
• In addition, while the CPU may initiate an I/O operation, once begun,
the I/O module takes over so that the CPU can get back to doing
whatever it was doing
I/O Performance
• Another reason to offload I/O to separate components is that I/O
takes place at a different speed than processing and memory
• Often, I/O is not tuned to the system clock
• Often, I/O is slowed down by mechanical parts (e.g. disk drive read/write,
printer and/or human interaction.
I/O Architectures
• I/O subsystem will
typically include
• Blocks of memory
dedicated to I/O buffering
• I/O bus(es)
• I/O devices
• Specialized interfaces (for
instance for keyboard and
monitor) and interface
cards
• Possibly other
connections (network,
cable, etc)
Programmed I/O
• The CPU monitors the I/O module so that the CPU is not free to work
on other things
• This is an inefficient form of I/O, and the oldest form, it is typically not used
today unless the program directly calls for input from keyboard or other device
• The process:
• I/O instruction in the program causes CPU to examine I/O module’s control
register’s ready bit – if it is ready, then the CPU issues the I/O command by
setting the proper bits in this register
• the I/O module issues the command to the I/O device and watches over
device
• when the I/O device has completed the task the I/O module sets the proper
bits in its control register
• the CPU, which has been watching this register, then cleans up the operation
(on input, moves the input datum from the I/O module’s data register to the
CPU register or memory location)
Interrupt-Driven I/O
• Here, the Interrupt system is used so that the CPU does not have
to watch and wait for the I/O module
• The process:
• The CPU issues the command to the I/O module
• The CPU then continues with what it was doing
• The I/O module, like before, issues the command to the I/O device and waits for the
I/O to complete
• Upon completion of one byte input or output, the I/O module sends an interrupt
signal to the CPU
• The CPU finishes what it was doing, then handles the interrupt
• This will involve moving the resulting datum to its proper location on input
• Once done with the interrupt, the CPU resumes execution of the program
• This is much more efficient than Programmed I/O as the CPU is not
waiting during the (time-consuming) I/O process
• However, if the I/O itself takes more than 1 input or output (that is, if the amount
being transferred is greater than 1 byte), then this interrupts the CPU often
Handling Interrupts
• Device raises the interrupt (sends interrupt signal)
• At the end of the current fetch execute cycle, CPU checks for
interrupt, if there is one, it saves its status (register values)
• CPU identifies interrupting device
• Given the interrupting device number, use this to map into the
Interrupt vector table
• For instance, interrupt 15 would be at location 15 in memory, this entry
stores the location of interrupt 15’s handler in operating system memory
• Move this address into the PC
• Execute interrupt handler
• Upon completion, restore saved register values
DMA I/O
• The DMA controller includes a count
• Direct memory access allows register set by the CPU to count the
number of bytes still to be transferred
an I/O module to
• The DMA controller acts as an
communicate directly with
interface between I/O device and
memory so that the CPU memory
does not have to be
interrupted for each data
movement
• In any large transfer, DMA I/O is
preferable to Interrupt-driven
I/O
• The DMA controller only
interrupts the CPU once, once
the entire data transfer is
complete
• Note: memory is a slave device
so it cannot initiate bus
transfers, the DMA controller
then acts as a memory master
Channel I/O
• In DMA I/O, if there is a failure
of the I/O device, the I/O
module interrupts the CPU to
handle the problem
• A more sophisticated I/O
module is known as an I/O
channel
• this is an I/O module with its own
mini-processor (known as an I/O
processor)
• these processors contain their own
ALUs and control units so that they
can perform comparisons and
make branches in their own mini-
programs
• Channel I/O can handle any I/O architecture with I/O Channels
problem without having to
interrupt the CPU
I/O Accessing and Addressing
• I/O accesses use the Expansion bus and System bus
• as multiple devices might need access at the same time, bus access
must be governed
• three approaches are:
• bus arbiter, a controller to select the device that next gets to use the bus
based on a priority scheme
• an I/O monitor checks for bus traffic and if it is busy, waits
• use the CPU as an arbiter
• To determine which device is to handle a CPU command, the
CPU sends the device’s address on the address bus (along
with the control command of read or write)
Two Types of Addressing
• Isolated I/O – every device has a unique address and so device j
watches for address j over the address bus, and the CPU uses two
sets of control lines, one to memory, one to the I/O subsystem
• Memory-mapped I/O – some memory addresses are reserved for
I/O module registers, and communication from the CPU to
memory & I/O is generic
• Memory-mapped while being cheaper because of the need for fewer
control lines takes away some memory addresses so those memory
locations are never used
Forms of I/O
• Character versus block
• We differentiate between whether we expect a single datum (byte or word
size) or a block of data
• Character: keyboard, mouse, monitor, printer, modem
• Block: storage device (disk drive, tape drive)
• Notice that block devices are usually much higher speed than character
• Also, block devices tend to use DMA while character uses interrupt-driven
• Synchronous vs asynchronous
• Synchronous devices use the system clock to regular usage (note that a
transfer may not occur at every clock cycle but it will start with a clock pulse)
• Asynchronous devices are not regulated by the clock and the device may
start or stop communicating at any time (think of a network message coming
in, or a response from the printer)
I/O Control Lines
• Here we see more detail on the I/O bus including control lines
• Request from CPU goes to I/O module – basically asking “are you
ready?”
• Ready goes from I/O module to CPU
• Read/write indicates the type of operation
• Clock is used to synchronize transfer if available
• Error denotes that the I/O module wants the CPU’s attention
Interrupt Controller
• One final controller is the interrupt controller
• All interrupts go directly to a controller rather than to the CPU
• The controller then interrupts the CPU and waits for the interrupt to be
acknowledged
• The interrupt controller prioritizes interrupts from the devices based on the importance of the
device
• Prioritization is established by the architects when the controller is designed
• The data lines D0, D1 are used to specify the interrupting device
• Some architectures do not have data lines, instead the interrupting device
must be determined some other way
