CH 04 Transistor Biasing
CH 04 Transistor Biasing
جــــــــــامــــــــعـــــــــــــــــة فلســـطــيـــــــــــــن
كلية الهندسة التطبيقية وـالتخطيط العمرــاني
Ch.4 Summary
Biasing
Operating Point
The DC input
establishes an
operating or
quiescent point
called the Q-point.
Ch.4 Summary
DC Biasing Circuits
Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-emitter loop
Voltage divider bias circuit
DC bias with voltage feedback
Ch.4 Summary
Fixed Bias
Ch.4 Summary
VCC VBE
IB
RB
Ch.4 Summary
Collector-Emitter Loop
Collector current:
IC IB
VCE VCC IC RC
Ch.4 Summary
Saturation
V
ICsat CC
R
C
VCE 0 V
Ch.4 Summary
Adding a resistor
(RE) to the emitter
circuit stabilizes
the bias circuit.
Ch.4 Summary
Base-Emitter Loop
From Kirchhoff’s voltage law:
VCC IE RE VBE IE RE 0
Since IE = ( + 1)IB:
VCC IB RB (β 1)IB RE 0
Collector-Emitter Loop
From Kirchhoff’s voltage law:
IE RE VCE IC RC VCC 0
Since IE IC:
VCE VCC – IC(RC RE )
Also:
VE IE RE
VC VCE VE VCC IC RC
VB VCC – I R RB VBE VE
Ch.4 Summary
Saturation Level
Approximate Analysis
Where IB << I1 and I1 I2 :
R2VCC
VB
R1 R2
Base-Emitter Loop
From Kirchhoff’s voltage law:
VCC – IC RC –I B RB –VBE –I E RE 0
VCC VBE
Solving for IB: IB
RB β(RC RE )
Ch.4 Summary
Collector-Emitter Loop
Applying Kirchoff’s voltage law:
To ensure saturation:
ICsat
IB
βdc
Emitter-collector
resistance at VCEsat VCC
Rsat Rcutoff
saturation and cutoff: ICsat ICEO
Ch.4 Summary
Switching Time
t on t r t d
t off t s t f
Ch.4 Summary
Troubleshooting Hints
Approximate voltages VBE .7 V for silicon transistors
VCE 25% to 75% of VCC
PNP Transistors