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CSC 222: Computer Organization: & Assembly Language

This document discusses the basics of computer organization and assembly language. It covers topics like the instruction cycle, instruction representation, instruction types, number of addresses in instructions, and basic processor operations. The key points are: 1) The basic instruction cycle has three steps - fetch, decode, and execute. The processor fetches instructions from memory, decodes them to determine the operation, and executes them. 2) Instructions are represented as sequences of bits with fields for the operation code and operands. Common instruction types include data processing, storage, movement, and control transfer. 3) The processor clock synchronizes all internal activity. The program counter addresses memory locations to fetch instructions in sequence.

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Abdul Rahman
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© © All Rights Reserved
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0% found this document useful (0 votes)
116 views

CSC 222: Computer Organization: & Assembly Language

This document discusses the basics of computer organization and assembly language. It covers topics like the instruction cycle, instruction representation, instruction types, number of addresses in instructions, and basic processor operations. The key points are: 1) The basic instruction cycle has three steps - fetch, decode, and execute. The processor fetches instructions from memory, decodes them to determine the operation, and executes them. 2) Instructions are represented as sequences of bits with fields for the operation code and operands. Common instruction types include data processing, storage, movement, and control transfer. 3) The processor clock synchronizes all internal activity. The program counter addresses memory locations to fetch instructions in sequence.

Uploaded by

Abdul Rahman
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 22

CSC 222: Computer Organization

& Assembly Language

4 – Processor Basics

Instructor: Ms. Nausheen Majeed


CPU Overview
Outline
 Basic Operational Concepts
 Processor Clock
 Instruction Representation
 Instruction Cycle

3
References
 Chapter 1, Ytha Yu and Charles Marut, “Assembly Language Programming
and Organization of IBM PC”
 Chapter 3, William Stallings, “Computer Organization & Architecture”
 Chapter 2, Subrata Ghoshal, “Computer Organization & Architecture”

4
Basic Operational Concepts
Machine Instruction Elements
 Each instruction must have elements that contain the
information required by the CPU for execution.
 These elements can be:
 Operation code: Specifies the operation to be performed (e.g.. ADD,
I/O). The operation is specified by a binary code, known as the
operation code, or opcode.
 Source operand reference: The operation may involve one or more
source operands, that is, operands that are inputs for the operation.
 Result operand reference: The operation may produce a result. Also
called destination operand.
 Next instruction reference: This tells the CPU where to fetch the
next instruction.

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Reference: http://cnx.org/content/m29425/latest/
Instruction Representation
 Within the computer, each instruction is represented by a
sequence of bits.
 16 bits instruction
 4 bit opcode, 6 bit operand 1, 6 bit operand 2
 4 bit opcode, 12 bit operand
 32 bits instruction
 64 bits instruction

Figure: A Simple Instruction Format

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Contd..
 Binary representations of machine instructions is difficult to
remember.
 Use a symbolic representation of machine instructions.
 Opcodes are represented by abbreviations, called mnemonics,
that indicate the operation. Common examples include:

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Instruction Types
 Data processing: Arithmetic and logic instructions
 Data storage: Memory instructions
 Data movement: I/O instructions
 Transfer of Control: Test and branch instructions

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No. of Addresses in an Instruction
 Three addresses
 Operand 1, operand 2, result
 Two addresses
 Source
 Destination
 One addresses
 Source or Destination
 Zero address
 Zero-address instructions are applicable to a special memory
organization, called a Stack. A stack is a last-in-first-out set of
locations.

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Types of Operands
 Machine instructions operate on data.
 The most important general categories of data are:
 Addresses
 Numbers
 Characters
 Logical data

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Basic Operations – Processor
 Execute the software by fetching instruction from memory
 Look for any external signal and react accordingly
 Input signals from keyboard or mouse etc.

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Processor Clock
 Heart of any processor
 Simple digital signals at equal time intervals
 Alternate On Off states
 All activity within the CPU is synchronized with the edges
(rising or falling) of this clock signal.

Rising Edge Falling Edge

Reference: http://www.plantation-productions.com/Webster/www.artofasm.com/Linux/HTML/
SystemOrganizationa4.html

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Program Counter (a.k.a. Binary Counter)
 With every falling edge or rising edge (depending upon processor) of clock
signal, the counter is incremented by one.
 Width varies from processor to processor
 The contents of PC are used as target address for the memory area

Control Unit Memory


Read
(CU)
Read
PC Address
Memory address
Data Buffer Data

Data from Memory Memory


Microprocessor
Figure: Reading from memory
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Basic Instruction Cycle
 Fetch  Decode  Execute
 Fetch
1. Fetch an instruction from memory
2. Decode the instruction to determine the operation
3. Fetch data from memory if necessary
 Execute
4. Perform the operation on the data
5. Store the result in memory if needed

15
Contd..
 Internal CPU Registers used in instruction cycle:
 Program Counter (PC) = Address of instruction
 Instruction Register (IR) = Instruction being executed
 Accumulator (AC) = Temporary Storage

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Computer Components: Top Level View Contd..

17
Detailed Steps
 Address in the Program Counter register
 Program Counter (PC) holds address of next instruction to fetch
 Fetch the instruction from the memory
 Increment the Program Counter
 Unless told otherwise
 Instruction loaded into Instruction Register (IR)
 Decode the type of instruction
 Fetch the operands
 Execute the instruction
 Store the results

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Example Program Execution

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Instruction Execution Cycle

PC Program (RAM)
I-1 I-2 I-3 I-4
fetch
op1
Data op2 registers I-1
(RAM) Instruction
Queue

decode

ALU

execute

store the output

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Instruction Cycle State Diagram

21
Contd..
 Instruction Fetch
 Read instruction from memory into processor
 Instruction Operation Decoding
 Determine the type of operation to be performed and operand(s) to be used.
 Operand Address Calculation
 If operation involves reference to an operand in memory or I/O, then
determine the address of operand.
 Operand Fetch
 Fetch from memory or read from I/O
 Data Operation
 Perform the operation
 Operand Store
 Write into memory or out to I/O if required

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