SRI RAMAKRISHNA INSTITUTE OF TECHNOLOGY, COIMBATORE-10

(An Autonomous Institution)

(Approved by AICTE, New Delhi and permanently Affiliated to Anna University, Chennai)

COMBINATIONAL LOGIC

Ms.R.Gayathri,
Assistant Professor (Sr. Gr.)/ECE
 COMBINATIONAL LOGIC INTRODUCTION

•A combinational circuit is one where the output at any time depends only on the present
combination of inputs at that point of time with total disregard to the past state of the
inputs.

•The n-input binary variables come from an external source; the m- output variables are
produced by the internal combinational logic circuit and go to an external destination.
 Analysis & Design of combinational circuits

Steps to be followed: 
• To obtain the output Boolean functions from a logic diagram.

• Label all gate outputs that are a function of input variables with arbitrary symbols or
names. Determine the Boolean functions for each gate output.

• Label the gates that are a function of input variables and previously labeled gates with
other arbitrary symbols or names. Find the Boolean functions for these gates.

• Repeat the process in step 2 until the outputs of the circuit are obtained.

•  By repeated substitution of previously defined functions, obtain the output Boolean
functions in terms of input variables.
Logic diagram for analysis example:
• To obtain the truth table directly from the logic diagram without going through the
derivations of Boolean functions:

Design of combinational circuits:

• From the specifications of the circuit, determine the required number of inputs and
outputs and assign a symbol to each.  
• Derive the truth table that defines the required relationship between inputs and outputs.
• Obtain the simplified Boolean functions for each output as a function of the input
variables.
• Draw the logic diagram and verify the correctness of the design.
 Circuits For Arithmetic Operations

• Arithmetic circuits are the ones which perform arithmetic operations like addition,

subtraction, multiplication, division, parity calculation.  

Adders  

• Adders are the basic building blocks of all arithmetic circuits; There are two types of

adders.

1. Half Adder.

2. Full Adder.

Half Adder  

• A half-adder is an arithmetic circuit block that can be used to add two bits.

• Circuit has two inputs that represent the two bits to be added and two outputs, with one

producing the SUM output and the other producing the CARRY.
 Full Adder
• A full adder circuit is an arithmetic circuit block that can be used to add three bits
to produce a SUM and a CARRY output.
 4-Bit Adder
• Chain single-bit adders together.
• What does this do to delay?

A
3B3 A
2B2 A
1B1 A
0B0

Full Adder
Full Adder
Full Adder
Full Adde
0
C C C
3 2 1

C
4 S
3 S
2 S
1 S
0
C 1 1 1 0
A 0 1 0 1
B 0 1 1 1
S 1 1 0 0
BCD Adder
• BCD addition is the same as binary addition with a bit of variation: whenever a sum
is greater than 1001, it is not a valid BCD number, so we add 0110 to it, to do the
correction. This will produce a carry, which is added to the next BCD position.
• Add the two 4-bit BCD code inputs.
• Determine if the sum of this addition is greater than 1001; if yes, then add 0110 to
this sum and generate a carry to the next decimal position
Subtractor
• Subtractor circuits take two binary numbers as input and subtract one binary number
input from the other binary number input. There are two types of subtractors, 
1. Half Subtractor
2. full Subtractor
Half Subtractor
• The half-subtractor is a combinational circuit which is used to perform subtraction
of two bits. It has two inputs, X (minuend) and Y (subtrahend) and two outputs D
(difference) and B (borrow).
Full Subtractor
• A full subtractor is a combinational circuit that performs subtraction
involving three bits, namely minuend, subtrahend, and borrow-in. There are two
outputs, namely the DIFFERENCE output D and the BORROW output Bo.
 4-bit Subtractor: E = 1
A3 B3 A2 B2 A1 B1 A0 B0

Full Adder Full Adder Full Adder Full Adder

C3 C2 C1
+1

C4 SD 3 SD 2 SD 1 SD 0

Add A to B’ (one’s complement) plus 1

That is, add A to two’s complement of B

D=A-B
Adder- Subtractor Circuit
 Magnitude comparators

• Magnitude comparators
– Compare two multi-bit binary numbers

– Create a single bit comparator

– Use repetitive pattern

• Multiplexers
– Select one out of several bits

– Some inputs used for selection

– Also can be used to implement logic

 Magnitude Comparator
• The comparison of two numbers
– outputs: A>B, A=B, A<B

• Design Approaches
– the truth table
2n
• 2 entries - too cumbersome for large n

– use inherent regularity of the problem

• reduce design efforts

• reduce human errors A<B

A[3..0]
Magnitude A=B
Compare
B[3..0]
A>B
 Magnitude Comparator
A0 C0
B0 D01
A1 C1
B1 A_EQ_B
A2 C2
B2
A3 C3 D23
B3

How can we find A > B?

How many rows would a truth table have?

28 = 256
 Magnitude Comparator

A0 C0
B0 D01
A1 C1
B1 A_EQ_B Find A > B
A2 C2
B2
A3 C3 D23
B3

Because A3 > B3

If A = 1001 and i.e. A3 . B3’ = 1

B = 0111 Therefore, one term in the logic

is A > B? equation for A > B is
Why? A3 . B3’
 Magnitude Comparator

If A = 1010 and A > B = A3 . B3’

B = 1001 + C3 . A2 . B2’
is A > B? + …..
Why? Because A3 = B3 and
A2 = B2 and
A1 > B1
i.e. C3 = 1 and C2 = 1 and
A1 . B1’ = 1
Therefore, the next term in the
logic equation for A > B is
C3 . C2 . A1 . B1’
 Magnitude Comparison
• Algorithm -> logic

– A = A3A2A1A0 ; B = B3B2B1B0

– A=B if A3=B3, A2=B2, A1=B1and A1=B1

• Test each bit:

• equality: xi= AiBi+Ai'Bi'

• (A=B) = x3x2x1x0

• More difficult to test less than/greater than

– (A>B) = A3B3'+x3A2B2'+x3x2A1B1'+x3x2x1 A0B0'

– (A<B) = A3'B3+x3A2'B2+x3x2A1'B1+x3x2x1 A0'B0

– Start comparisons from high-order bits

• Implementation

– xi = (AiBi'+Ai'Bi)’
 Magnitude
Comparison

• Hardware chips
 Magnitude Comparator
Real-world application

• Thermostat controller
 Multiplexers

• Select an input value with one or more select bits

• Use for transmitting data
• Allows for conditional transfer of data
• Sometimes called a mux
4– to– 1- Line Multiplexer
Quadruple 2–to–1-Line Multiplexer

Notice enable bit

Notice select bit

4 bit inputs
 Multiplexer as combinational modules
• Connect input variables to select inputs of multiplexer (n-1 for n variables)
• Set data inputs to multiplexer equal to values of function for corresponding
assignment of select variables
• Using a variable at data inputs reduces size of the multiplexer
Implementing a Four- Input Function with a Multiplexer
• Binary decoders
– Converts an n-bit code to a single active output

– Can be developed using AND/OR gates

– Can be used to implement logic circuits.

• Binary encoders
– Converts one of 2n inputs to an n-bit output

– Useful for compressing data

– Can be developed using AND/OR gates

• Both encoders and decoders are extensively used in digital systems

 Binary Decoder
• Black box with n input lines and 2n output lines
• Only one output is a 1 for any given input

n Binary
Decoder 2n outputs
inputs
 2-to-4 Binary Decoder
Truth Table:

XY F0 F1 F2 F3
0 0 1 0 0 0
0 1 0 1 0 0 F0 = X'Y'
1 0 0 0 1 0
1 1 0 0 0 1
F1 = X'Y
• From truth table, circuit for
F2 = XY'
2x4 decoder is:

• Note: Each output is a 2- F3 = XY

variable minterm (X'Y', X'Y,
XY' or XY)
F0
X 2-to-4 F1
X Y
Y Decoder F2
F3
 3-to-8 Binary Decoder
Truth Table:
F0 = x'y'z'
x y z F0 F1 F2 F3 F4 F5 F6 F7
0 0 0 1 0 0 0 0 0 0 0 F1 = x'y'z
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0 F2 = x'yz'
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0 F3 = x'yz
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0 F4 = xy'z'
1 1 1 0 0 0 0 0 0 0 1
F5 = xy'z

F6 = xyz'
F0
F1 F7 = xyz
X
F2
Y
3-to-8 F3
Z
Decoder F4
F5
F6
x y z
F7
 Implementing Functions Using Decoders

• Any n-variable logic function can be implemented using a single n-to-2n decoder to generate
the minterms
– OR gate forms the sum.
– The output lines of the decoder corresponding to the minterms of the function are used as
inputs to the or gate.

• Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n
decoder with m OR gates.

• Suitable when a circuit has many outputs, and each output function is expressed with few
minterms.
Implementing Functions Using Decoders
x y z C S
• Example: Full adder 0 0 0 0 0
0 0 1 0 1
S(x, y, z) = S (1,2,4,7) 0 1 0 0 1
0 1 1 1 0
C(x, y, z) = S (3,5,6,7) 1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

3-to-8 0
Decoder 1 S
2
x S2 3
y 4
S1
5 C
z S0 6
7
 Standard MSI Binary Decoders Example
74138 (3-to-8 decoder)

(a) Logic circuit.

(b) Package pin configuration.
(c) Function table.
 Building a Binary Decoder with NAND Gates

• Start with a 2-bit decoder Note: use of NANDs

only one 0 active!
– Add an enable signal (E) if E = 0
Use two 3 to 8 decoders to make 4 to 16 decoder
• Enable can also be active high
• In this example, only one decoder can be active at a time.
• x, y, z effectively select output line for w
 Encoders
• If the a decoder's output code has fewer bits than the input code, the device is
usually called an encoder.

e.g. 2n-to-n
• The simplest encoder is a 2n-to-n binary encoder
– One of 2n inputs = 1
– Output is an n-bit binary number

Binary
2n encoder n
. .
inputs . . outputs
. .
 8-to-3 Binary Encoder
At any one time, only Inputs Outputs

one input line has a value of 1. I 0 I 1 I 2 I 3 I 4 I 5 I 6 I 7 y2 y1 y0

1 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 0 0 1 0 0 0 0 0 1 1
0 0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
0 0 0 0 0 0 0 1 1 1 1
I0
I1 y2 = I4 + I5 + I6 + I7
I2
I3 y1 = I2 + I3 + I6 + I7
I4
I5
I6
y0 = I1 + I3 + I5 + I7
I7
 8-to-3 Priority Encoder
•What if more than one input line has a value of 1?
• Ignore “lower priority” inputs.
• Idle indicates that no input is a 1.
• Note that polarity of Idle is opposite.
Inputs Outputs
I0 I1 I2 I3 I4 I5 I6 I7 y2 y1 y0 Idle
0 0 0 0 0 0 0 0 x x x 1
1 0 0 0 0 0 0 0 0 0 0 0
X 1 0 0 0 0 0 0 0 0 1 0
X X 1 0 0 0 0 0 0 1 0 0
X X X 1 0 0 0 0 0 1 1 0
X X X X 1 0 0 0 1 0 0 0
X X X X X 1 0 0 1 0 1 0
X X X X X X 1 0 1 1 0 0
X X X X X X X 1 1 1 1 0
 Priority Encoder (8 to 3 encoder)
• Assign priorities to the inputs
• When more than one input are asserted, the output generates the code of the input with the highest priority
• Priority Encoder :
H7=I7 (Highest Priority)
H6=I6.I7’ Priority encoder
H5=I5.I6’.I7’ Priority Circuit Binary encoder
H4=I4.I5’.I6’.I7’
I0 I0 H0 I0
H3=I3.I4’.I5’.I6’.I7’
I1 I1 H1 I1
H2=I2.I3’.I4’.I5’.I6’.I7’
I2 I2 H2 I2 Y0
H1=I1. I2’.I3’.I4’.I5’.I6’.I7’ Y0
I3 I3 H3 I3 Y1
H0=I0.I1’. I2’.I3’.I4’.I5’.I6’.I7’ Y1
I4 I4 H4 I4 Y2
IDLE= I0’.I1’. I2’.I3’.I4’.I5’.I6’.I7’ Y2
I5 I5 H5 I5
• Encoder I6 I6 H6 I6
Y0 = I1 + I3 + I5 + I7 I7 I7 H7 I7
Y1 = I2 + I3 + I6 + I7 IDLE IDLE
Y2 = I4 + I5 + I6 + I7
 Encoder Application (Monitoring Unit)

Encoder identifies the requester and encodes the value

Controller accepts digital inputs.

Alarm Contoller
Signal Response

Machine 1

Machine 2 Machine Action

Encoder Code Controller

Machine n
Thank you