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SS Chapter 01 Introduction To A Machine Architecture

This document provides an overview of the System Software course and introduces the SIC and SIC/XE machine architectures. It describes the key components of each architecture including memory, registers, data formats, instruction formats, addressing modes, and instruction sets. Examples of SIC and SIC/XE instructions and addressing modes are also provided.
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0% found this document useful (0 votes)
40 views

SS Chapter 01 Introduction To A Machine Architecture

This document provides an overview of the System Software course and introduces the SIC and SIC/XE machine architectures. It describes the key components of each architecture including memory, registers, data formats, instruction formats, addressing modes, and instruction sets. Examples of SIC and SIC/XE instructions and addressing modes are also provided.
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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System Software

Course Code: 17ECSC302


Credits: 3
Semester: V
School of Computer Science & Engineering
Chapter 01

Introduction to a Machine
Architecture
Introduction
Practical computer systems divide software into two major classes:
1) Application Software
2) System Software

System Software:
● System software consists of a variety of programs that support
the operation of a computer .
● To study “behind the scene”
Simplified Instructional Computer (SIC)
• SIC is a hypothetical computer that includes the hardware
features most often found on real machines
• Two versions of SIC
• standard model
• extension version (XE version)
SIC Machine Architecture
Features
⮚ Memory
⮚ Register
⮚ Data Format
⮚ Instruction Format
⮚ Addressing Mode
⮚ Input/output
⮚ Instruction Set
SIC Machine Architecture
Memory
• 8-bit bytes
• 3 consecutive bytes form a word (24 bits)
• All addresses in SIC are byte addresses
• 215 bytes =32768 bytes in the computer memory
SIC Machine Architecture
• Registers
There are 5 registers all of 24 bits in length
SIC Machine Architecture
• Data Formats
• Integers are stored as 24-bit binary numbers
• 2’s complement representation is used for negative values
• 8 bit ASCII code for characters
• No floating-point hardware
SIC Machine Architecture
Instruction Formats
opcode x address
(8) (15)
• All instructions are of 24 bit format
• Addressing Modes
SIC Machine Architecture

• Instruction Set
• Data transfer group
• Arithmetic group
• Logical group
• Branch group
• Machine group
SIC Machine Architecture
• Data transfer Instructions
LDA-load data into accumulator
LDX- load data into index register
LDL-load data into linkage register
LDCH-load char into accumulator
STA-store the contents of A into the memory
STX-store the contents of X into the memory
STL-store the contents of L into the memory
STSW-store the contents of SW into the memory
SIC Machine Architecture

Arithmetic group of Instructions


• ADD
• SUB
• MUL
• DIV
• All arithmetic operations involve register A and a word
in memory, with the result being left in the register
SIC Machine Architecture
Logical group of Instructions
• AND
• OR
Both involve register A and a word in memory, with the result being
left in the register. Condition flag is not affected.
• COMP
Compares the value in register A(<,>,=) with a word in memory, this
instruction sets a condition code CC to indicate the result.
SIC Machine Architecture
Branch group of Instructions

• Conditional jump instructions


• Unconditional jump instructions
• Subroutine linkage
SIC Machine Architecture
Instruction Set
• Conditional jump instructions:
• JLT
• JEQ
• JGT
• these instructions test the setting of CC (<.=.>)and jump accordingly.
SIC Machine Architecture
Instruction Set
• Unconditional jump instructions:
• J
• This instruction without testing the setting of CC , jumps
directly to assigned memory.
SIC Machine Architecture
Subroutine linkage:
• JSUB
• JSUB jumps to the subroutine, placing the return address in register L
• ( L 🡨 PC , PC 🡨 subroutine address)
• RSUB
• RSUB returns by jumping to the address contained in register L
• ( PC 🡨 L )
SIC Machine Architecture
Input and Output
• Input and output are performed by transferring 1 byte at a time to or
from the rightmost 8 bits of register A.

• Test Device TD instruction tests whether the addressed device is


ready to send or receive a byte of data.
if CC=‘<‘ the device is ready to send or receive.
if CC=‘=‘ the device is not ready to send or receive.
SIC Machine Architecture
• Input and Output
• Read Data RD
• Data from the input device specified by the memory is
read into A lower order byte.

• Write Data WD
• Data is sent to output device specified by the memory.
SIC Machine Architecture
• Input and Output
• TIX
• Increments the content of X and compares its content with
memory
• Depending on the result the conditional flags are updated
if (X) < (m) then CC = ‘<‘
if (X) = (m) then CC = ‘=‘
if (X) > (m) then CC = ‘>‘
SIC/XE Machine Architecture
• Memory
• Memory structure is same as that for SIC.
• 220 bytes in the computer memory.
• This increase leads to a change in instruction format and
addressing modes.
SIC/XE Machine Architecture
• More Registers
SIC/XE Machine Architecture
• Data Formats
• Same data format as that of SIC
• Floating-point data type of 48 bits

s exponent (11) fraction (36)

• frac: 0~1
• exp: 0~2047
• S(0=+ve , 1=-ve)

The absolute value of the number is frac*2(exp-1024)


SIC/XE Machine Architecture
• Instruction Formats
• The instruction format of SIC/XE is modified to suit the
changes made in the hardware such as:
• Enhancing the number of address lines
• Increasing the number of registers
• Providing floating point accumulator
SIC/XE Machine Architecture
• Instruction Formats
Formats 1 and 2 are instructions that do not reference memory at all

8
Format 1 (1 op
byte)
8 4 4
Format 2 (2
bytes) op r1 r2

6 1 1 1 1 1 1 12
Format 3 (3 op n i x b p e displacement
bytes)
6 1 1 1 1 1 1 20
Format 4 (4 op n i x b p e address
bytes)
SIC/XE Machine Architecture
• The Format 3 and Format 4 instructions have 6 flag bits:-
n – indirect addressing
I – immediate addressing
x – indexed addressing
b – base relative
p – PC relative
e – (0 – Format 3 1 – Format 4)
SIC/XE Machine Architecture
Addressing modes
Base relative (n=1, i=1, b=1, p=0)
Program-counter relative (n=1, i=1, b=0, p=1)
Direct (n=1, i=1, b=0, p=0)
Immediate (n=0, i=1, x=0)
Indirect (n=1, i=0, x=0)
Indexing (both n & i = 0 or 1, x=1)
Extended (e=1)
SIC/XE Machine Architecture
● Base Relative Addressing Mode (STCH BUF,X)
n i x b p e
opcode 1 1 1 0 disp

n=1, i=1, b=1, p=0, TA=(B)+disp (0≤disp ≤4095)


● PC Relative Addressing Mode (J Next)(-ve=2’s comp
n i x b p e
opcode 1 1 0 1 disp

n=1, i=1, b=0, p=1, TA=(PC)+disp (-2048≤disp ≤2047)


SIC/XE Machine Architecture
● Direct Addressing Mode
n i x b p e
opcode 1 1 0 0 disp

n=1, i=1, b=0, p=0, TA=disp (0≤disp ≤4095)


n i x b p e
opcode 1 1 1 0 0 disp

n=1, i=1, b=0, p=0, TA=(X)+disp (with index addressing mode)


SIC/XE Machine Architecture
● Immediate Addressing Mode (ADD #30)
n i x b p e
opcode 0 1 0 disp

n=0, i=1, x=0, operand=disp

● Indirect Addressing Mode (ADD @2000)


n i x b p e
opcode 1 0 0 disp

n=1, i=0, x=0, TA=(disp)


SIC/XE Machine Architecture
● Simple Addressing Mode (LDA NUM)
n i x b p e
opcode 0 0 disp

i=0, n=0, TA=bpe+disp (SIC standard)

n i x b p e
opcode 1 1 disp

i=1, n=1, TA=disp (SIC/XE standard)


SIC/XE Machine Architecture
• Addressing Modes
SIC/XE Machine Architecture
• Addressing Modes

• Note: Indexing cannot be used with immediate or indirect addressing


modes
Solve the following examples
i.LDA #3
GivenLDA=00H

ii.+JSUB RDREC
JSUB=4B
GIVEN RDREC =1036
Solve the following examples
I. STX LENGTH

Given EA=0033,[B]=0033
EA=[B]+DISP

II. STL RETADR

Given RETADR=0030 PC=0003


We know EA=[PC]+DISP
SIC/XE Machine Architecture
• Data transfer Instructions
LDB(68)-load data into BASE register
LDS(6E)- load data into S register
LPS(D0)-load processor status
LDT(04)-load data into T register
LDF(70)-load data into F register
STB-store the contents of B into the memory
STS-store the contents of S into the memory
STL(14)-store the contents of L into the memory
STSW(E8)-store the contents of SW into the memory
SIC/XE Machine Architecture
• Instruction Set
• new registers: LDB,LDL,LDS, STB, etc.
• floating-point arithmetic: ADDF, SUBF, MULF, DIVF
• register move:data transfer from 1 reg to another reg RMO S,A (S🡪A)
• register-register arithmetic: ADDR, SUBR, MULR, DIVR
• Logical :
• COMPR A,S
• CLEAR X
• SHIFTL T,n
• SHIFTR T,n
SIC/XE Machine Architecture
• Machine group of instructions
• TIO
• To test I/O channel.
• HIO
• To halt the I/O channel.
• Channel address is provided in A register
• SIO
• To start the I/O channel.
Example of SIC/XE
instructions and addressing
modes
SIC Programming Examples (Fig 1.2a)
To store 5 in ALPHA and z in C1
SIC/XE Programming Examples
SIC Programming Example

GAMMA[I]=ALPHA[I]+BETA[I]
I=0 to 100
SIC/XE Programming Example
SIC Programming Example
to read 1 byte of data from device F1 and copy it to
device 05
SIC Programming Example
To read 100 bytes of record from an input device into memory
SIC/XE Programming Example
ANY QUESTIONS??

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