Semiconductor Physics

Dr. Louis WY LIU

B111, VGU
Periodic Table
 Basic Semiconductor Concept
• Intrinsic Silicon in 3D view

A lattice formed by valence four atoms (atoms in group IV elements)

 Bohr Model of the Silicon atom
• 14 electrons surround the nucleus;
• Electron orbits grouped in shells
• Outermost orbit contains 4 electrons –valence shell
• Atoms are arranged in crystalline lattice;
• Each pair of neighbor atoms in the lattice form a covalent
bond;
• The covalent bond consists from two electrons that orbit
around the both atoms. Each atom contributes one electron
in the pair.
• At 0K temperature all valence electrons are in bound in the
covalence bonds and the conductivity is 0.
• When the outermost shell of an atom is fully filled, that is
eight electrons, the atom reaches a so-called “noble gas”
state. In this state, it has no incentive to further participate in
 Intrinsic Semiconductor:
At non-zero absolute temperature, Si atoms get enough thermal
energy to break its covalent bonds to free up some electrons.

• At room temp, the ambient thermal energy

At absolute zero can break a bond, creating a vacancy and a
temperature, there is no free electron. Only one per 1.4×1013 bonds is
free electronics broken.
• The concentration of the free electrons is
small, about ni ≈ 1014 free electrons per cm3.
• Electrons move around by tunneling.
• The conductivity is small: semiconductor.
At non-zero absolute temperature.
• In a region where the covalent bond is broken, it forms a hole.
• At the same time, the electrons move elsewhere within the
silicon lattice to form so called free electrons.
• Holes and electrons are known as charge carriers.
• The hole density is normally denoted as pi. The electrons
density is normally denoted as ni.
• How many electrons are displaced to elsewhere depends on
the temperature.
• Due to Mass-Action law, pi = ni . This means that
pi ni = ni2 = pi2
• To make semiconductor devices, we need to
alter the density of the carriers.
• We need to increase the hole density in one
side to form a p-type semiconductor.
• We also need to increase the electron density in
another side to form a n-type semiconductor.
• When the p-type and n-type semiconductor are
in contact with each other, a PN junction is
formed.
• The freed electrons move by tunnelling across the junction.
• The newly created holes move from one co-valent bond to
another by trap and release.
• Although holes and electrons are “freed”, the whole
semiconductor device remains electrically neutral. There is no net
charge in the device.
• To increase the unpaired electron density in an
originally intrinsic silicon crystal, we need to dope
this silicon crystal with group VI elements, eg. P.
The final silicon crystal becomes N-type silicon.
• To increase the hole density in an originally
intrinsic silicon crystal, we need to dope this
silicon crystal with group IV elements, eg. B. The
final silicon crystal becomes P-type silicon.
• The silicon crystal doped with impurities is called
N-type or P-type extrinsic silicon.
 Extrinsic Semiconductor: Formation of n-type
materials by doping group IV atoms, eg. P.
• n-type silicon is created by adding valence five
atoms
 Extrinsic Semiconductor: Formation of p-type materials
by Doping B
• p-type silicon is created by adding valence three impurity
atoms.
Comparison between Electrons and Holes

• Electrons move by tunneling through the

semiconductor lattice. The movement of
electrons is in general fast. Or, the electron
mobility is high.
• Holes move by a “release and trap” process.
The movement of holes is generally slow. Or,
the hole mobility is low.
 Summary for Now
• In intrinsic semiconductor, np =ni 2
• In extrinsic p-type semiconductor, NA is normally
significantly larger than p. So, we have n(p + NA) =ni
2. Approximately, because NA >>
p ,we can rewrite this equation as
nNA =ni 2
• Similarly, in extrinsic n-type semiconductor, we have
(n + ND)p =ni 2. Or,
ND p =ni 2
Drift Current and
Diffusion Current
There are two kinds of Carrier Transport - namely, Drift
and Diffusion
Drift - Current conduction due to the applied electric field.
Ohm’s law is the product of drift current.
V = IR
R = ρl/A
E = F/Q = ma/ Q in free space.
If E is decreasing, the acceleration a is also decreasing.
In n-type semiconductor, the velocity. v = μn E
where μn is the electron mobility (typically, 1350 cm2/(VS)
E = VB/l;
where VB is the applied voltage.
The drift current is given by:
i = v A n q = μ n E A n q = μ n VB A n q / l
where l is the length.
The resistance, R = VB/i = l/ (μn A n q )
The resistivity, ρ =1/ (μn n q )
The drift current density due to electron’s mobility, J = μn E n q
In general, the drift current due to both carriers
J = (μn n + μp p ) E q
Diffusion – Current without applied
voltage.
Diffusion is defined as a movement of charge
carriers from a region of higher concentration
to a region of lower concentration.
The concentration of carriers decreases
because the opposite charges recombine.
The current density J is always proportional to
the gradient of the concentration.
J ∝ dn/dx => J = Dn q dn/dx ,
Where Dn is the diffusivity of electrons
In general,
J = (Dn dn/dx - Dp dp/dx )q
Dn and Dp are respectively 34 cm2/s and 12
cm2/s
 Einstein’s Relation which
correlates diffusion to drift:
•  

where
K is the Boltzmann constant: K =1.38064852 × 10-23 m2 kg s-
2 K-1

T is the absolute temperature

q is the electron charge. q=1.60217662 × 10-19 coulombs
KT/q is known as thermal voltage, VT. VT=26 mV at room
temperature.
PN Junction
Basic Structure of a PN Diode

A diode is formed by
joining a p-type
semiconducting material
and a n-type
semiconducting material.

The PN junction refers to

the interface between
these two materials.
 Cross-sectional View of Diode in CMOS
Technology
• p+ is the highly
doped p-type
region.
• The actual p-n
junction is formed
between the p+
region and the n-
well.
 Unbiased PN Diode

• Some electrons and holes

diffuse across the junction
interface.
• This diffusion causes
surplus positive charge in
the n-type region….
• And surplus negative
charge in the p-type region.
• The surplus positive and
negative contribute a
volume known as depletion
region.
• In this depletion, a very
strong electric field is
formed just to oppose the
diffusion current.
 Solving for the Depletion Region
• The maximum electric field occurs right at the interface between the p- and n-type
material in a way to oppose the diffusion current.
• Further, we know that the electric field lines must be continuous across the
interface, such the electric field in the p-type side and the n-type side must equal
each other at the interface or when x = 0. Putting x = 0 in the above equation for
electric field and setting the two values of E equal to each other gives: NAxp = NDxn.

(Left) Doping concentration in a pn junction. The dotted lines are the actual net charge
density (the tails are exaggerated) and the solid line represents the assumed charge
density in the depletion approximation.
(Right) The electric field in a pn junction.
 Built-in Potential
• unbiased
In
  equilibrium, the following condition always holds:
1. Diffusion current of electrons = Drift current of electrons.
2. Diffusion current of holes = Drift current of holes.
Consider just the holes only:
-Dp dp/dx q = μp p E q

The integral term on the right is the potential from xp to xn.

where Vj is the built-in junction potential given by

Vj = V(xp) – V(xn)
 Class Exercises
• Is there any electric field outside the depletion
region? Ans: By Gauss’s Law, the answer is NO.
• If NA and ND are on the order of 1016 and 1016
respectively. The intrinsic density is 1010. What
is the junction potential? Ans: VT = 26mV
ln(1016 x 1016/1020)= 720mV
• Vj is a localized value. It cannot be directly
measured.
Derivation of Maximum
Potential Right at the
Junction
We are going to use the following formula to
work out the electric field.
 Derivation of Maximum Electric field at
the PN junction

The electric field in the p side is:

The electric field in the n side is:

Right at the junction, where x=0, we

have:
Derivation of Depletion
Width
•  
Since
Considering the area of the triangle in the E against x graph:
(xn+xp) qNAXp/(2ε) = Vj ---- (1)
(xn+xp) qNDXn/(2ε) = Vj ---- (2)
Rewriting (1) and (2):
(xnXp+xp2) = 2ε Vj /(qNA) ---- (3)
(xnXp+xn2) = 2ε Vj /(qND) ---- (4)
Adding (3) and (4) together:
(xn+ xp)2 = 2ε Vj /q(1/NA+1/ND)
The depletion width at zero bias is:

The volume charge in p-side of the depletion region should be equal to the
volume charge in the n-side of the depletion region. Therefore,

qAND xn = q ANA xp , or ND/NA =xp/xn

ND/(NA+ND) = xp/(xP+xn)= xp/Wd0.

 Depletion width under a reverse bias
•Under
  a reverse bias, the depletion width
becomes:

Where Va is the applied voltage. If the bias is

reverse, then Va should be negative. Likewise,
Summary: Width of the Depletion Region
Junction Capacitance
 Junction Capacitance under Reverse Bias
•The
  junction capacitance per unit cross-sectional
area can be derived using the expression for the
parallel plate capacitance.
Under zero bias:

Or

Under a reverse bias:

Where Va is the applied voltage.

 Expressing Cj in terms of Cj0
• -----
  (1)

= -- (2)
(2)/(1):
Graphical Illustration of Junction Capacitance
of IN4148 under a Reverse Bias
 What happens when the diode is under
reverse bias?
• External reverse bias adds to the built-in potential of the pn junction.
• The shaded regions below illustrate the increase in the characteristics of the
space charge region due to an externally applied reverse bias, vD.
•

Homework
Useful Formula
1/ Find built-in potential and depletion-region width for a given diode
Given data: On p-type side: NA = 1017/cm3; On n-type side: ND =
1020/cm3
Assumptions: Room-temperature operation with VT = 0.025 V

Answer:
 Exercise 1: Job Interview Questions

1. Define p-n junction.

The contact surface between the layers of p-type and n-type semiconductor pieces plated
together so as to form a p-n junction is called the p-n junction.

2. Define p-n junction diode.

P-n junction diode is the two terminal device, which allows the electric current in one
direction and blocks in another direction.

3. List various applications of diodes.

The various applications of diodes include rectification, regulating voltage,etc.

4. Define zero bias p-n junction diode.

The p-n junction diode in which no voltage is applied is called zero bias p-n junction diode.

5. Define barrier voltage.

Barrier voltage is the voltage or electric field build near the p-n junction, which prevents the
electric current through the semiconductor.
6. Define depletion region.
Depletion region is the region present near the p-n junction where no mobile charge carriers are present.

7. Define biasing of diode.

The process of applying voltage across the p-n junction diode is called biasing of diode.

8. Define forward voltage.

If the voltage is applied across the diode in such a way that, the positive terminal of the battery is connected to the
p-type semiconductor and the negative terminal of the battery is connected to the n-type semiconductor, the diode
is said to be forward biased.

9. Define reverse voltage.

If the voltage is applied across the diode in such a way that, the positive terminal of the battery is connected to the
n-type semiconductor and the negative terminal of the battery is connected to the p-type semiconductor, the diode
is said to be reverse biased.

10. A p-n junction diode allows electric current only in

Forward bias
11. What is the forward biased voltage for silicon?
0.7 volts

12. What is the forward biased voltage for germanium?

0.3 volts

13. Explain what are the two mechanisms of breakdown in p-n junction.
Avalanche and Zener breakdown

14. Name the breakdown mechanism in a lightly doped p-n junction under reverse biased condition.
Avalanche breakdown.

15. Name the breakdown mechanism in a highly doped p-n junction under reverse biased condition.
Avalanche breakdown.

16. Why is germanium more temperature dependent than silicon?

Because the reverse saturation current in case of a germanium diode is approximately 1000 times larger.
11. What is the forward biased voltage for silicon?
0.7 volts

12. What is the forward biased voltage for germanium?

0.3 volts

13. Explain what are the two mechanisms of breakdown in p-n junction.
Avalanche and Zener breakdown

14. Name the breakdown mechanism in a lightly doped p-n junction under reverse biased condition.
Avalanche breakdown.

15. Name the breakdown mechanism in a highly doped p-n junction under reverse biased condition.
Avalanche breakdown.

16. Why is germanium more temperature dependent than silicon?

Because the reverse saturation current in case of a germanium diode is approximately 1000 times larger.
 Q1
Consider an abrupt p-n diode with Na = 1018 cm-3
and Nd = 1016 cm-3. Calculate the junction
capacitance at zero bias. The diode area equals
10-4 cm2. Repeat the problem while treating the
diode as a one-sided diode and calculate the
relative error.
Ans: 3.17 pF
 Q2
Find built-in potential and depletion-region width for a given diode
Given data: On p-type side: NA = 1017/cm3; On n-type side: ND =
1020/cm3
Assumptions: Room-temperature operation with VT = 0.025 V

Answer: 0.979 V; 0.113 um

 Q3
An abrupt silicon (ni = 1010 cm-3) p-n junction consists of a p-
type region containing 1016 cm-3 acceptors and an n-type
region containing 5 x 1016 cm-3 donors.
a) Calculate the built-in potential of this p-n junction. (Ans:
0.76V)
b) Calculate the total width of the depletion region if the
applied voltage Va equals 0, 0.5 and -2.5 V. (Ans: 0.315um,
0.413um, 0.703um)
c) Calculate maximum electric field in the depletion region at
0, 0.5 and -2.5 V. (Ans: Emax=40kV/cm, 18KV/cm, 89kV/cm)
d) Calculate the potential across the depletion region in the n-
type semiconductor at 0, 0.5 and -2.5 V. (Ans: 0.105V, 0.0216V,
0.522V)
 Q4
• A P+N junction has a built in potential of 0.8
volts. The depletion layer width at the reverse
bias of 1.2 volts is 2um. For a reverse bias 7.2
volts, what is the depletion layer width? (Ans:
4um)
 Q5
• Consider a silicon pn junction at room
temperature doped at NA=10 16/cm3 in the p-
region and ND=1017/cm3 in the n-region.
Intrinsic carrier density is 1.5x1010/cm3.
Calculate the width of the depletion region.
(Ans: Wd=0.329 um)
 Q6

Draw the cross-sectional diagram of a

p-n diode implemented in a typical
CMOS VLSI process.