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Analog Comparator: PE2 PE3

The analog comparator compares the voltage on pin PE2 to that on pin PE3. When the voltage on PE2 exceeds PE3, the comparator output goes high. This output can trigger the input capture register on timer 1 or cause an interrupt on rising or falling edges. The comparator is controlled using the SFIOR and ACSR registers.

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Arup Nayak
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64 views

Analog Comparator: PE2 PE3

The analog comparator compares the voltage on pin PE2 to that on pin PE3. When the voltage on PE2 exceeds PE3, the comparator output goes high. This output can trigger the input capture register on timer 1 or cause an interrupt on rising or falling edges. The comparator is controlled using the SFIOR and ACSR registers.

Uploaded by

Arup Nayak
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Analog Comparator

An analog comparator is available on pins PE2(AIN0), PE3(AIN1)

The comparator operates like any other comparator.


-when (+) exceeds (-) input, output goes logic “1”

The comparator's output change can:


-trigger the input capture register (ICR1) on TCNT1
-cause an interrupt triggered on rising AND/OR falling edges

(1.26V)

PE2

PE3
Analog Comparator
Analog comparator controlled with two registers SFIOR and ACSR

analog comparator mux enable:


If ADC is off, it allows the comparator to use the ADC input mux.
This would allow selecting among many inputs instead of one.

(1.26V)

PE2

PE3
Analog Comparator
Analog Comparator Control and Status Register (ACSR)

analog comparator interrupt mode select:


00 : interrupt on output toggle
01 : reserved
10 : interrupt on falling edge
11 : interrupt on rising edge

analog comparator disable: If set, comparator is off


analog comparator bandgap select: If set, bandgap
voltage is applied to non-inverting comparator input
analog comparator output:
analog comparator interrupt flag: Set when comparator triggers an
interrupt event. Cleared by ISR or writing a logic one to the bit.
analog comparator interrupt enable: If global interrupt enable is set, when
comparator can trigger an interrupt.
analog comparator input capture enable: When set, allows comparator to trigger
input capture register
Bandgap Voltage Reference
An internal bandgap voltage reference is available on the Atmega128.

Output is typically 1.23 Volts. (quite accurate, see datasheet)

The 2.56 volt internal reference is generated from this reference.

Its used by the brownout detection circuitry and optionally by ADC or comparator.

It is only enabled when one of the below is true:


-brownout detection is enabled
-bandgap reference is connected to the analog comparator
-when the ADC is enabled

Bandgap reference takes 70uS max to startup.


-can be a power consumption issue
Analog to Digital Converter (ADC)
Analog to Digital Converter

-10-bit successive approximation ADC


-13-260uS conversion time
-8 multiplexed single ended input channels
-7 differential input channels
-2 differential input channels with optional gain of 10x or 200x
-Ground to Vcc input voltage range
-Reference voltage of 2.56V or external AVcc
-Interrupt on conversion complete
ADC
Analog to Digital Converter

PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
ADC
ADC Power Connections

Circuit on mega128 board


Atmel suggested circuit

To keep the digital noise out of the ADC circuitry, it is given its own
power supply pin. This pin has extra decoupling circuitry.

AVCC can also be used as the reference voltage to the ADC.


ADC
ADC operation
Setup involves:
-choose a reference voltage (usually AVCC)
-select input channel via the input multiplexer
-enable interrupts if necessary
-enable ADC

The reference voltage determines


-the maximum input voltage that should be applied to the ADC input
-the smallest voltage that can be resolved by the ADC

We use AVCC (5V) for the ADC reference.


-maximum input should not exceed 5V (electrical and s/w reasons!)
-input voltage resolution is (5/1024) = .00488 volts
-0 volts gives ADC output of 0x0000
-5 volts gives ADC output of 0x03FF
ADC
ADC operation
Starting a conversion:
-Single conversion mode:
-Write logic one to Start Conversion bit (ADSC) in ADCSRA
-Bit stays one while doing conversion , clears when done
-Free Running mode:
-Set free running bit (ADFR) in ADCSRA
-First conversion started by writing logic one to ADSC bit
-Conversions continue regardless of state of ADC interrupt
bit (ADIF) is cleared or not.
ADC
ADC operation (cont.)
ADC completion:
-When ADIF bit in ADCSRA goes logic one
-ADIF is cleared by ISR or by writing a one to it.

Getting the results:


-ADLAR bit in ADCSRA controls presentation of data
-If ADLAR=0 data is right justified in the ADC data registers
-If ADLAR=1 data is left justified

Data registers
-ADCH and ADCL
-Accessed together as ADCW (16-bit access)
-Only need 8-bits?.....,
-left justify, read ADCH, and throw away 2 bits of precision
ADC
ADC clock input
Successive approximation conversion requires a input clock.

Clock is derived from internal CPU clock


-7-bit prescaler provides outputs at
-clk/2, clk/4, clk/8, clk/16, clk/32, clk/64, clk/128

Required clock speed is between 50khz to 200khz depending on resolution.

Normal conversion takes 13 clock cycles.

First conversion takes 25 clock cycles for analog circuitry initialization.

To stay under 200khz, must divide 16Mhz clock by 128, giving 125khz
ADC clock.

For a 13 cycle conversion, 13 * (1/125000) = 104uS per conversion


ADC
ADC registers
-ADC Multiplexer Selection Register (ADMUX)

reference selection: Selects ADC reference


ADC left adjust result: If set, result is left adjusted
analog channel and gain selection:

For our project, use AVCC (5V) as the reference, REFS1,0 = 01


ADC
ADC registers
-ADC Multiplexer Selection Register (ADCSRA)

ADC Enable: Enables ADC operation


ADC Start Conversion: Set to one to start conversions
ADC Free Running Select: When set, operate free running
ADC Interrupt Flag: Set, when conversion complete
ADC Interrupt Enable: When set, interrupts are enabled
ADC Prescaler Select: select clock division ratio
ADC
ADC registers
-ADC Data Registers (ADCL) and (ADCH)

ADLAR=0
(right justified)

ADLAR=1
(left justified)
ADC
ADC Noise Canceler
-Power-down mode to reduce CPU core digital noise
-MCU Control Register (MCUCR) controls power management
-MCUCR sleep mode bits will cause CPU to enter noise reduction mode
-Stops CPU, I/O clocks, and memory clocks

To use:
-ADC enabled, single conversion mode, interrupts on
-Enter noise reduction mode via MCUCR register (SM2-0 = 001)
-When conversion is done, interrupt wakes up CPU and
ISR(ADC_vect) is executed

Note: Other interrupts can wake up CPU from noise reduction mode
before the ADC conversion is completed.
ADC
ADC as a Voltmeter div_t declares a structure with 2 members:
int main()
.quot and .rem
{
//initialize the SPI port and then the LCD
spi_init();
In this example, fp_adc_result and fp_low_result
lcd_init(); are declared as type div_t.
clear_display();

//Initialize ADC and its ports The operation div(a,b) computes the value a/b and
DDRF &= ~(0x80); //port F bit 7 is ADC input returns the quotient and remainder in .quot and .rem.
PORTF &= ~(0x80); //port F bit 7 pullups are off

//use AVCC as vref, right justify, single-ended PORTF bit 7


ADMUX |= (1<<REFS0) | (1<<MUX2) | (1<<MUX1) | (1<<MUX0);
//ADC enabled, don't start yet, single shot mode, run at 125khz
ADCSRA |= (1<<ADEN) | (1<<ADPS2) | (1<<ADPS1) | (1<<ADPS0);

while(1){
ADCSRA |= 0x40; //poke ADSC and start conversion
while(bit_is_clear(ADCSRA, ADIF)); //spin while interrupt flag not set
ADCSRA |= (1 << ADIF); //its done, clear flag by writing a one
adc_result = ADCW; //read the ADC output as 16 bits

//determine Vin, where Vin = (adc_result/204.8)


fp_adc_result = div(adc_result, 205); //do division by 205 (204.8 to be exact)
itoa(fp_adc_result.quot, lcd_str_h, 10); //convert non-fractional part to ascii string
fp_low_result = div((fp_adc_result.rem*100), 205); //get fraction into non-fractional form
itoa(fp_low_result.quot, lcd_str_l, 10); //convert fractional part to ascii string

//send string to LCD


string2lcd(lcd_str_h); //write upper half
char2lcd('.'); //write decimal point
string2lcd(lcd_str_l); //write lower half

for(i=0;i<=10;i++){_delay_ms(10);}
clear_display();
cursor_home();
} //while
}//main

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