Introduction to Programmable

Logic Devices and FPGAs

- By Sparsh Sharma
11815030 EC-2

This Photo by Unknown author is licensed under CC BY-SA.

Outline
• History
• Introduction and Overview
• Advantages Of FPGA
• Architecture 
• SRAM based programming
• Anti-fuse based Programming
• FPGA Design Flow
• Hardware Description Languages
• Popular FPGA Vendors
• Recent Market Trends
 History of Programmable Logic Devices

Programmable Logic Devices PLDs are the integrated circuits. They contain an array of AND gates & another
array of OR gates. There are three kinds of PLDs based on the type of arrays, which has programmable
feature. PLDs can be used to realize ant kind of digital circuit.
• Programmable Read Only Memory: Have address lines as input and data lines as output. It is now obsolete
for hardware programming.
• Programmable Array Logic: It consists of Programmable AND gate followed by fixed OR gate.
• Programmable Logic Array: Programmable AND gate followed by Programmable OR gates, giving SOP
output

• DRAWBACK: Logic plane structure increases rapidly (exponentially) with increasing number of inputs. They
were also inefficient when it comes to design sequential logic .
FPGA Overview

• A  field  programmable  gate  array

 (FPGA)  is  a  Programmable  Logic 
Device(PLD)  with  higher  densities  and 
capable of implementing various functions
in a short period of time with high
performance.
• It involves 2D array of logic blocks and flip­
flops with programmable
interconnections.  
• User can configure Intersections between t
he logic blocks and function of each block,
providing more flexibility as compared to
earlier PLDs. 
 FPGA Advantages

Manufacturing cycle for ASIC is very costly,  lengthy and engages lots of manpower 
 Mistakes not detected at design time have large  impact on development time and cost 
 FPGAs are perfect for rapid prototyping of digital  circuits and have easy upgrades like in case of software 
Are used in unique applications reconfigurable computing
Have comparatively short time to market
Have a simpler design flow than ASICs and are beginner-friendly.
FPGA Architecture 

LOGIC BLOCKS
• The purpose of logic blocks is to  implement
combinational and sequential logic 
functions. 
• Logic blocks can be implemented by Transisto
r pairs, basic small gates such as two
input  NAND’s or  X­OR’ s, Multiplexers,
Look up tables( LUT) and Wide fan­
in AND­/OR structure
• These programmable logic blocks are
repeated inside FPGA, each of which can be
programmed differently to perform any logic
operation.
FPGA Architecture 

PROGRAMMABLE INTERCONNECTS
• The interconnects between various logic blocks can be
programmed (connected / disconnected), allowing the
designer to implement a certain logic. The switch matrix
shown alongside is a multiplexing configuration that can
be programmed to select bus connections.
• This switching action is provided in following ways for
SRAM based programming:
 Pass-Transistors
 Multiplexers
 Transmission Gates
FPGA Architecture 

IO BLOCKS
 The Input-output blocks appear as storage elements.
These blocks provide an I/O interface for FPGA chip with
external board elements.
 Note that each pad can behave as input or output. The
data can be transferred either directly or via D flop, using
a MUXing network, the select line of which is output
enable.
 IO block can work in synchronous set/reset mode and
asynchronous set/reset mode.
FPGA Architecture 
Additional Features
• Block RAM: 
Block RAM is discrete part of FPGA. It is used to store large
amount of data inside FPGA, which would be stored otherwise
outside of it. Normally 16/32-bit size RAM blocks are available
and have customizable width.
• DSP Unit:
Digital Signal Processing units are also now in-built in modern
FPGAs,allowing the designer to deploy complex algorithms on
hardware itself, in a very cost-efficient manner. In the high-end
sector, enormous arithmetic power can be housed in a tiny area
by integrating four DSP units on the same FPGA
• Arithmetic Resources:
These blocks have predefined standard functions implement
inside them, such as adder, multiplier, counter etc. ,which allow
the designer to directly use them
SRAM based Programming

Programming the Logic Blocks

Configuring Logic Blocks with Look-up Table is
practiced by most FPGA vendors, involving Xilinx
and Altera.
The table comprises of 1 bit SRAM cells that can
hold either of two values: a 1 or a 0. Along with
these memory cells are multiplexers. The select
lines of the MUX controls the data to be accessed. 

The Logic block takes data either from LUT or a flip

placed in it, depending on whether previous cycle
data or current data is required. Figure alongside
shows a basic configuration of FPGA block.
SRAM based Programming
Programming the Interconnects:

SRAM cells are the basic cells used for SRAM‐based

FPGA. These cells are scattered throughout the
design in form of an array and mainly used to
program: (1) the routing interconnects of FPGAs
and (2) configurable logic blocks (CLBs) that are
used to implement logic functions. 
SRAM‐based programming technology has become
the dominant approach for FPGAs because of its
reprogrammability and the use of standard CMOS
process technology, which results in larger package
density and higher speed.

Figure shown alongside explains how SRAMs are

used for switching purposes with multiplexer and
pass transistors inside switch matrix.
Anti-fuse based Programming
• Anti-fuse based programming involves using anti-fuses to connect/disconnect the links. These are one-
time programmable.  By default, the fuse is in high impedance state.
• When high voltage is applied across silicon substrate, The metal layers begin to join to form a conductive
path. Now this link is in ON state and cannot be reversed.
• The applications of FPGA that support One-time programming involve the cases where these are
deployed as part of product itself, rather than in functional testing.
 • SRAM based FPGAs occupy • Anti-fuse occupy
SRAM v/s more area, as each unit is comparatively very less
Anti-fuse composed of 6 mos
transistors
area
• Provide very less delay
• Provide more delay
• Can be programmed only
• Can be programmed more once, therefore is of
than once, so are ideally limited use only
suited for design verification • MicroChip produces anti-
• Xilinx and Altera provide fuse FPGAs
SRAM FPGAs 
FPGA Design Flow
FPGA Design Flow
• Design Entry:
Writing RTL description for given specification. This may be done using any HDL or
schemetic viewer provided by vendors.  The RTL is then synthesized to a gate level
netlist that could be mapped to actual hardware.

• Design Implementation:
This involves transforming netlist into a format that FPGA can use. This involves
following steps:
Partitioning: This process involves dividing the netlist into blocks that can be directly
mapped to FPGA  logic blocks.
Place and Route: PLacing involves selecting a  particular set of logic blocks that will be
used. Routing involve decision making regarding the intercinnecting paths for above
selected logic blocks, in order to minimize the delay.
A bit-stream file is generated after above steps that specify the loading pattern of
SRAMs for give logic.
FPGA Design Flow
• Design Verification
Design verification is performed at each step,in order to make sure that the design
outputs desired signals with respect to applied stimulus.
Various simulators such as modelSim and GTKWave are available to do so.
Some tools also provide a means of performing Static Timing Analysis, which involves
the designer to rectify setup and hold violtions, if any.
After performing all the above processes, the design is finally loaded into FPGA to
anayze its performance on silicon.
                    VHDL                                               Verilog

• VHDL was developed by US • Phil Morbey developed

Hardware department of Defense in verilog in 1985.
Description 1980s
•  VHDL is a strongly typed • It is a loosely typed
Languages language, which means that
each data type (integer,
language .It is more of a
hardware modelling
character, or etc.) has been
language that require few
predefined by the language
lines of code.
itself.
• It is more like C language. 
• It is more verbose than
verilog and has non-C like
syntax.
Popular FPGA vendors
• Xilinx: The leader in FPGAs for many years, Xilinx has a good range of
FPGAs in terms of cost and performance. In recent years, the popular
Spartan series has covered the low-to-mid-end market while the Virtex
series has covered the high-end.  Most recent boards involve 28nm
fabrication standards. (Market Share: 49%)
• Altera: The Altera FPGAs cover the low, mid and upper end markets
with the Cyclone, Arria and Stratix series, respectively. The most recent
offering from Altera is the Cyclone-V, Arria-V and Stratix-V, all build on
28-nm process technology. (Market Share 40%)
• Lattice: Lattice Semiconductor tackles the low-power and low-cost
market for FPGAs. They market their products as the “high-value
FPGAs” of the industry, providing best performance per cost. (Market
Share 6%)
FPGA trends
• The Field Programmable Gate Array (FPGA)
industry is expected to grow in the coming
years as more military and aerospace
applications, such as waveform generation,
image processing, and secure communication,
adopt FPGAs.
• Demand for FPGA is expected to increase due
to increased adoption in areas such as
security, network processing, and Deep
Packet Inspection (DPI).
• The modern FPGAs come with advanced
technologies and support for high computing
speeds, more connectivity options, high-
security features, and high bandwidth
support.
• Despite their technical advancements, FPGA
designs are 35 times bigger, 3.5 times slower,
and use 14 times more power than ASIC
designs. As a result, FPGAs are only used in
low-volume applications.