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EEE 4706 Microcontroller Based System Design Lab Presentation 2 1

This document describes a digital clock project created by a team of five students for their EEE 4706 Microcontroller Based System Design Lab course. It provides the names and contributions of each team member, including coding, presentation, and Proteus work. It also includes algorithms, circuit diagrams, and code in MIDE-51 for displaying the time on a seven segment display using a microcontroller.

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muftibinhabib
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41 views

EEE 4706 Microcontroller Based System Design Lab Presentation 2 1

This document describes a digital clock project created by a team of five students for their EEE 4706 Microcontroller Based System Design Lab course. It provides the names and contributions of each team member, including coding, presentation, and Proteus work. It also includes algorithms, circuit diagrams, and code in MIDE-51 for displaying the time on a seven segment display using a microcontroller.

Uploaded by

muftibinhabib
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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EEE 4706 (Microcontroller

Based System Design Lab)


Seven Segment Display Digital Clock Project
Teammates

Sadia Siraz (170021097, C2)

Mufti Bin habib (170021150, c2)

Talha bin nizam (170021140, c2)

Imtihan ahmed (170021025, c2)

Mohaman djibrila (170021180, c2)


Personal Contributions

Sadia Siraz (170021097, C2) : coding

Mufti Bin habib (170021150, c2) : Coding

Talha bin nizam (170021140, c2) : Presentation

Imtihan ahmed (170021025, c2) : PRESENTATION

Mohaman djibrila (170021180, c2) : PROTEUS


Algorithm for Digital Clock

Check Use delays


Use MOV whether 24th in between
Display Use the hour is
DPTR to Clear the accumulator
digits accumulator going on, if
move data Registers ’s process of
according to to display yes reset the
for being used displaying
seconds, digit process , if
individual for digit so that all
minutes & according to no continue
digits display the digits
hours Register displaying can be seen
digits as properly
usual.
Digital Clock Circuit Diagram
Second check
Minute check
Hour check
CODE IN MIDE-51

ORG 00H INC R1 Lookup Table (MYDATA)


MOV DPTR,#MYDATA CJNE R1, #06D,
DISPLAY Address Hex A B C D E F G P/h
START: MOV R1, #00H port P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7
MOV R0,#00H INC R2 1
MOV R1, #00H CJNE R2, #10D, 300H 40H 0 0 0 0 0 0 1 0
MOV R2, #00H DISPLAY
301H 79H 1 0 0 1 1 1 1 0
MOV R3, #00H MOV R2, #00H
MOV R4, #00H INC R3 302H 24H 0 0 1 0 0 1 0 0
MOV R5, #00H CJNE R3, #06D, 303H 30H 0 0 0 0 1 1 0 0
DISPLAY 304H 19H 1 0 0 1 1 0 0 0
DISPLAY: MOV R3, #00H 305H 12H 0 1 0 0 1 0 0 0
ACALL SHOW INC R4
306H 02H 0 1 0 0 0 0 0 0
CJNE R4, #10D,
Back : DISPLAY 307H 78H 0 0 0 1 1 1 1 0
INC R0 MOV R4, #00H 308H 0H 0 0 0 0 0 0 0 0
CJNE R0, #10D, DISPLAY INC R5 309H 10H 0 0 0 0 1 0 0 0
CJNE R5, #03D,
MOV R0, #00H DISPLAY
SJMP START
REPEAT: SETB P2.2 ACALL DELAY
MOV A,R0 SETB P2.5
MOVC A,@A+DPTR MOV A, R3
CLR P2.0 MOVC A, @A+DPTR CJNE R5, #02D, NOCHK ; (if 24hr,
MOV P1,A CLR P2.3 RESET)
ACALL DELAY MOV P1, A CJNE R4, #04D,NOCHK
SETB P2.0 ACALL DELAY SJMP START
SETB P2.3 NOCHK:
MOV A, R1 DJNZ R7,REPEAT
MOVC A, @A+DPTR MOV A, R4 RET
CLR P2.1 MOVC A, @A+DPTR
MOV P1, A CLR P2.4 DELAY:
ACALL DELAY MOV P1, A MOV R6,#3FH
SETB P2.1 ACALL DELAY AGAIN2: MOV B,#3FH
SETB P2.4 AGAIN1: DJNZ B, AGAIN1
MOV A, R2 DJNZ R6, AGAIN2
MOVC A, @A+DPTR MOV A, R5 RET
CLR P2.2 MOVC A, @A+DPTR
MOV P1, A CLR P2.5 ORG 300H
ACALL DELAY MOV P1, A MYDATA: DB
40H,79H,24H,30H,19H,12H,02H,78H,
0H,10H
END
THE END
Assalamu Alaikum

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