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Chapter 5

To reset PC5: B2 = 1 B1 = 0 B0 = 1 Control word = 0A (hex) To set PC2: B2 = 0 B1 = 1 B0 = 0 Control word = 05 (hex)
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0% found this document useful (0 votes)
219 views

Chapter 5

To reset PC5: B2 = 1 B1 = 0 B0 = 1 Control word = 0A (hex) To set PC2: B2 = 0 B1 = 1 B0 = 0 Control word = 05 (hex)
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Chapter 5

Outlines
 Programmable Peripheral Interface
(8255 PPI)
 Pin diagram of 8255
 Signals of 8085
 Block diagram of 8255
 Modes of Operation of 8255

1
Parallel communication interface
INTEL 8255

2
8255 PPI

• The 8255 chip is also called as Programmable


Peripheral Interface.
• The Intel’s 8255 is designed for use with Intel’s 8-bit, 16-bit
and higher capability microprocessors
• The 8255 is a 40 pin integrated circuit (IC), designed to
perform a variety of interface functions in a computer
environment.
• It is flexible and economical.

3
8255 PPI

• The 8255 is a programmable peripheral interface device


designed for use in Intel microcomputer systems.
• Its function is that of a general purpose I/O component to
interface peripheral equipment to the microcomputer system
bus.
• The functional configuration of the 8255 is programmed by
the system software so that normally no external logic is
4
8255 PPI
Intel 8255A is a general purpose parallel I/O interface.

The peripheral devices are slower than the microprocessor.


PPI makes an inter-relation between microprocessor


• and peripheral
devices.

It provides three I/O port (Port A, Port B and Port C)


5
PIN DIAGRAM OF 8255

6
Signals of 8085

To/Fro To/Fro
m I/O
m devices
CPU

7
8255 PIO/PPI
 It has 24 input/output lines which may be individually programmed.

 3 ports(each port has 8 bit)

Port A lines are identified by symbols PA0-PA7 Port B lines are identified
by symbols PB0-PB7 Port C lines are identified by PC0-PC7 , PC3-PC0

ie: PORT C UPPER(PC7-PC4) , PORT C LOWER(PC3-PC0)

 2 groups of I/O pins are named as


Group A (Port-A & Port C
Upper) Group B (Port-B & Port C 8
• PA0-PA7:
o These are eight port A bi-
directional I/O lines that acts as either
output or input lines depending upon
the control word loaded into the
control word register.
PB0-PB7:Similar to PA
PC0-PC7:
o 8-bit bidirectional I/O pins. These lines are
divided into two groups.
PC0 to PC3 (Lower Group)
PC4 to PC7 (Higher
group)
o Can be used
signals for generation
in mode 1 or mode 2of 9
D0 - D7: data input/output lines for the device. All information
read from and written to the 8255 occurs via these 8 data
lines.

CS (Chip Select). If this line is a logical 0, the


microprocessor can read and write to the 8255.

RESET : The 8255 is placed into its reset state if this


input line is a logical 1

10
• RD :
o
This is the input line driven by the
microprocessor and this line should be low to
indicate read operation to 8255.
• WR :
o
This is an input line driven by the
microprocessor. A low on this line
indicates write operation.
• A1-A0 :
o
These are the address input lines and
are driven by the microprocessor. These
lines indicates the port address (one of the 3
ports) 11
Control Logic
 CS signal is the master Chip Select
 A0 and A1 specify one of the two I/O Ports
CS A1 A0 Selected
0 0 0 Port A
0 0 1 Port B
0 1 0 Port C
0 1 1 Control

Register
1 X X 8255 is not
selected
12
Block Diagram of 8255A

13
Block Diagram of 8255 (Architecture)

 It has a 40 pins of 4 parts.

1. Data bus buffer

2. Read/Write control logic

3. Group A and Group B controls

4. Port A, B and C

14
1. Data bus buffer

•This is a tristate bidirectional buffer used to interface the 8255 to system


data bus.
•Data is transmitted or received by the buffer on execution of input or
output instruction by the CPU.
•Control word and status information are also transferred through this unit.

15
2. Read/Write control logic
• This unit accepts control signals ( RD, WR ) and also inputs from
address bus and issues commands to individual group of control blocks (
Group A, Group B).

 It has the following pins.

• CS( Chip select) -A low on this pin enables communication


between CPU and 8255
• RD (Read) - A low on this pin allows enables the CPU to read the
data in the ports or the status word through data bus buffer.
16
2. Read/Write control logic
 It has the following pins.
• WR (Write): A low on this pin, the CPU can write data on to the ports or
to the control register through the data bus buffer.
• RESET – A high on this pin clears the control register and all ports are set
the input mode.
• A1 and A0 (Address Pins) – These pins in conjunction with RD and WR
pins control the selection of one of the 3 ports.

17
2. Read/Write control logic
A1 and A0 (Address Pins) – These pins in conjunction with RD and WR pins
control the selection of one of the 3 ports.

18
2. Read/Write control logic

19
3. Group A and Group B controls

• These block receive control from the CPU and issues commands to their
respective ports.

Group A - PA and PCU ( PC7 –PC4)

Group B – PB and PCL ( PC3 –PC0)

20
4. Port A, B and C
Port A, Port B & Port C

a)Port A: This has an 8 bit latched/buffered O/P and 8 bit input latch. It can be
programmed in 3 modes –mode 0, mode 1, mode 2.

b)Port B: It can be programmed in mode 0,mode1

c)Port C: This port can be divided into two 4 bit ports and can be used as control
signals for port A and port B. It can be programmed in mode 0

21
Modes of Operation of 8255

•Depends on D7 of the Control Word

1.Bit Set/Reset(BSR) Mode (D7 = 0)


•used to set or reset the bits in port C

2.I/O Mode (D7 = 1)


•Control Word is an 8-bit data that stored in control register. Control
words are 2 types: a) BSR Control Word, b) Mode definition Control
Word
22
Modes of Operation of 8255
Control Word is an 8-bit data that stored in control register.
Control words are 2 types: a) BSR Control Word, b) Mode definition
Control Word

23
24
Modes of Operation of 8255

1. Bit Set/Reset(BSR) Mode


• If bit 7 of control word is a logic 0 then 8255 will be configured
as Bit SET RESET (BSR) mode
• Only port C (PC0-PC7) can be used to set or reset its individual
port bits depending D0 of the control word.
o Set/Reset bits in Port C

25
1.BSR Mode
SET (S): D0
NB: Don’t Cares are can be set as Zero or =1
One Reset (R): D0
=0

26
Bit/pin of port C
B3 B2 B1
selected
0 0 0 PC0
0 0 1 PC1
0 1 0 PC2
0 1 1 PC3
1 0 0 PC4
1 0 1 PC5
1 1 0 PC6
1 1 1 PC7

Concerned only with the 8-bits of Port C. Set or Reset by


control word
Ports A and B are not affected 27
Modes of Operation of 8255
1. Bit Set/Reset(BSR) Mode
o Write a control word to reset PC5. (Ans: 0AH)

o Write a control word to set PC2. (Ans: 05)

SET (S): D0
=1
Reset (R): D0
NB: Don’t Cares can be set as Zero or One, but in my solution all the = 0
don’t cares are set as zero. So we can have another solutions in
addition to the solutions specified here

What should be the values of B2, B1, B0 to select PC5?


What about to select PC2? Refer back slide 27
28
Modes of Operation of 8255
1. Bit Set/Reset(BSR)
Mode

Refer back slides 26 & 27 for BSR Mode

NB: lets assume Don’t Cares are all set as


Zero

29
Modes of Operation of 8255
1. Bit Set/Reset(BSR)
Mode
Delay is a predefined procedure to
introduce a time delay between
the off and on blinking states of
the bit

30
Modes of Operation of 8255
2. I/O Mode
• If bit 7 of a Control Word is a logical 1 then 8255 is
will be configured as a programmable I/O mode.
• The IO mode is further divided in to three modes
o Mode 0 (Simple input/output, without Handshaking)
o Mode 1 (Handshake mode)
o Mode 2 (Bidirectional Data Transfer)
• The making of inter relation between slower peripheral
device and microprocessor is called handshaking.

31
8255 Control register format for IO Mode
32
2. I/O MODE
a) Mode 0 (Simple Input or Output):
• Ports A and B are used as Simple I/O Ports, without
handshaking.
• Port C as two 4-bit ports
• Features
– Outputs are latched
– Inputs are not latched
– Ports do not have handshake or interrupt capability
33
34
b) Mode 1: (Input or Output with
Handshake)
• Handshake signals are exchanged between MPU & Peripherals
• Features
– Ports A and B are used as Simple I/O Ports
– Each port uses 3 lines from Port C as handshake
signals
– Input & Output data are latched
– interrupt logic supported
35
c) Mode 2: Bidirectional Data Transfer

• Used primarily in applications such as data transfer between two


computers
• Features
– Ports A can be configured as the bidirectional Port

Port B in Mode 0 or Mode 1.


Port A uses 5 Signals from Port C as handshake signals for data



transfer

Remaining 3 Signals from Port C Used as – Simple I/O or


36
handshake for Port B
8255A Programmable Peripheral Interface (PPI)

37
8255A Programmable Peripheral Interface (PPI)

38
Mode 1 Strobed Input

39
Mode 1 Strobed output

40
Mode 1 – Input for PortA, PortB

41
Mode 1 – output for PortA, PortB

42
Mode 1 – Input for PortA

43
Mode 1 – Input for PortA

44
Exercise

45
Find control word
(1) Port A: output with handshake
(2) Port B: input with handshake
(3) Port CL: output (4)Port CU: input

 Solution:
1 0 1 0 1 1 1 0
= AEH

46
 Port A: Output, Port B: Output,
 Port CU: Output, Port CL: Output

Solution:

1 0 0 0 0 0 0 0
= 80H

The control word register for the above ports of Intel


8255 is 80H.
47
 Port A: Input, Port B: Input,
 Port CU: Input, Port CL: Input

Solution:

1 0 0 1 1 0 1 1 = 9BH

The control word register for the above ports of intel


8255 is 9BH.
48
What is the mode and I/O configuration for ports A, B, and C of an 8255A
after its control register is loaded with 82Hex

The binary pattern is 10000010 (82H) refer to the table of control word

D0 = 0 lower 4 bits of Port C are outputs

D1 = 1 Port B are inputs

D2 = 0 mode 0 operation for both Port B and the lower 4 bits of Port C

D3 = 0 upper 4 bits of Port C are outputs

D4 = 0 Port A are outputs

D6D5 = 00 mode 0 operation for both Port A and the upper part Of Port C

D7 =1 mode enable
49
Exercise
• If control register is at Port 20H, How to configure the 8255 in Port
A Mode 0 input and Port B and C mode 0 output ?
• Identify the control pattern 10010000 (90H), Move this to the port

MOV AL, 90H OUT 20H,


AL

50
Exercise
Find the control word if PA = out, PB = in, PC0- PC3 = in, and PC4 - PC7
= out.
1 0 0 0 0 0 1 1 = 83H

51
Exercise
Write a program to configure port A as input, B as output
and all the bits of port C as output. Assuming a base address
of 50h. Find the control word.
NB: if base address is give address of the other port is
simple to calculate. b/c base address is address of port A.
then the address increment sequentially.

52
8255 Decoding

If Port A is 1238H and Port B is 123AH, Can you identify which Two address
lines are Connected to A1A0?
53
8255 Decoding
If PortA occupies location 1238H and PortB occupies 123AH, can you
determine addresses occupied by other Ports? What address lines are
connected to A1A0 of the 8255?

0001 0010 0011 1000 (1238H) look for 00 Port A

0001 0010 0011 1010 (1238H) look for 01 Port B

54
Exercise
Example: The 8255 shown in Figure 11-13 is configured as follows: port A
as input, B as output, and all the bits of port C as output. (you are expected
to use the Address decoding concepts from part I of Chapter 6 )

(a)Find the port addresses assigned to A, B, C, and the control register.

(b) Find the control byte (word) for this configuration.

55
NB: Address lines, A2 – A9 from the decoder , are

Exercise decoded 3toports


be input of CS,
. Values andand
of A1 are A0
common linesonforthealltable
are based the @ slide 19.

(a) Find the port addresses assigned to A, B, C, and the control register.

(a) The port addresses are as follows: (See Table )


CS A1 A0 Address Port
11000100 0 0 310H Port A
11000100 0 1 311H Port B
11000100 1 0 312H Port C
11000100 1 1 313H Control register
Address Decoder

56
Exercise
(b) Find the control byte (word) for this configuration. Port A as input, B as
output, and all the bits of port C as output. Solution:

(b) The control word is 90H, or 1001 0000.

57
Exercise

58
Exercise

59
Exercise

NB: Handshake always associated with


MODE1 of I/O mode

60
Exercise

NB: Address lines, A2 – A7, are decoded to be input of CS


and are common lines for all the 3 Ports

Address

Decoder

61
Exercise

62
Exercise

NB: Address lines, A2 – A7, are decoded to be input of CS


and are common lines for all the 3 Ports

Address Decoder

63
Exercise
NB: Address lines, A2 – A7,are decoded to be
input of CS

64
Exercise

65
Exercise
300H is Address of PORT A
Value of AL is 83H is Value of Control Word
Rotated to left 4
times; Lower Configuring the Control Word Register by
nibbles (PC0 – sending out the control word onto the address
PC7) are copied 3003 H (= 300H +3) which is address of the
into their Control word Register
respective
higher nibbles Reading from PRTB (with Address 300H + 1 = 300H)
(PC4- PC7) and into Register AL, and sending out ( Writing) the
all lower nibbles Value in Register AL onto port address 300H
become 0. (Which is Address of PORT A)
Read from the address D8255 + 2 (= 300H + 2 =
302H which is Address of PORT C) into AL register
The way to Making PC4-PC7 all 0’s, and PC0 – PC3 remain
send a data unmodified as they have been before
read from
Clower (PCL) sending out (Writing) the value in AL register
into Cupper onto the Port Address D8255 +2 (= 300H + 2 =
(PCU) 302H, which address of PORT C).
66
Exercise

67
Exercise

68
Thank
U!

69

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