CSE 331

Computer Organization and

Design
Fall 2007

Week 1
Section 1: Mary Jane Irwin (www.cse.psu.edu/~mji)
Section 2: Krishna Narayanan
Course material on ANGEL: cms.psu.edu

[slides adapted from D. Patterson slides with additional credits to Y. Xie]

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 Course Administration
 Instr (Sec1): Mary Jane Irwin ([email protected])
 348C IST Bldg
 OH’s: Tues 2:30 – 3:45pm & Wed 9:15 – 10:30am
 Instr (Sec2): Krishna Narayanan ([email protected] )
 348D IST Bldg
 OH’s: TBD
 TA: Evens Jean ([email protected] )
 360E IST Bldg
 OH’s: Tues, Thurs 2:30 – 4:00pm
 Web: ANGEL, cms.psu.edu
 Lab: Accounts on CSE machines in 220 IST, Windows Lab
 Texts: Computer Organization and Design: The
Hardware/Software Interface, 3rd Edition Revised
Printing, Patterson and Hennessy
VHDL Starter’s Guide, 2nd Edition, Yalamanchili
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 Grading Information
 Grade determinates
 Exam #1 ~20%
Email
instructor
- Tuesday, October 2, 6:30 – 7:45pm, 113 IST
 Exam #2 ~20%
ASAP if you have
- Thursday, November 8, 6:30 – 7:45, 113 IST
an exam conflict !
 Final Exam ~25%
- Section 1 & 2: TBD
 Homeworks/Programming Assignments ~25%
 Quizzes (in-class & ANGEL) ~ 5%
 Class attendance ~ 5%

 CSE 331 is a “C required course” for both CmpSc and

CmpEng majors

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 Grading Policies
 Assignments will be submitted electronically through
ANGEL and must be submitted by 5:00pm on the due
date. No late assignments will be accepted.
 Most programming assignments will follow the “pair
programming” paradigm
 Duplicate assignments will receive duplicate grades of
zero. Second offenses will result in a final course grade
of F.
 Grades will be posted on the ANGEL website
 See TA about questions on the assignments; see instructors
about grading questions on the exams
 Must submit email request for change of grade after discussions
with the TA or instructor
 December 12 deadline for filing grade corrections; no requests
for grade changes/updates will be accepted after this date
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 What is Pair Programming?
 Two programmers work side-by-side at one computer
continuously collaborating on the same design,
algorithm, code, or test
 The fourteen principles of pair programming
 Share everything http://portal.acm.org/citation.cfm?id
=332833.332848&coll=portal&dl=
 Play fair – take turns
ACM&idx=332833&part=
“driving”, when not “driving” periodical&WantType=periodical&title
don’t be a passive observer,
=Communications%20of%20the%20AC
M&CFID=891725&CFTOKEN=2281165
do be active and engaged
7
 Don’t hit people – stay on task (so no reading email or surfing)
 …
 Take a nap (or a break from working together) every afternoon
 Why do it?
 Has been shown to improve productivity and the quality of
software
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 Course Goals and Structure
 Introduction to the major components of a computer
system, how they function together in executing a
program, how they are designed

 MIPS assembler programming using the spim system

 VHDL design simulation using Mentor Graphics ModelSim

 Prerequisite: CSE 271 (INTRO TO DIGITAL SYSTEMS.

Introduction to logic design and digital systems, boolean
algebra, and introduction to combinatorial and sequential
circuit design and analysis)
 If you are also taking CSE 472 you will learn yet
another assembly language (Motorola 68HC12)

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 spim Assembler and Simulator
 spim is a simulator that runs MIPS32 assembly
language programs
 It provides a simple assembler, debugger and a simple set of
operating system services
 It implements both a simple, terminal-style interface (spim)
and a visual windowing interface (xspim and PCSpim)
 (Version 7.3) available as
 xspim (or spim) for unix, linux, and Mac OS X
- Installed on the CSE unix/linux machines in the lab
 PCSpim (or spim) for Windows (NT, 2000, XP)
- Installed on the CSE windows machines in 220 IST and/or can
be downloaded and installed on your own PC from

http://pages.cs.wisc.edu/~larus/spim.html

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 vhdl Simulation
 ModelSim is a hardware description language simulator
from Mentor Graphics
 Simulation (gate-level and RTL-level) and integrated debug
environment
- Verilog and VHDL
- Intuitive GUI for post-simulation debug and analysis
http://www.model.com/products/products_se.asp
- ModelSim SE is installed on the windows machines in 220 IST
 ModelSim PE Student Edition is available for free download
from
http://www.model.com/resources/student_edition/student_default.asp

 If you are taking CSE 471 or 478 you will gain even more
experience with the Mentor Graphics tools
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 ModelSim Screen Shot

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 What You Should Already Know
 How to write, compile and run programs in a higher
level language (C, C++, Java, …)
 How to represent and operate on positive and negative
numbers in binary form (two’s complement, sign
magnitude, etc.)
 Logic design
 How to design of combinational and sequential components
(Boolean algebra, logic minimization, technology mapping,
decoders and multiplexors, latches and flipflops, registers,
mealy/moore finite state machines, state assignment and
minimization, etc.)
 How to use a logic schematic capture and simulation tool
(e.g., LogicWorks)

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 Schedule
 This week’s material
 Course introduction, basics of a computer system,
introduction to SPIM
- Reading assignment – PH 1.1 through 1.3 and
A.9

 Next week’s material

 Introduction to MIPS assembler, adds/loads/stores
- Reading assignment - PH 2.1 through 2.4

 Entire semester course schedule can be

accessed on ANGEL under the Lessons tab
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 Quote for the Day

“I got the idea for the mouse while attending a

talk at a computer conference. The speaker
was so boring that I started daydreaming and
hit upon the idea.”
Doug Engelbart

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 The Evolution of Computer Hardware
 When was the first transistor invented?
 Modern-day electronics began with the invention in
1947 of the transfer resistor - the bi-polar transistor -
by Bardeen et.al at Bell Laboratories

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 The Evolution of Computer Hardware
 When was the first IC (integrated circuit)
invented?
 In 1958 the IC was “born” when Jack Kilby at
Texas Instruments successfully interconnected, by
hand, several transistors, resistors and capacitors
on a single substrate

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 The Underlying Technologies

Year Technology Relative Perform/Unit Cost

1951 Vacuum Tube 1
1965 Transistor 35
1975 Integrated Circuit (IC) 900
1995 Very Large Scale IC (VLSI) 2,400,000
2005 Submicron VLSI 6,200,000,000

What if technology in the transportation

industry advanced at the same rate?

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 The PowerPC 750
 Introduced in
1999
 3.65M transistors
 366 MHz clock
rate
 40 mm2 die size
 250nm
(0.25micron)
technology

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 Technology Outlook

High Volume 2004 2006 2008 2010 2012 2014 2016 2018
Manufacturing

Technology Node 90 65 45 32 22 16 11 8
(nm)
Integration 2 4 8 16 32 64 128 256
Capacity (BT)
Delay = CV/I 0.7 ~0.7 >0.7 Delay scaling will slow down
scaling

Energy/Logic Op >0.35 >0.5 >0.5 Energy scaling will slow down

scaling
Bulk Planar CMOS High Probability Low Probability
Alternate, 3G etc Low Probability High Probability
Variability Medium High Very High
ILD (K) ~3 <3 Reduce slowly towards 2 to 2.5
RC Delay 1 1 1 1 1 1 1 1
Metal Layers 6-7 7-8 8-9 0.5 to 1 layer per generation

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 Impacts of Advancing Technology
 Processor
 logic capacity: increases about 30% per year
 performance: 2x every 1.5 to 2 years
 Memory
 DRAM capacity: 4x every 3 years, about 60% per
year
 speed: 1.5x every 10 years
 cost per bit: decreases about 25% per year
 Disk
 capacity: increases about 60% per year
 speed:
 cost per bit:
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 Growth Capacity of DRAM Chips

In recent years growth

K = 1024 (210) rate has slowed to 2x
every 2 year
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 Computer Organization and Design

 This course is all about how computers work

 But what do we mean by a computer?
 Different types: embedded, laptop, desktop, server
 Different uses: automobiles, graphics, finance, genomics,…
 Different manufacturers: Intel, AMD, IBM, HP, Apple, IBM,
Sony, Sun …
 Different underlying technologies and different costs !

 Best way to learn:

 Focus on a specific instance and learn how it works
 While learning general principles and historical perspectives

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 Embedded Computers in You Car

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 Growth of Sales of Embedded Computers

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 Why Learn This Stuff?

 You want to call yourself a “computer scientist/engineer”

 You want to build HW/SW people use (so you need to
deliver performance at low cost)
You need to make a purchasing decision or offer
“expert” advice
 Both hardware and software affect performance
 The algorithm (CSE 465) determines number of source-level
statements
 The language/compiler/architecture (CSE 428/421/331&431)
determine the number of machine-level instructions
- (Chapter 2 and 3)
 The processor/memory (CSE 331&431) determine how fast
machine-level instructions are executed
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 What is a Computer?

 Components:
 processor (datapath, control)
 input (mouse, keyboard)
 output (display, printer)
 memory (cache (SRAM), main memory (DRAM), disk
drive, CD/DVD)
 network

 Our primary focus: the processor (datapath and

control)
 Implemented using millions of transistors
 Impossible to understand by looking at each transistor
 We need abstraction!
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 Major Components of a Computer

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 Head’s Up
 This week’s material
 Course introduction
- Reading assignment – PH 1.1 through 1.3 and A.9
 Reminders
 Make sure your CSE account is operational; change your
password to something you can remember and that is secure
(must be 12 or more alphanumeric characters of three types)
 Question/comments about the system go to
[email protected] ; questions about the programming
assignments go to the course TA
 Check out the course homepage at ANGEL!
 Next week’s material
 Introduction to MIPS assembler
- Reading assignment - PH 2.1 through 3.3, 3.4, and 3.7

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 Quote for the Day

“We all make mistakes … Our designs have to

work flawlessly despite us.”
Bob Colwell
The Pentium Chronicles

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 Below the Program
 High-level language program (in C)
swap (int v[], int k)
(int temp;
temp = v[k];
v[k] = v[k+1];
v[k+1] = temp; one-to-many
)
C compiler
 Assembly language program (for MIPS)
swap: sll $2, $5, 2
add $2, $4, $2
lw $15, 0($2)
lw $16, 4($2)
sw $16, 0($2)
sw $15, 4($2) one-to-one
jr $31
 Machine (object) code (for MIPS) assembler
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
. . .

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 Advantages of Higher-Level Languages ?
 Higher-level languages
 Allow the programmer to think in a more natural language and
for their intended use (Fortran for scientific computation,
Cobol for business programming, Lisp for symbol
manipulation, Java for web programming, …)
 Improve programmer productivity – more understandable
code that is easier to debug and validate
 Improve program maintainability
 Allow programs to be independent of the computer on which
they are developed (compilers and assemblers can translate
high-level language programs to the binary instructions of any
machine)
 Emergence of optimizing compilers that produce very efficient
assembly code optimized for the target machine

 As a result, very little programming is done today at

the assembler level
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 Machine Organization
 Capabilities and performance characteristics of the
principal Functional Units (FUs)
 e.g., register file, ALU, multiplexors, memories, ...
 The ways those FUs are
interconnected
 e.g., buses
 Logic and means by which
information flow between FUs
is controlled
 The machine’s Instruction Set Architecture (ISA)
 Register Transfer Level (RTL) machine description

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 ISA Sales

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 Major Components of a Computer

Processor Devices
Network
Control Memory Input

Datapath Output

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 Below the Program
 High-level language program (in C)
swap (int v[], int k)
. . .
C compiler
 Assembly language program (for MIPS)
swap: sll $2, $5, 2
add $2, $4, $2
lw $15, 0($2)
lw $16, 4($2)
sw $16, 0($2)
sw $15, 4($2)
jr $31

 Machine (object) code (for MIPS) assembler

000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
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 Input Device Inputs Object Code
000000 00000 00101 0001000010000000
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000

Processor Devices
Network
Control Memory Input

Datapath Output

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 Object Code Stored in Memory

Processor Memory Devices

000000 00000 00101 0001000010000000 Network
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
Control 100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
Input
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Datapath Output

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 Processor Fetches an Instruction

Processor fetches an instruction from memory

Processor Memory Devices

000000 00000 00101 0001000010000000 Network
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
Control 100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000 Input
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Datapath Output

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 Control Decodes the Instruction

Control decodes the instruction to determine

what to execute

Processor Devices
Network
Control
000000 00100 00010 0001000000100000
Memory
Input
Datapath
Output

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 Datapath Executes the Instruction

Datapath executes the instruction as directed

by control

Processor Devices
Network
Control
000000 00100 00010 0001000000100000
Memory
Input
Datapath
contents Reg #4 ADD contents Reg #2
results put in Reg #2 Output

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 What Happens Next?
Processor fetches the next instruction from memory

Processor Memory Devices

000000 00000 00101 0001000010000000 Network
000000 00100 00010 0001000000100000
100011 00010 01111 0000000000000000
Control 100011 00010 10000 0000000000000100
101011 00010 10000 0000000000000000
Input
101011 00010 01111 0000000000000100
000000 11111 00000 0000000000001000
Datapath Output

Fetch
How does it know which
location in memory to fetch
Exec Decode from next?

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 Processor Organization
 Control needs to have circuitry to
 Decide which is the next instruction and input it from memory
 Decode the instruction
 Issue signals that control the way information flows between
datapath components
 Control what operations the datapath’s functional units
perform
 Datapath needs to have circuitry to
 Execute instructions - functional units (e.g., adder) and
storage locations (e.g., register file)
 Interconnect the functional units so that the instructions can
be executed as required
 Load data from and store data to memory

What location does it load from and store to?

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 Output Data Stored in Memory

At program completion the data to be output

resides in memory

Processor Memory Devices

Network
Control
Input
00000100010100000000000000000000
Datapath 00000000010011110000000000000100 Output
00000011111000000000000000001000

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 Output Device Outputs Data

Processor Devices
Network
Control Memory Input

Datapath Output

00000100010100000000000000000000
00000000010011110000000000000100
00000011111000000000000000001000

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 The Instruction Set Architecture (ISA)

software

instruction set architecture

hardware

The interface description separating the

software and hardware

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 The MIPS ISA
 Instruction Categories Registers
 Load/Store
 Computational R0 - R31
 Jump and Branch
 Floating Point
- coprocessor PC
 Memory Management HI
 Special LO

 3 Instruction Formats: all 32 bits wide

OP rs rt rd sa funct

OP rs rt immediate

OP jump target

CSE331 W01.53
Q: How many already familiar with MIPS ISA?
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 How Do the Pieces Fit Together?

Applications
Operating
CSE 411
CSE 421 System
Compiler Firmware
Instruction Set
Architecture Memory Processor I/O system network
system CSE 458
CSE 331 & 431
Datapath & Control
Digital Design CSE 271 & 471
CSE 447 & 477Circuit Design

 Coordination of many levels of abstraction

 Under a rapidly changing set of forces
 Design, measurement, and evaluation
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 Review and Reminder
 Next week’s material
 Introduction to MIPS assembler
- Reading assignment - PH 2.1 through 2.4

 Homework 1 due on Tuesday, Sept. 4 by 5:00 PM

- Submit on ANGEL – individual programming this time !
 Other reminders
 Install PCSpim on your laptop
 Keep track of course updates on ANGEL
 Make sure your CSE account is operational; change your
password to something you can remember and that is secure
(must be at least 12 alphanumeric characters of 3 types)
 Question/comments about the lab hardware/system go to
[email protected] ; questions about the
programming assignments go to the course TA
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