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Digital Logic Design: Decoder & Encoder

An encoder is a combinational logic circuit that converts coded inputs into a binary output. There are two main types: 1. An n-to-2n encoder accepts one of 2n possible inputs and outputs its binary equivalent code. 2. A priority encoder operates like an n-to-2n encoder but prioritizes inputs so the output code corresponds to the highest priority asserted input. Encoders are used to convert familiar representations like decimals into binary codes for processing by digital circuits. Decoders perform the inverse conversion from binary codes to familiar representations.

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0% found this document useful (0 votes)
271 views20 pages

Digital Logic Design: Decoder & Encoder

An encoder is a combinational logic circuit that converts coded inputs into a binary output. There are two main types: 1. An n-to-2n encoder accepts one of 2n possible inputs and outputs its binary equivalent code. 2. A priority encoder operates like an n-to-2n encoder but prioritizes inputs so the output code corresponds to the highest priority asserted input. Encoders are used to convert familiar representations like decimals into binary codes for processing by digital circuits. Decoders perform the inverse conversion from binary codes to familiar representations.

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Md Ashiq
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Digital Logic Design

Decoder & Encoder


Implementing Functions using Decoders

Design example: addition


• Let’s make a circuit that adds three 1-bit inputs X, Y and Z.
• We will need two bits to represent the total; let’s call them C and S, for “carry”
and “sum.” Note that C and S are two separate functions of the same inputs X,
Y and Z.

X Y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
C(X,Y,Z) =  (3,5,6,7)
0 + 1 + 1 = 10 0 1 1 1 0
S(X,Y,Z) =  (1,2,4,7)
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1 1 + 1 + 1 = 11
Decoder-based adder
• Here, two 3-to-8 decoders implement C and S as sums of minterms.

C(X,Y,Z) = (3,5,6,7)

S(X,Y,Z) = (1,2,4,7)

• The “+5V” symbol (“5 volts”) is how you represent a constant 1 or true in Logic
Works. It has been used here so that the decoders are always active.
Decoder expansion
• Combine two or more small decoders with enable inputs to form a larger decoder.
• Here a 3-to-8 decoder has been constructed from two 2-to-4 decoders:

S2 S1 S0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
Modularity
• Be careful not to confuse the “inner” inputs and outputs of the 2-to-4 decoders
with the “outer” inputs and outputs of the 3-to-8 decoder (which are in
boldface).
• This is similar to having several functions in a program which all use a formal
parameter “x”.

• You could verify that this circuit is a 3-to-8 decoder, by using equations for the 2-
to-4 decoders to derive equations for the 3-to-8.
Active-low decoder example
• So we can use active-low decoders to implement arbitrary functions too, but as a
product of maxterms.
• For example, here is an implementation of the function, f(x,y,z) = (4,5,7), using
an active-low decoder.

• The “ground” symbol connected to EN represents logical 0, so this decoder


is always enabled.
• Remember that you need an AND gate for a product of sums.
Use two 3 to 8 decoders to make 4 to 16 decoder
4-to-16 decoder using only 2-to-4 decoders (no gates)
BCD-to-decimal decoder
(Active Low Output)

0 1 2 9
Selected
o/p
will be 0
BCD-to-7-segement decoder
Summary

• A n-to-2n decoder generates the minterms of a n-variable function.


– As such, decoders can be used to implement arbitrary functions.
• Some variations of the basic decoder include:
– Adding an enable input.
– Using active-low inputs and outputs to generate maxterms.
• We also talked about:
– Applying our circuit analysis and design techniques to understand and work
with decoders.
– Using block symbols to encapsulate common circuits like decoders.
– Building larger decoders from smaller ones.
Encoders
An Encoder is a combinational logic circuit that performs a “reverse” decoder function.

An Encoder accepts an active level on one of ots inputs representing a digit, such as a
decimal or octal digit, and converts it to a coded output, such as BCD or binary.

Encoders can also be devised to encode various symbols and alphabetic characters. The
process of converting from familiar symbols or numbers to a coded format is called
Encoding.

2n-to-n Encoder:

2n Binary
n
. .
. encoder . output
inputs . . s
8-to-3 Binary Encoder
Inputs Outputs
At any one time, only I0 I1 I2 I3 I4 I5 I6 I7 y2 y 1 y0
one input line has a value of 1. 1 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 0 0 1 0 0 0 0 0 1 1
0 0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
0 0 0 0 0 0 0 1 1 1 1
I0
y2 = I4 + I5 + I6 + I7
I1
y1 = I2 + I3 + I6 + I7
I2

I3 y0 = I1 + I3 + I5 + I7

I4
8-to-3 Priority Encoder
• What if more than one input line has a value of 1?

Example:

• For the above mentioned problem, let’s give priority to higher


bits
• Ignore “lower priority” inputs.
• The sequence is:
7>6>5>4>3>2>1>0
• Idle indicates that no input is a 1.
I 0 I1 I2 IInputs
3 I 4 I5 I6 I7 y2 y1 y0 Idle
0 0 0 0 0
Outputs 0 0 0 x x x 1
1 0 0 0 0 0 0 0 0 0 0 0
X 1 0 0 0 0 0 0 0 0 1 0
X X 1 0 0 0 0 0 0 1 0 0
X X X 1 0 0 0 0 0 1 1 0
X X X X 1 0 0 0 1 0 0 0
X X X X X 1 0 0 1 0 1 0
X X X X X X 1 0 1 1 0 0
X X X X X X X 1 1 1 1 0
Priority Encoder (8 to 3 encoder)
° Assign priorities to the inputs
° When more than one inputs are asserted, the output generates the code of
the input with the highest priority: 7>6>5>4>3>2>1>0
° Priority Encoder :
H7=I7 (Highest
Priority) H6=I6.I7’
H5=I5.I6’.I7’ Priority encoder
H4=I4.I5’.I6’.I7’ Priority Circuit Binary encoder
H3=I3.I4’.I5’.I6’.I7’
H2=I2.I3’.I4’.I5’.I6’.I7’
H1=I1. I2’.I3’.I4’.I5’.I6’.I7’ I0 I0 H0 I0
H0=I0.I1’. I2’.I3’.I4’.I5’.I6’.I7’ H1
IDLE= I0’.I1’. I2’.I3’.I4’.I5’.I6’.I7’ I1 I1 H2 I1 Y0 Y0
° Encoder H3
Y0 = I1 + I3 + I5 + I7 I2 I2 H4 I2 Y1 Y1
Y1 = I2 + I3 + I6 + Y2
I7 Y2 = I4 + I5 + I6 H5
+ I7 I3 I3 H6 I3 Y2
H7
I4 I4 IDLE I4 IDLE

I5 I5 I5
Priority Encoder (Irregular sequence)
° Assign priorities to the inputs in the following order:
2>5>3>4>6>7>1>0
° Priority Encoder :
H2=I2 (Highest Priority)
H5=I5.I2’
H3=I3.I5’.I2’ Priority encoder
H4=I4. I3’.I5’.I2’
H6=I6. I4’. I3’.I5’.I2’ Priority Circuit Binary encoder
H7=I7. I6’. I4’. I3’.I5’.I2’
H1=I1. I7’. I6’. I4’. I3’.I5’.I2’ I0 I0 H0 I0
H0=I0. I1’. I7’. I6’. I4’. I3’.I5’.I2’
IDLE= I0’.I1’. I2’.I3’.I4’.I5’.I6’.I7’ H1
I1 I1 H2 I1 Y0 Y0
° Encoder
Y0 = I1 + I3 + I5 + I7 H3 Y1
Y1 = I2 + I3 + I6 + I2 I2 H4 I2 Y1
I7 Y2 = I4 + I5 + I6
+ I7 H5 Y2
I3 I3 H6 I3 Y2
H7
I4 I4 IDLE I4 IDLE

I5 I5 I5
The Decimal - to - BCD Priority Encder:
Let Priority is given to the higher order digits. Requirements to activate A0:
1) A0 is HIGH if 1 is HIGH and 2,4,6,8 LOW
A0 is HIGH if 3 is HIGH and 4,6,8 LOW
A0 is HIGH if 5 is HIGH and 6,8 LOW
A0 is HIGH if 7 is HIGH and 8 LOW
A0 is HIGH if 9 is HIGH
Therefore, A0 = 1.2’.4’.6’.8’ + 3.4’.6’.8’
+5.6’.8’ +7.8’ +9
2) A1 is HIGH if 2 is HIGH and 4,5,8,9 LOW
A1 is HIGH if 3 is HIGH and 4,5,8,9 LOW
A1 is HIGH if 6 is HIGH and 8,9 LOW
A1 is HIGH if 7 is HIGH and 8,9 LOW
Therefore, A1 = (2+3)4’.5’.8’. 9’ + (6+7)8’. 9’
3) A2 is HIGH if 4 is HIGH and 8,9 LOW
A2 is HIGH if 5 is HIGH and 8,9 LOW
A2 is HIGH if 6 is HIGH and 8,9 LOW
A2 is HIGH if 7 is HIGH and 8,9 LOW
Therefore, A2 = (4+5+6+7)8’. 9’
4) A3 is HIGH if 8 &9 are HIGH
Reference:
Mixed contents from books by Floyd; Mano; Vahid
And Howard.

Acknowledgement:

Nafiz Ahmed

Chisty
Thank
s

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