Chapter 2: Data Representation
Chapter 2: Data Representation
-83:
Signed magnitude = 11010011 (sign bit is 1 for negative)
One’s complement = 10101100 (flip all bits from +83)
Two’s complement = 10101101 (flip all bits from +83 and add 1)
Examples:
1 + 1 = 2, write 0, carry 1
01000101 11111111 The carry out of this
+ 00001111 + 10101010 last bit causes overflow
01010100 110101001
Subtraction
• There are two ways we could perform subtraction
– As normal, we subtract from right to left with borrows now
being 2 instead of 10 as we move from one column to the next
– Or, we can negate the second number and add them together
(36 – 19 = 36 + -19)
• We will use the latter approach when implementing a subtraction
circuit as it uses the same circuit as addition
Examples:
borrow 2 from the previous
11010100 column 11010100 11010100
- 00110011 - 00110011 + 11001101
10100001 110100001
Notice the overflow in this case too, but it differs from the
last example because we are using two’s complement
Overflow Rules
• In unsigned magnitude addition
– a carry out of the left-most bit is also an overflow
• In unsigned magnitude subtraction
– overflow will occur in subtraction if we must borrow prior to the
left-most bit
• In two’s complement addition/subtraction
– if the two numbers have the same sign bit and the
sum/difference has a different sign bit, then overflow
110011
* 101001 This is the same as:
110011
000000 110011 * 101001 =
000000 110011 * 100000 + 110011 * 00000 +
110011 110011 * 1000 + 110011 * 000 +
000000 110011 * 00 + 110011 * 1
110011 = 110011 * 100000 + 110011 * 1000 + 110011 * 1
Add these values
A is the accumulator
A is an accumulator along
with the left side of Q
As we shift C/A/Q, we
begin to write over part of Q
(but it’s a part that we’ve
already used in the
multiplication)
1) Q/Q-1=10, AA–M,
Shift
2) Q/Q-1=11, Shift
3) Q/Q-1=01,AA+M,
Shift
4) Q/Q-1=00, Shift