Input and Output (I/O ) Organization
Objectives
To understand:
Role of Input / Output devices
Role of I/O controller
I/O Design factors
Input/Output Problems
Types of typical I/O devices
Types of Buses in computer system
Interfacing I/O devices to processor memory
and operating systems
I/O Data Transfer Methods
Source: Feleke Merin (Dr. –Eng.) 1
Computer Input / Output devices
• Through input and output devices, people provide data
and instructions to the computer and receive results from
it
• I/O devices provide a method for transferring information
between internal storage (such as memory and CPU
registers) and external I/O devices
• Resolves the differences between the computer and
peripheral devices
Source: Feleke Merin (Dr. –Eng.) 2
Computer Input / Output devices(contd.)
Peripherals - Electromechanical Devices
CPU or Memory - Electronic Device
Data Transfer Rate
– Peripherals - Usually slower
– CPU or Memory - Usually faster than peripherals
Some kinds of Synchronization mechanism may be needed
Unit of Information
– Peripherals – Byt
– CPU or Memory - Word
Operating Modes
– Peripherals - Autonomous, Asynchronous
– CPU or Memory - Synchronous
Source: Feleke Merin (Dr. –Eng.) 3
Computer Input / Output devices(contd.)
Interrupts
Processor
Cache
Memory– I/O bus
I/O I/O I/O
Main controller controller controller
memory
Graphics Network
Disk Disk
output
• I/O is the eyes, ears, nose, mouth, hands, legs, etc. of the
computer system. Imagine a computer without I/O.
Source: Feleke Merin (Dr. –Eng.) 4
Role of I/O controller
• Each peripheral device has an interface (an I/O controller)
associated with it.
• I/O controller (duties)
Decodes the device address (device code)
Decodes the commands (operation)
Provides signals for the peripheral controller
Synchronizes the data flow and supervises the transfer rate
between peripheral and CPU or Memory
• Typical I/O instruction
Op. code Device address Function code
(Command)
Source: Feleke Merin (Dr. –Eng.) 5
I/O Design factors
• Design factors:
– I/O device characteristics (input, output, storage, etc.).
– I/O Connection Structure (degree of separation from
memory operations).
– I/O interface (the utilization of dedicated I/O and bus
controllers).
– Types of buses (processor-memory vs. I/O buses).
– I/O data transfer or synchronization method
(programmed I/O, interrupt-driven, DMA).
Source: Feleke Merin (Dr. –Eng.) 6
Diversity of I/O systems
Three characteristics are useful in organizing the wide
variety of I/O systems.
Behavior : Input (read once), Output (write only) or
storage
Partner : Either Human or a machine at the end of the I/O
device.
Data rate : The peak rate at which the data can be
transferred between the i/o devices and main memory or
processor.
Ex : A key board device is used by a human with data rate
about 10 bytes per second.
Source: Feleke Merin (Dr. –Eng.) 7
Input/Output Problems
• Wide variety of peripherals
– Delivering different amounts of data
– At different speeds
– In different formats
• All slower than CPU and RAM
• Need I/O modules (or interface device)
Source: Feleke Merin (Dr. –Eng.) 8
I/O Characteristics and Functionality
• Nature of data- data can be human-readable or
machine-readable
• Data entry: converts human-readable data into
machine-readable form
• Data input: transfers machine-readable data
into system
• Source data automation: capturing and editing
data where the data is initially created and in a
form that can be directly input to a computer
Source: Feleke Merin (Dr. –Eng.) 9
Input Devices
• Personal computer input devices
– Keyboard
• Screen Input Devices
- Touch Screen
- Light Pen
- Mouse
• Terminals
– Input and display devices that perform
data entry and input at same time
– Office, warehouse, factory
Source: Feleke Merin (Dr. –Eng.) 10
Input Devices (contd.)
• Speech-recognition technology
– Input devices that recognize human speech
– e.g. automate account
identification process
• Digital cameras
Source: Feleke Merin (Dr. –Eng.) 11
Input Devices (contd.)
• Scanning devices
• Optical data readers
Special scanner
OMR – standardized tests
OCR – convert handwritten
to typed doc into digital data
• Magnetic stripe card
– Swipe card
• Point-of-sale (POS) devices
– Used in retail operations to
enter sales information
Source: Feleke Merin (Dr. –Eng.) 12
Input Devices (continued)
• Automated teller machine (ATM) devices
• Pen input devices
• Touch-sensitive screens
• Bar-code scanners
• Radio Frequency Identification (RFID)
Source: Feleke Merin (Dr. –Eng.) 13
Output Devices
• Display monitors
• Liquid crystal displays (LCDs)
• Organic light-emitting diodes (OLEDs)
Source: Feleke Merin (Dr. –Eng.) 14
Output Devices(contd.)
• Printers and plotters
• Digital audio player
Source: Feleke Merin (Dr. –Eng.) 15
Special-Purpose Input and Output Devices
• Computer-based navigation systems
– GPSs (Global positioning system),
satellite based radio navigating system
– Guide to specific destination
• Multiple function printers
– Print, copy, fax,scan
• Eyebud screens
– Portable media devices
– Display video in front of one eye
Source: Feleke Merin (Dr. –Eng.) 16
Summary (Typical I/O devices)
Source: Feleke Merin (Dr. –Eng.) 17
Typical Computer System Architecture
System Bus or Front Side Bus (FSB)
Memory Controller
(Chipset North Bridge)
I/O Controller Hub
(Chipset South Bridge)
Isolated I/O
I/O Subsystem
Source: Feleke Merin (Dr. –Eng.) 18
Typical System Architecture(contd.)
• Functions of Buses (based on Slide)
– Memory bus is for information transfers between CPU and the MM
– I/O bus is for information transfers between CPU and I/O devices
through their I/O interface
Physical Organizations
– Many computers use a common single bus system for both memory
and I/O interface units
• Use one common bus but separate control lines for each function
• Use one common bus with common control lines for both functions
– Some computer systems use two separate buses, one to communicate
with memory and the other with I/O interfaces
Source: Feleke Merin (Dr. –Eng.) 19
I/O controller
I/O Interface, I/O controller or I/O bus adapter:
– Specific to each type of I/O device.
– To the CPU, and I/O device, it consists of a set of control and data
registers (usually memory-mapped) within the I/O address space.
– On the I/O device side, it forms a localized I/O bus which can be
shared by several I/O devices
• (e.g IDE, SCSI, USB ...)
Source: Feleke Merin (Dr. –Eng.) 20
I/O controller duties
• Control & Timing
• CPU Communication
• Device Communication
• Data Buffering
• Error Detection
Source: Feleke Merin (Dr. –Eng.) 21
Types of Buses in The System (1/2)
• Processor-Memory Bus
• System Bus, Front Side Bus, (FSB)
– Should offer very high-speed (bandwidth) and low
latency.
– Matched to the memory system performance to maximize
memory-processor bandwidth.
– Usually design-specific (not an industry standard).
Source: Feleke Merin (Dr. –Eng.) 22
Types of Buses in The System (2/2)
• I/O buses (sometimes called an interface):
– Follow bus industry standards.
– Usually formed by I/O interface adapters to handle many
types of connected I/O devices.
– Wide range in the data bandwidth and latency
– Not usually interfaced directly to memory instead
connected processor-memory bus via a bus adapter
(chipset south bridge).
– Examples:
• Main system I/O bus: PCI, PCI-X, PCI Express
• Storage: SATA, IDE, SCSI.
Source: Feleke Merin (Dr. –Eng.) 23
Interfacing I/O devices to processor,
memory and operating systems
Giving Commands to i/o devices
Basically two techniques are used to address the devices.
1.Memory-mapped I/O : An i/o scheme in which portions
of address space are assigned to i/o devices.
Ex : Simple printer has 2 i/o device registers.
a. Status register : It contains done bit and error bit.
b. Data register : The data to be printed is put into this
register.
Source: Feleke Merin (Dr. –Eng.) 24
Interfacing I/O devices … (contd.)
2. Alternative method is to use dedicated i/o instructions in
the processor.
These specify both the device no. and command word.
The processor communicates via a set of wires normally
included as a part of i/o bus.
Commands can be transmitted over data lines in the bus.
Ex : Intel IA32, IBM 370.
Source: Feleke Merin (Dr. –Eng.) 25
Interfacing I/O devices … (contd.)
• I/O devices are interfaced via an I/O controller
– Takes care of low-level operations details
• Several ways of mapping I/O
– Memory-mapped I/O
• Reading and writing similar to memory read/write
• Uses same memory read and write signals
• Most processors use this I/O mapping
– Isolated I/O
• Separate I/O address space
• Separate I/O read and write signals are needed
• Pentium supports isolated I/O
– Also supports memory-mapped I/O
Source: Feleke Merin (Dr. –Eng.) 26
Interfacing I/O devices … (contd.)
Separate I/O address space
CPU Memory
Memory Addressing Wires (Ax)
Bus Data Wires (Dx)
I/O Devices Addressing Wires
(1) Specify memory address using “memory addressing wires”
(2) Send/receive data to/from the memory address (using “data wires”)
Source: Feleke Merin (Dr. –Eng.) 27
Interfacing I/O devices … (contd.)
Separate I/O address space
CPU Memory
Memory Addressing Wires
Data Wires
I/O Devices Addressing Wires
HDD Keyboard Monitor
(1) Specify I/O device (port) address using “I/O addressing wires”
(2) Send/receive data to/from the specified I/O device using “data wires”
Source: Feleke Merin (Dr. –Eng.) 28
Interfacing I/O devices … (contd.)
Memory-Mapped I/O
CPU Memory
Memory Addressing Wires
Data Wires
HDD Keyboard Monitor I/O devices are also
addressed by memory
address wires
(1) Specify memory address using “memory addressing wires”
(2) Send/receive data to/from the memory address
Source: Feleke Merin (Dr. –Eng.) 29
I/O Data Transfer Methods (1/3)
1. Programmed I/O : Polling (For low-speed I/O)
The I/O device puts its status information in a status
register.
The processor must periodically check the status register.
The processor is totally in control and does all the work.
Very wasteful of processor time.
Used for low-speed I/O devices (mice, keyboards etc.)
Source: Feleke Merin (Dr. –Eng.) 30
I/O Data Transfer Methods (2/3)
2. Interrupt-Driven I/O (For medium-speed I/O):
An interrupt line from the I/O device to the CPU is used to
generate an I/O interrupt indicating that the I/O device needs
CPU attention.
The interrupting device places its identity in an interrupt vector.
Once an I/O interrupt is detected the current instruction is
completed and an I/O interrupt handling routine (by OS) is
executed to service the device.
Used for moderate speed I/O (optical drives, storage, neworks ..)
Allows overlap of CPU processing time and I/O processing time
Source: Feleke Merin (Dr. –Eng.) 31
Transferring data b/n I/O device and
memory using DMA(3/3)
3. Direct Memory Access (DMA) (For high-speed I/O):
Implemented with a specialized controller that transfers data
between an I/O device and memory independent of the
processor(with out involving the processor).
The DMA controller becomes the bus master and directs reads
and writes between itself and memory.
Interrupts are still used only on completion of the transfer or
when an error occurs.
Low CPU overhead, used in high speed I/O (storage, network
interfaces)
Allows more overlap of CPU processing time and I/O
processing time than interrupt-driven I/O.
Source: Feleke Merin (Dr. –Eng.) 32
DMA transfer steps
• DMA transfer steps:
– The CPU sets up DMA by supplying device identity,
operation, memory address of source and destination of
data, the number of bytes to be transferred.
– The DMA controller starts the operation. When the
data is available it transfers the data, including
generating memory addresses for data to be
transferred.
– Once the DMA transfer is complete, the controller
interrupts the processor, which determines whether the
entire operation is complete.
Source: Feleke Merin (Dr. –Eng.) 33
Summary(Methods to communicate I/O
devices)
Methods Direction Who do it?
Interrupt I/O device Memory The main processor
Programmed-I/O Memory I/O device The main processor
Polling I/O device Memory The main processor
I/O device Memory The shared central DMA
Centralized-DMA Memory I/O device (on the motherboard)
I/O device Memory
On-Card DMA On-card DMA
Memory I/O device
“DMA” = “Direct Memory Access”
Source: Feleke Merin (Dr. –Eng.) 34
