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CISC

The document compares CISC and RISC architectures. CISC uses complex instructions that can perform multiple operations in one clock cycle, while RISC uses only simple instructions that each take one clock cycle. RISC aims for higher processor speeds through simpler instruction sets and pipeline architectures at the cost of requiring more instructions per task.

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Mussie Kebede
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30 views

CISC

The document compares CISC and RISC architectures. CISC uses complex instructions that can perform multiple operations in one clock cycle, while RISC uses only simple instructions that each take one clock cycle. RISC aims for higher processor speeds through simpler instruction sets and pipeline architectures at the cost of requiring more instructions per task.

Uploaded by

Mussie Kebede
Copyright
© © All Rights Reserved
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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CISC vs.

RISC
• CISC – Complex Instruction Set Computer
• RISC - Reduced Instruction Set Computer
• Historical perspective:
– at first computers had a limited instruction set because of technological
limitations (number of switching elements was limited)
– as integration technology improved:
• more instructions were included in the set of a computer
• more complex operations implemented in instructions => more complex
instructions
– consequences:
• CPU became more and more complex
• CPU became slower (relative to the clock frequency)
• higher CPI and limited clock frequency
CISC
• Reasons for complex instruction set computers
– more powerful instructions
• e.g. floating point arithmetic instructions
– assembly language instructions closer to high level language instructions
• e.g. loops, complex conditional jumps
– more complex addressing modes, as support for complex data structures
• addressing: indexed, based, mixed, scaled, etc.
• Benefits:
– easier programming in assembly language
– less instructions needed to write an application
– easier compilation of high level languages
– support for complex data structures
CISC
• Statistical measurements (during the ’70s)
– which instruction types are more often used in different types of
applications ?
– does the programmers use the available complex instructions?
• Surprising results
– programmers prefer simple instructions
– complex instructions are used just occasionally, for some very specific
operations (e.g. sine, arc tang. log, exponential, etc.)
– most of the time the processor is executing simple instructions from a
limited set
• Conclusion:
– the speed limitation caused by a complex instruction set is not justified
– let’s do things simpler and faster
RISC
• RISC = Reduced Instruction Set Computer
• Principle: sacrifice everything for speed
– reduce the number of instructions – make CPU simpler
– get rid of complex instructions, which may slow down the CPU
– use simple addressing modes – less time spent to compute the address
of an operand
– limit the number of accesses to the memory
– if a given operation cannot be executed in one clock period than do
not implement it in an instruction
– extensive use of pipeline architecture – in order to reach CPI=1 (one
instruction per clock period)
RISC - Main features
• limited number of instructions in the instruction set:
– 30-40 instructions v.s 100-200 in case of CISC
• no complex instructions
– every instruction executes only one operation
• instructions have fixed format
– fixed length
– few combinations of fields inside the instruction code
• instructions executed in one clock period (except Load and Store
instructions)
– through intensive use of pipeline architecture
– every instruction have the same number of pipeline stages
RISC - Main features
• Increased set of general purpose registers
– e.g. 32-64 registers
– instructions operating with registers are executed in the shortest
time
– compensate the lack of instructions operating with the memory
• Use of multiple register sets
– fast and easy context switch
– use of register set windows
RISC - Main features
• Only two instructions operate (have access) to the memory
locations:
– Load – read data from the memory into a register
– Store – write the data from a register into the memory
– Load and Store instructions require two accesses to the memory:
• one to read the instruction code
• one to read or write the data
– Load and store instructions are the only instructions which are
executed in two clock periods
– all the other instructions from the set are operating with registers
or a register and a constant
RISC - Main features
• Hard to write applications in assembly language
– lack of more powerful instructions and addressing modes
• A program on a RISC is more optimized than the same program
written on a CISC
– only those operations are used which are strictly necessary
• More effort for programming, less time in execution
– it is worth to have a greater time spent on programming if at the end
the program will be executed many times in a shorter time !?
RISC - Main features
• The CPU implemented in pure hardware (no
microprogramming)
– instructions are decoded and executed using hardware
components
– higher speed less execution steps
• Compilers are more difficult to implement
RISC vs. CISC
Parameter RISC CISC
Instruction types Simple Complex
Number of instructions Reduced (30-40) Extended (100-200)
Duration of an instruction One cycle More cycles (4-120)
Instruction format Fixed Variable
Instruction execution In parallel (pipeline) Sequential
Addressing modes Simple Complex
Instructions accessing the Two: Load and Store Almost all from the set
memory
Register set multiple unique
Complexity In compiler In CPU (micro-program)
Performance of RISC v.s. CISC
CISC: less 4-100 long

execution time = no_instructions*CPI*Tclk


RISC: more 1 short

 Hard to tell which is the best


 A combination of CISC and RISC may be the solution:
• RISC inside, CISC outside – see Pentium processors
• complex instructions translated into simple (RISC) instructions
Consider the operation of Multiplication
2,3
 Let's say we want to find
5,2
the product of two
numbers - one stored in
location 2:3 and another
stored in location 5:2 - and
then store the product
back in the location 2:3.
 i.e.,
M(2,3)< - M(5,2)*M(2,3)
CISC Approach
For this particular task, a CISC
 processor would come prepared with a specific instruction (we'll call it "MULT").
MULT A,B When executed, this instruction
 loads the two values into separate registers,
 multiplies the operands in the execution unit, and then
 stores the product in the appropriate register. Thus, the entire task of multiplying two
numbers can be completed with one instruction
 MULT is what is known as a "complex instruction."
 It operates directly on the computer's memory banks and does not require the
programmer to explicitly call any loading or storing functions.
 It closely resembles a command in a higher level language, identical to the C
statement “a = a * b.”
RISC Approach
• RISC processors only use simple instructions that can be executed
within one clock cycle.
• The "MULT" command described above could be divided into three
separate commands:
LOAD A, 2:3
LOAD B, 5:2 (LOAD, which moves data from the memory bank
to a register)
PROD A, B ("PROD,"finds the product of two operands )

STORE 2:3, A ("STORE,“ moves data from a register to the


memory banks)
CISC RISC
 Primary goal is to complete a task in  Primary goal is to speedup
as few lines of assembly as possible individual instruction
 Emphasis on hardware  Emphasis on software
 Includes multi-clock,  Single-clock,
complex instructions reduced instruction only
 Memory-to-memory:  Register to register:
"LOAD" and "STORE" "LOAD" and "STORE”
incorporated in instructions are independent instructions
 Difficult to apply pipelining.  Easy to apply pipelining.
 Small code sizes,  Low cycles per second,
high cycles per second large code sizes

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