UNIT – I Syllabus

Basic Structure of Computers

• Functional units – Basic operational concepts

– Bus structures – Performance and metrics –
Instructions and instruction sequencing –
• Hardware – Software Interface – Instruction
set architecture – Addressing modes – RISC –
CISC.
• ALU design – Fixed point and floating point
operations..
 UNIT – I Introduction
Computer :
A fast electronic calculating machine that accepts digitized
input information, processes it according to a list of
internally stored instructions and produces the resulting
output informatiuon.

Types of Computers :
1. Personal Computer
2. Desktop Computer
3. Notebook
4. Workstations
5. Enterprise Systems (Mainframe) and Servers
6. Super computers
Processor
Hard Disk
Hard Disk
Functional Units

Main Memory
Registers

CU BUS

ALU
I/p 1 I/p 2 S.M o/p 1 o/p n
Connection between Processor & Memory

Main Memory

MAR MDR Control

R0
PC
R1
ALU Processor
:
:
IR
Rn-1

n- General Purpose Register

 Registers
Registers

Control & Status Registers User Variable Registers

1. Program Counter (PC)

General Address Data
2. Instruction register (IR)
Purpose Regs. Registers
3. Mem. Addr. Reg (MAR) Registers D0 , D1, ..
4. Mem. Buffer / Data Reg A,B,C,D Dn
(MBR / MDR) A0 ,A1, A7
5. Flag Registers (PSW)
Segment Reg Index Reg Pointer
CS, DS, ES, SS SI, DI Reg
SP, BP
 Basic operational Concepts --Operating Steps
• Execution of the program starts when the PC is set to point
the 1st instruction of the program
• The content of the PC are transferred to the MAR and
Read control signal is sent to the memory
• The addressed word is read out of the memory and located
into the MDR
• Next the content of MDR are transferred to the IR
• If the instruction involves an operation to be performed by
the ALU, it is necessary to obtain the required operand
• After the required operands are fetched, the ALU can
perform the desired operation
• If the result of the operation wants to be stored in the
memory, then the result is sent to MDR and the address of
the result is sent to MAR, and a write cycle is initiated
• During the execution of current instruction the contents of
the PC are incremented.
 Execution
Instruction Cycle
Obtain instruction from program storage

Fetch

Instruction Determine required actions and instruction size

Decode

Operand Locate and obtain operand data

Fetch

Execute Compute result value or status

Result Deposit results in storage for later use

Store

Next
Determine successor instruction; can
Instruction generally be combined w/ Decode
Execution Cycle Contd..
Bus / Interface
 Bus Structure
• For a computer to achieve its operation, the functional units
need to communicate with each other.
•I n order to communicate, they need to be connected.

Input Output Memory Processor

Bus

•Functional units may be connected by a group of parallel wires.

•The group of parallel wires is called a bus.
•Each wire in a bus can transfer one bit of information.
•The number of parallel wires in a bus is equal to the word length of
a computer
Bus Structure Contd…
 Performance
 Response time: the time between the start and completion of a
task.

 Throughput: the total amount of work done in a given time.

 Some performance measures:

 MIPS (million instructions per second)
 MFLOPS (million floating point operations per second)
 SPEC benchmarks
 Synthetic benchmarks

 CPU time is the time taken by CPU to execute the program. It has
two components:
 User CPU time is the time to execute the instructions of the program.
 System CPU time is the time used by the operating system to run the
program.

 Elapsed time (wall clock time) is the time between the start and
end of the program.
 Processor Clock

 The clock defines the regular time intervals called clock

interval.

 The length T of one clock cycle is an important parameter

for processor performance.

 Clock Rate (R) : R = 1/T

 Units for Measuring Performance

 Time in seconds (s), microseconds (μs), nanoseconds (ns), or

picoseconds (ps).

 Clock cycle
 Period of the hardware clock
 Example: one clock cycle means 1 nanosecond for a 1GHz clock
frequency (or clock rate)
– CPU time = (CPU clock cycles)/(clock rate)

 Cycles per instruction (CPI): average number of clock cycles

used to execute a computer instruction.
 Performance Equation

 The basic performance equation is given by,

T = NXS
R
T - Performance parameter of an application program
N - No.of machine language instructions required to
complete execution of a program,
S - Avg No.of basic steps required to execute one machine
instruction.
R - Clock rate of the processor in cycles per second.

 The computer architect must try to reduce the value of T to

achieve higher performance.
 WAYS TO IMPROVE THE SYSTEM PERFORMANCE

• Pipelining and Superscalar Operation

- A substantial improvement in performance can be achieved by
overlapping the execution of successive instructions, using a technique
called “pipelining”.
- start execution of several instructions in every clock cycle – this
mode of operation is called “ Superscalar Execution”

• Increasing the Clock Rate

There are two ways in which clock rate may be increased,
- Firstly, improved IC technology makes logic circuits faster, thus
reducing the time taken to complete a basic step. This allows clock period T to
be reduced and clock rate R to be increased.
- Second, reducing the processing amount in one basic step reduce
the clock period T, but this might increase the no.of basic steps needed for
normal performance of the system.
• Compiler - The compiler may be designed to rearrange instructions to
achieve better performance.
 SYSTEM PERFORMANCE MEASUREMENT
SPEC Rating

 The SPEC (System Performance Evaluation Corporation) rating is

computed as follows,
SPEC Rating = Running time on the reference computer
Running tome on the computer under test

Amdahl’s Law

 The execution time of a system, in general, has two fractions -- a

fraction fenh that can be speeded up by factor n, and the remaining
fraction 1 - fenh that cannot be improved. Thus, the possible speedup is:

Old time
Speedup = ------------
New time
1
= ---------------------
1 – fenh + fenh/n
Bytes
Number of Binary Digits (bits) Common Name
1 Bit
4 Nibble
8 Byte
16 Half Word
32 Word
64 Double Word
128 Quad Word
Number of Bytes Common Name
1,024  (210) kilobyte (kb)
1,048,576  (220) Megabyte (Mb)
1,073,741,824  (230) Gigabyte (Gb)
1,099,511,627,776 bytes (240) Terabyte (Tb)
1,125,899,906,842,624 bytes (250) Petbytes (P)
260 , 270 , 280 Exabytes, Zettabytes, Yottabytes
 Number Systems
• Decimal number system
• Binary number system
• Octal number system
• Hexadecimal number system
• Converting
• Negative numbers
• Character representation
Decimal Octal Hex Binary
0 0 0 0000
1 1 1 0001
2 2 2 0010
3 3 3 0011
4 4 4 0100
5 5 5 0101
6 6 6 0110
7 7 7 0111
8 10 8 1000
9 11 9 1001
10 12 A 1010
11 13 B 1011
12 14 C 1100
13 15 D 1101
14 16 E 1110
15 17 F 1111
16 10 (1 + 0) 0001 0000
 Unsigned Integers
• Represents positive integers only
• Example: ASCII character codes
• Not necessary to indicate a sign, so all 8 or
16 bits can be used for the magnitude:
– 1 byte = 8 bits = 28 = 256 (0 to 255)
– 2 bytes = 16 bits = 216 = 65,536 (0 to 65,535)
– 4 bytes = 32 bits = 232
= 4,294,967,296 (0 to 4,294,967,295)
 Signed Integers
• Represents positive and negative integers
• MSB (Most Significant Bit – leftmost bit) used to
indicate sign
– 0 = positive, 1 = negative
• One less bit is used for the magnitude, with one
extra negative value
– 1 byte = 8-1 bits = 27 (-128 to +127)
– 2 bytes = 16-1 bits = 215 (-32,768 to +32,767)
– 4 bytes = 32-1 bits = 231 (-2,147,483,648 to
+2,147,483,647 )
 1’s & 2’s Complement
• 1’s complement form
– Formed by reversing (complementing) each bit
• 2’s complement form
– Formed by adding 1 to 1's complement
– Negative numbers are stored this way
– Additive inverse of a number
– Computer never has to subtract
• A – B = A + (-B)
 Decimal Conversion
• Unsigned Integers
– Convert binary directly to decimal form
• Signed Integers
– If MSB = 0, convert directly to decimal
– If MSB = 1, convert to 2's complement form
(reverse the bits & add 1), then to decimal
form
 Signed Integers (8-bit)
• Example: -9
– 0000 1001b
– 1111 0110b
– +1b
– 1111 0111b

• Example: -32
– 0010 0000b
– 1101 1111b
– +1b
– 1110 0000b
 Converting Rules

• From binary or hex to decimal

– Use positional representation as shown previously
• From decimal to binary or hex
– Keep dividing by 2 (or 16)
– Remainders give the digits, starting from lowest power
• From binary to hex (or vice versa)
– Replace each set of four binary digits by the corresponding
hexadecimal digit (or vice versa)
 Conversion List
• Decimal – Binary
• Decimal – Hexadecimal
• Decimal – Octal
• Binary – Hexadecimal
• Binary – Octal
• Binary – Decimal
• Hexadecimal – Decimal
• Octal – Decimal
• Hexadecimal – Binary
• Octal - Binary
 Rules for Conversion
• Decimal – Anything:
– Decimal to binary, decimal to Binary and Decimal
to Hexadecimal Conversion requires to be divided
by 2, 8, 16
• Anything to Decimal:
– Binary to Decimal, Octal to Decimal and
Hexadecimal to Decimal conversion includes
multiplication by 2, 8, 16
 Decimal - Binary Conversion
Integer or Fixed Point: Floating Point :
eg : 3610 eg : 12.812510
2 12
2 36
2 6 - 0
2 18 - 0 = 1100
2 3 - 0
2 9 - 0
1 - 1
2 4 - 1
2 2 - 0 0.8125 x 2 = 1.625 = 1
1 - 0
0.625 x 2 = 1.250 = 1 = 1101
0.250 x 2 = 0.500 = 0

= ( 100100 )2 0.500 x 2 = 1.000 = 1

= ( 1100.1101 )2
 Decimal – Hexadecimal conversion
Integer or Fixed Point: 4181
eg : 4181910 16 9 10 3 5 11
16 2613 - 11
i.e
Ans = (A35B)16 16 163 - 5
10 - 3 A 3 5 B

Floating Point :
eg : 23.812510
0.8125 x 16 = 13.0000 = D
16 23
1 - 7

Ans = (17.D)16
 Decimal - Octal Conversion
Integer or Fixed Point: Floating Point :
eg : 625310 eg : 117.98210
8 117
8 6253 8 14 - 5
8 781 - 5 1 - 6 = 165
8 97 - 5
0.982 x 8 = 7.586 = 7
8 12 - 1
0.856 x 8 = 6.848 = 6
1 - 4
0.848 x 8 = 6.784 = 6
0.784 x 8 = 6.272 = 6
= 7666213

0.272 x 8 = 2.176 = 2
= ( 14155 )8 0.176 x 8 = 1.408 = 1
0.408 x 8 = 3.264 = 3
= ( 65.7666213)8
Binary - Hexadecimal Conversion
Integer or Fixed Point:
eg : 11111001101111000112
0111 1100 1101 1110 0011

7 C D E 3
Ans = ( 7CDE3 )16

Floating Point:
eg : 10110001.1002

1011 0001 . 100

Ans = ( B 1. 8 )16
B 1 8
 Binary - Octal Conversion
Integer or Fixed Point:
eg : 101101011112
010 110 101 111
2 6 5 7

Ans = ( 7CDE3 )16

Floating Point:
eg : 1101011110.11000112

001 101 011 110 . 110 001 100 Ans =

1 5 3 6 6 1 4 ( 1536.614 )16
 Binary - Decimal Conversion
Integer or Fixed Point: eg : 1101012

1 1 0 1 0 1
1 x 20 = 1
0 x 21 = 0
1 x 22 = 4
0 x 23 = 0
1 x 24 = 16
1 x 25 = 32
(53)10
 Binary - Decimal Conversion
• Floating Point eg : (11001.10101)2
1 1 0 0 1 . 1 0 1 0 1
1 x 2-5 = 0.03125
0 x 2-4 = 0.0
1 x 2-3 = 0.125
1 x 2-2 = 0.0
1 x 2-1 = 0.5
0.65625
1 x 20 = 1
1 x 21 = 0
1 x 22 = 0
1 x 23 = 8
1 x 24 = 16
Ans = (25.65625 )16 25
 Octal – Decimal conversion
• Integer eg : ( 741 )8

7 4 1
1 x 80 = 1
4 x 81 = 32
7 x 82 = 448
481

Ans = ( 481 )10

 Octal - Decimal Conversion
Floating Point eg : ( 623.401 )8

6 2 3 . 4 0 1
1 x 8-3 = 0.001953

0 x 8- 2 = 0

4 x 8-1 = 0.5

0.501953
3 x 80 =
3
2 x 81 =
16
6 x 82 =
384
403
Ans = ( 403.5019 )10
Hexadecimal – Decimal Conversion
Integer eg: ( D6C1 )16

D 6 C 1
1 x 160 = 1
1 x 161 = 192
1 x 162 = 1536
1 x 163 = 53248
54977

Ans = ( 54977 )10

 Hexadecimal – Decimal Conversion
• Floating Point eg: ( F9A.BC3 )16

F 9 A . B C 3
3 x 16-3 = 0.0007
C x 16-2 = 0.0039
B x 16-1 = 0.6875
0.6921
A x 160 = 10
9 x 161 = 144
F x 162 = 3840
3994

Ans = ( 3994.6921 )10

 Octal – Binary Conversion

Integer eg : ( 436 )8
4 3 6
100 011 110
Ans = ( 100011110 )2
Floating Point eg : ( 765.421 )8
7 6 5 . 4 2 1
111 110 101 . 100 010 001
Ans = ( 111110101100010001 )2
 Octal – Hexdecimal Conversion

Integer eg : ( BC35 )8
B C 3 5
1011 1100 0011 0101
Ans = ( 1011110000110101 )2
Floating Point eg : ( F9A . BC3 )8
F 9 A . B C 3
1111 1001 1010 1011 1100 0011
Ans = ( 111110011010101111001111 )2
 Binary Arithmetic
• Binary Arithmetic
– Addition

111011 Carries
101011 Augend
+ 11001 Addend
1000100

– Subtraction

0 1 10 0 10 Borrows
1 0 0 1 0 1 Minuend
- 1 1 0 1 1 Subtrahend
1 0 1 0
 Binary Arithmetic contd
– Multiplication Division
110 Quotient
1 1 0 1 0 Multiplicand Divider 1001 111101 Dividend
1001
x 1 0 1 0 Multiplier 1100
00000 1001
111 Remainder
11010
00000
11010
1 0 0 0 0 0 1 0 0 Product
 Hexadecimal Arithmetic
– Addition

1 0 1 1 Carries
5 B A 9 Augend
+ D 0 5 8 Addend
1 2 C 0 1 Sum

– Subtraction

9 10 A 10 Borrows
A 5 B 9 Minuend
+ 5 8 0 D Subtrahend
4 D A C Difference
 Hexadecimal Arithmetic contd
Multiplication Division
79B Quotient
B9A5 Multiplicand Divider B9 57F6D Dividend
50F
x D50 Multiplier 706
3A0390 Partial products 681
96D61 85D
7F3
9A76490 Product 6A Remainder
 Octal Arithmetic
– Addition

1 1 1 Carries
5 4 7 1 Augend
+ 3 7 5 4 Addend
11445 Sum

– Subtraction

6 10 4 10 Borrows
7 4 5 1 Minuend
- 5 6 4 3 Subtrahend
1 6 0 6 Difference
 Octal Arithmetic contd

– Multiplication Division

114 Quotient
326 Multiplicand Divider 63 7514 Dividend
x 67 Multiplier 63
114
2732 Partial products 63
364
2404 314
50 Remainder
26772 Product
 Big-Endian and Little-Endian Formats
• In a byte-addressable machine, the smallest datum that can be
referenced in memory is the byte. Multi-byte words are stored as a
sequence of bytes, in which the address of the multi-byte word is the
same as the byte of the word that has the lowest address.
• When multi-byte words are used, two choices for the order in which the
bytes are stored in memory are: most significant byte at lowest
address, referred to as big-endian, or least significant byte stored at
lowest address, referred to as little-endian.
 One, Two, Three-Address Machines
• Consider how the C expression A = B*C + D might be
evaluated by each of the one, two, and three-address
instruction types.
• Assumptions: Addresses and data words are two bytes in size.
Opcodes are 1 byte in size. Operands are moved to and from
memory one word (two bytes) at a time.
• Three-Address Instructions: In a three-address instruction,
the expression A = B*C + D might be coded as:
mult B, C, A
add D, A, A
which means multiply B by C and store the result at A. (The
mult and add operations are generic; they are not ARC
instructions.) Then, add D to A and store the result at address
 One, Two, Three-Address
Machines
• Two Address Instructions: In a two-address
instruction, one of the operands is overwritten by
the result. Here, the code for the expression A = B*C
+ D is:
load B, A
mult C, A
add D, A
The program size is now 3´(1+2´2) or 15 bytes.
Memory traffic is 15 + 2´2 + 2´2´3 or 31 bytes.
 One, Two, Three-Address Machines
• One Address (Accumulator) Instructions: A one-address
instruction employs a single arithmetic register in the CPU,
known as the accumulator. The code for the expression A = B*C +
D is now:
load B
mult C
add D
store A
The load instruction loads B into the accumulator, mult multiplies
C by the accumulator and stores the result in the accumulator,
and add does the corresponding addition. The store instruction
stores the accumulator in A. The program size is now 3´4 or 12
bytes, and memory traffic is 12 + 4´2 or 20 bytes.
 CISC vs RISC
CISC processors RISC processors
1 Complex Instruction Set Computer 1.Reduced Instruction Set Computers
(CISC) processors has a bigger (RISC) processors has a smaller
instruction set with many addressing instruction set with few addressing
modes.                             modes

2. It has to use a seperate micro-  2. It has a hard-wired programmed-

programming unit with a control unit without acontrol memory, and
memory to implement complex seperate hardware to implement each
instructions. and every instruction.

3. An easy compiler design 3. A complex compiler design.

4. The calculations are slower and 4The calculations are faster and
precise precise
5. Decoding of instruction is  complex 5. Decoding of instruction is
6.The Execution time is very high. 6. It takes a very less execution time.
 Contd..
7.  Since it uses a hardwired model,
7. It frequently needs the external
its not often, to take the external
memory access to make calculations.
memory access for calculations.

8. Pipelining does not function correctly 8. Pipeling is not a  major problem

here because of complexity in and this option speeds up the
instructions. processors.
9. These processors often stall because 9. Since the instructions are not
of pipelining problem. complex, stalling is mostly reduced.

10. Code Expansion is not a problem in 10. Code expansion can be a problem
CISC processors. in some cases in RISC processors.

11. Disc space is wasted. 11. Disc space is saved.

12. Used in High end applications

12. Used in low end applications such such us video processing,
us Security systems, Home automation telecommunications, image
processing
Functional Units
CS 2253
Software – System Software
• System Software is a collection of programs that are executed
• as needed to perform functions such as,
• Receiving and interpreting user commands
• Entering and editing application programs and storing them as
files in secondary storage devices
• Managing the storage and retrieval of files in secondary
devices.
• Running the standard application programs such as word
processors, spread sheets, or games, with the data supplied by
the user.
• Controlling I/O devices to receive input information and produce
output results.
• Translating programs from source form into object form
• Linking and running user-written appln pgms with existing
standard library routines.
 System Software Contd…
• System software is responsible for the coordination of all
activities in a computing system.
• Some of the important system software are,

 Compilers – translates high level language programs into a suitable

machine language programs.
 Text Editors –used for entering and editing application programs
 Operating System –a collection of routines used to control the
sharing and interaction among various computer units as they
execute appln pgms.
 tasks: assigning memory and magnetic disk space to program and
data files,
 Moving data between memory and disk units,
 Handling I/O operations.
 Computer Architecture Topics
Input/Output and Storage
(1/2)
Disks, WORM, Tape RAID

Emerging Technologies
DRAM Interleaving
Bus protocols

Coherence,
Memory L2 Cache Bandwidth,
Hierarchy Latency

L1 Cache Addressing,
VLSI Protection,
Instruction Set Architecture Exception Handling

Pipelining, Hazard Resolution, Pipelining and Instruction

Superscalar, Reordering, Level Parallelism
Prediction, Speculation
Instruction Set Architecture (ISA)
•Instruction Execution Cycle

Fetch Instruction From Memory

Decode Instruction determine its size & action

Fetch Operand data

Execute instruction & compute results or status

Store Result in memory

Determine Next Instruction’s address

•
Software
Machine language
Evolution.
• Assembly language
• High-level languages
• Subroutine libraries

• There is a large gap between what is

convenient for computers & what is convenient
for humans
• Translation/Interpretation is needed between
both
 Language Evolution
swap (int v[], int k)
{ int temp
temp = v[k]; High-level language
v[k] = v[k+1]; program (in C)
v[k+1] = temp;
}

swap:
muli $2, $5, 4
add $2, $4, $2 Assembly language
lw $15, 0($2) program (for MIPS)
lw $18, 4($2)
sw $18, 0($2)
sw $15, 4($2)
jr $31

0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 00 00 00 00 1 1 0 0 0
0 00 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 1
1 00 0 1 1 0 0 0 1 1 0 0 0 1 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0 Binary machine language
1 00 0 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 00 0 0 0 0 00 0 0 1 0 0 program (for MIPS)
1 0 1 0 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 00 0 0 0 0 00 0 0 0 0 0
1 0 1 0 1 1 0 0 0 1 1 0 0 0 1 0 0 0 0 00 0 0 0 0 00 00 1 0 0
0 00 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 1 0 0 0
 HW - SW Components
• Hardware
– Memory components • Software
• Registers – Data
• Register file • Simple
• memory – Characters
• Disks – Integers
– Functional components – Floating-point
• Adder, multiplier, – Pointers
dividers, . . . • Structured
• Comparators – Arrays
• Control signals – Structures
( records)
– Instructions
• Data transfer
• Arithmetic
• Shift
• Control flow
• Comparison
• ...
 Levels of Abstraction
A p p lic a tio n s

O p e r a tin g S y s te m

C o m p ile r F ir m w a r e
In s tr u c tio n S e t A r c h ite c tu r e

In s tr u c tio n S e t P r o c e s s o r I/O S y s te m
D a ta p a th & C o n tro l
D ig ita l D e s ig n
C ir c u it D e s ig n

Layout

S/W and H/W consists of hierarchical layers of abstraction, each hides

details of lower layers from the above layer
The instruction set arch. abstracts the H/W and S/W interface and allows
many implementation of varying cost and performance to run the same S/W
 Higher level languages
• Assembly language
– First step from machine language
– Uses symbolic names for operations and to refer to memory locations
– Translation of assembly language into machine language: in the beginning
done manually, later done by a special computer program – the assembler
– Low-level language:
• programmer must learn the instruction set of the particular processor
• Program must be rewritten in order to run on a different processor type –
program is not portable
• High level languages
– Writing portable programs, using more abstract instructions
– A high level instruction (statement) is translated into many machine
instructions
– Translation of high level language into machine instructions: done by
special computer programs – compilers or interpreters
– First high-level language: FORTRAN