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UNIT-2 Computer Arithmatic

This document provides a summary of a presentation on computer arithmetic given by Dr. Kapil Kumar Nagwanshi at Amity University Rajasthan. It discusses: - The Arithmetic Logic Unit (ALU) which handles integer calculations. - Integer representation using binary numbers, sign-magnitude representation, and two's complement representation. - How addition, subtraction, multiplication and division are performed on integers using the different representations. - Representation of real numbers using floating point representation as defined in the IEEE 754 standard.

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Kapil Nagwanshi
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32 views

UNIT-2 Computer Arithmatic

This document provides a summary of a presentation on computer arithmetic given by Dr. Kapil Kumar Nagwanshi at Amity University Rajasthan. It discusses: - The Arithmetic Logic Unit (ALU) which handles integer calculations. - Integer representation using binary numbers, sign-magnitude representation, and two's complement representation. - How addition, subtraction, multiplication and division are performed on integers using the different representations. - Representation of real numbers using floating point representation as defined in the IEEE 754 standard.

Uploaded by

Kapil Nagwanshi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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A Presentation

at
Amity University Rajasthan

C0mputer Ar1+hmet1c
Dr. Kapil Kumar Nagwanshi
[email protected]
Arithmetic & Logic Unit

Everything else in
Does the the computer is
Handles integers
calculations there to service
this unit

May handle May be separate May be on chip


floating point FPU (maths co- separate FPU
(real) numbers processor) (486DX +)
ALU Inputs and Outputs
Integer Representation

Positive
numbers
stored in
Only have 0 & binary
No decimal Sign- Two’s
1 to represent No minus sign
• e.g. 41=00101001 point Magnitude compliment
everything
Sign-Magnitude

Problems
• Need to consider both
-18 = 10010010 sign and magnitude in
arithmetic
• Two representations
+18 = 00010010 of zero (+0 and -0)

1 means negative

0 means positive

Left most bit is


sign bit
Two’s Compliment
• +3 = 00000011 -128
+064
• +2 = 00000010 +032
• +1 = 00000001 +016
-128 64 32 16 8 4 2 1
• +0 = 00000000 +008
1 1 1 1 1 1 0 1
+004
• -1 = 11111111 +000
• -2 = 11111110 +001
-------
• -3 = 11111101 -003
Value Box
Benefits

One representation
of zero

Arithmetic works
easily (see later)
• 3 = 00000011
Negating is fairly • Boolean complement gives 11111100
easy • Add 1 to LSB 11111101
Negation (+18-18)
• Take the Boolean complement of each bit of integer (including
sign bit).
• Treating the result as an unsigned binary integer, add 1
• See Example

+18 0 0 0 1 0 0 1 0
Com 1 1 1 0 1 1 0 1
+ 1
Res 1 1 1 0 1 1 1 0  -18
Negation Special Case 1
• 0= 00000000
• Bitwise not 11111111
• Add 1 to LSB +1
• Result 1 00000000
• Overflow is ignored, so:
•-0=0
Negation Special Case 2
• -128 = 1000 0000
• bitwise not 0111 1111
• Add 1 to LSB +1
• Result 1000 0000
• So:
• -(-128) = -128 X (for n bit 2’s complement system there is only
representation for -2n not for +2n.
• Monitor MSB (sign bit)
• It should change during negation
Range of Numbers
• 8 bit 2s compliment
• +127 = 01111111 = 27 -1
• -128 = 10000000 = -27
• 16 bit 2s compliment
• +32767 = 011111111 11111111 = 215 - 1
• -32768 = 100000000 00000000 = -215
Conversion Between Lengths
• Positive number pack with leading zeros
• +18 = 00010010
• +18 = 00000000 00010010
• Negative numbers pack with leading ones
• -18 = 10010010
• -18 = 11111111 10010010
• i.e. pack with MSB (sign bit)
Addition
and
Subtractio
n Normal Monitor sign
binary bit for
addition overflow

So we only Take twos


need addition compliment
and of substahend
complement and add to
circuits minuend
• i.e. a - b =
a + (-b)
Hardware for Addition and
Subtraction
Multiplication

Complex

Work out partial product for each digit

Take care with place value (column)

Add partial products


Multiplication Example
• 1011 Multiplicand (11 dec)
• x 1101 Multiplier (13 dec)
• 1011 Partial products
• 0000X Note: if multiplier bit is 1 copy
• 1011XX multiplicand (place value)
• 1011XXX otherwise zero
• 10001111 Product (143 dec)
• Note: need double length result
Unsigned Binary Multiplication
Multiplying Negative Numbers
• This does not work!
• Solution 1
• Convert to positive if required
• Multiply as above
• If signs were different, negate answer
• Solution 2
• Booth’s algorithm
Booth’s
Algorithm
Example of Booth’s
Algorithm
Multiplicand (M) = 1011(-5), i.e -M= 0101
Multiplier (Q) =1110 (-2), And initially Q-1=0, Count =4
Division
• More complex than multiplication
• Negative numbers are really bad!
• Based on long division
Division of Unsigned Binary Integers
00001101 Quotient
Divisor 1011 10010011 Dividend
1011
Partial 001110
1011
Remainders
001111
1011
Remainder
100
Flowchart for
Unsigned
Binary Division
Real Numbers
Could be done in
Numbers with pure binary Where is the
fractions • 1001.1010 = 24 + 20 +2- binary point?
1
+ 2-3 =9.625

Fixed? Moving?
• Very limited • How do you show
where it is?
Floating Point

Sign bit Biased Significand or Mantissa


Exponent

• +/- .significand x 2exponent


• Contradiction
• Point is actually fixed between sign bit and body of
mantissa
• Exponent indicates place value (point position)
Floating Point Examples
Signs for Floating Point
• Mantissa is stored in 2s compliment
• Exponent is in excess or biased notation
• e.g. Excess (bias) 128 means
• 8 bit exponent field
• Pure value range 0-255
• Subtract 128 to get correct value
• Range -128 to +127
Normalization
• FP numbers are usually normalized
• i.e. exponent is adjusted so that leading bit (MSB) of mantissa is 1
• Since it is always 1 there is no need to store it
• (c.f. Scientific notation where numbers are normalized to give a single
digit before the decimal point
• e.g. 3.123 x 103)
FP Ranges
• For a 32 bit number
• 8 bit exponent
• +/- 2256  1.5 x 1077
• Accuracy
• The effect of changing lsb of mantissa
• 23 bit mantissa 2-23  1.2 x 10-7
• About 6 decimal places
Expressible Numbers
Density of Floating Point Numbers
IEEE 754
• Standard for floating point storage
• 32 and 64 bit standards
• 8 and 11 bit exponent respectively
• Extended formats (both mantissa and exponent) for intermediate
results
IEEE 754 Formats
FP Arithmetic +/-
• Check for zeros
• Align significands (adjusting exponents)
• Add or subtract significands
• Normalize result
FP
Add
itio
n&
Sub
trac
tion
Flo
wc
har
t
FP Arithmetic x/
• Check for zero
• Add/subtract exponents
• Multiply/divide significands (watch sign)
• Normalize
• Round
• All intermediate results should be in double length storage
Floating
Point
Multiplicatio
n
Floating Point
Division
Required Reading
• Stallings Chapter 9
• IEEE 754 on IEEE Web site

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