Differential Amplifiers

•Differential Configuration Examples:

Input stage of Differential OP Amp. (MOS device)
Input stage of ECL (BJT device)
•The reason why differential amplifier are so well suited for IC
fabrication:
Providing better matched devices;
In differential configuration, it needs more components.
Using “IC integration” makes the circuit much compact as
the original purpose of “integration”.
 What is a Differential Amplifier ?
Some Definitions and Symbols

 Differential Amplifier: A differential amplifier is an amplifier that amplifies the

difference between two voltages and rejects the average or common mode value
of the two voltages.

Symbol for a
Differential v1
v2 vout
Amplifier

 Differential-mode input voltage, vID , is the voltage difference between v1 and v2 .

 Common-mode input voltage, vIC , is the average value of v1 and v2 .

Therefore vID = v1 - v2 and vIC = (v1 + v2) / 2

 •Reasons for using “differential” in preference to “single-end”:
Differential circuits are much less sensitive to noise and
interference than single-ended circuits;
In general, the bias of differential circuit is suitable for
“direction couple”, no need the coupling capacitors.
VDD

Vout
2/3
3/3
2/3
1/3
1/3

1/3 2/3 3/3 Vin

•The BJT Differential Pair
•The BJT Differential Pair (cont.)
•Input Differential Resistance
(a) with internal re :
vid
Rid   (1   ) 2re  2 r
ib
(b) with external resistance R e :
Rid  (1   ) (2re  2 Re )

•Differential Voltage Gain

vc1  vc 2
Ad    g m RC (differential )
vd
vc1 1
Ad    g m RC (single - ended)
vd 2
 (2 RC ) RC
Ad    ( with degenerate resistance)
2re  2 Re re  Re
•Input Common-Mode Resistance
2 Ricm  (1   ) (2 REE // ro ) (two half - circuits in parallel)
ro
Ricm  (1   ) ( REE // )
2

Figure 7.23 (a) Definition of the input common-mode resistance Ricm. (b) The
equivalent common-mode half-circuit.
[to be continued]
•Common-Mode Gain and CMRR
•Ideal case : the constant current source has infinite resistance;
•Real case : the constant current source has finite resistance;
•CMRR  the ratio of these different gains.

 RC  RC  RC  RC
vc1  vicm  vicm ; vc 2  vicm  vicm
2 REE  re 2 REE 2 REE  re 2 REE
vc1  RC 1
Acm   (single - ended) ; Ad  g m RC
vicm 2 REE 2
Ad
 CMRR   g m REE (single - ended)
Acm
Ad
in decibels, CMRR  20log .
Acm
•Effect of RC Mismatch on CMRR
 RC RC
Acm  
2 REE RC
Ad   g m RC
Ad 2 g m REE
 CMRR  
Acm (RC / RC )

•Effect of gm Mismatch on CMRR

2 g m REE
CMRR 
( g m / g m )
•Two factors contribute to the dc offset in BJT’s

(a) mismatch in Load resistance RC;

(b) mismatch in Saturation current IS;

(c) other factors like  or ro. ( 略 )

2 2
 RC   I s 
Vos  VT      
 RC   I s 
where VT  0.0259 V
(a)Mismatch in Load resistance RC:

RC RC
RC1  RC  and RC 2  RC 
2 2
these makes
 I RC
VC1  VCC  ( RC  )
2 2
 I RC
VC 2  VCC  ( RC  )
2 2
Therefore , the input offset voltage is
Vo VC 2  VC1 RC
Vos    VT ( )
Ad  ( I / 2)  RC
   RC
 VT 
(b) Mismatch in the Scale Current Is:
I S I
I S1  I S  and I S 2  I S  S
2 2
Since that VBE1  VBE 2 ,
V
and I C  I S  exp( BE );
VT
I I
I E1  (1  S )
2 2I S
I I
IE2  (1  S )
2 2I S
These make
I  I S   I S 
Vo       RC and VOS  VT  
2  IS   IS 
•Input Bias and Offset Currents of the Bipolar Pair
If a perfectly symmetric differential pair :
( I / 2)
I B1  I B 2 
1 
 
If mismatch in current gain  : Let 1    and 2   
2 2
I 1 I 1   
 I B1   1  
 
2 1  (  ) 2 1    2 
2
I 1 I 1   
I B2   1  

2 1  (  ) 2 1    2 
2
I 1    I B1  I B 2      
I OS         I B   
2 1     2      
I B1  I B 2
where defines the input bias current I B  (average value)
2
•Input Common-Mode Range

VCC-ICRC

I
vCM ,max  (VCC  RC )  0.4V
2
vCM ,min  VSS  VCE ,sat ( 0.3V )  VBE
•Common-mode Gain and CMRR (for BJT)
vicm 1
i1  i2  and vb3  i1 ( // r // ro3 // r 4 )
2 REE g m3
 vo  ( g m 4vb3  i2 ) ro 4
Therefore ,
vo r 1
Acm   o4 [ g m4 ( // r // ro3 // r 4 )  1]
vicm 2 REE g m3
1 1 1
 
ro 4 r 3 r 4 ro3

2 REE 1 1 1
g m3   
r 3 r 4 ro3
Ad  3 REE
CMRR   g m (ro 2 // ro 4 )( )
Acm ro 4
1
CMRR   3 g m REE ( for ro 2  ro 4  ro )
2
Figure 7.33 Analysis of the bipolar active-loaded differential
amplifier to determine the common-mode gain.
•Systematic Input Offset Voltage
Due to the error in the current transfer ratio of
the current-mirror load caused by the finite  of the PNP
transistors that make up the mirror.

I4 1 I /2
  I4 
I3 1  2 1
2
 pnp  pnp
I I /2  I 1  I
i     (1  )
2 1 2 2 1
2  pnp
 pnp  pnp
To reduce this output current to zero, an input
voltageVOS has to applied with a value of
 I
i  pnp 2V
VOS    T
Gm  I  pnp
2VT
(c) Frequency Response of CMRR:

Ad ( s )
CMRR ( s ) 
Acm ( s )

Figure 7.37 Variation of (a) common-mode gain, (b) differential gain, and (c) common-mode rejection
ratio with frequency.