Pic18f Intro
Pic18f Intro
16 bit
2 MB
221
8 bit
4 KB
212
PIC18F Memory
Program Memory: 32 K (215)
Address range: 000000 to 007FFFH
16-bit registers
Data EEPROM
Not part of the data memory space
Addressed through special function registers
Microprocessor Unit
Registers
Bank Select Register (BSR)
4-bit register used in direct
addressing the data memory
FFF=212=16x256=4096=4K
PIC18F – Data Memory with Access Banks
100h
Bank 1
GPR
FFF=212=16x256=4096=4K 1FFh
200h
Bank 2
Data Memory up to 4k bytes GPR Access Bank
2FFh
Data register map - with 12-bit Access RAM (GPR)
00h
7Fh
address bus 000-FFF
80h
Access SFR
Divided into 256-byte banks D00h FFh
Bank 13
There are total of F banks GPR
256 Bytes
DFFh
Half of bank 0 and half of E00h GPR=General Purpose Reg.
bank 15 form a virtual bank Bank 14 SFR=Special Function Reg.
GPR
that is accessible no matter EFFh
which bank is selected F00h
Bank 15 GPR
F7Fh
F80h
FFFh Access SFR
PIC18F I/O Ports
Five I/O ports
PORT A through PORT E
Most I/O pins are multiplexed
Generally have eight I/O pins with
a few exceptions
Addresses already assigned to
these ports in the design stage
Each port is identified by its
assigned Special Function
Registers (SFR)
PORTA (address of F80)
PORTB (address of F81)
these are part of data memory or
register file
TRISB must be set to specify signal direction of
PORT B.
Support Devices
Support Devices
Timers
A value is loaded in the register and continue changing at every clock
cycle – time can be calculated
Can count on rising or falling edge
There are several timers: 8-bit, 16-bit
Controlled by SFR
Addressable USART
Another serial data communication
A/D converter
Parallel Slave Port (PSP)
Capture, Compare and PWM (CCP Module)
PIC18F Special Features
Sleep mode
Power-down mode
Watchdog timer (WDT)
Able to reset the processor if the program is caught in
unknown state (e.g., infinite loop)
Code protection
EEPROM can be protected through SFR
In-circuit serial programming
In-circuit debugger