Computer Organization &

Architecture
 Computer Organization

 Computer Organization is concerned with the way

the hardware components operate and the way they
are connected together to form the computer system.

 Computer Organization refers to the operational

units and their interconnections. Organizational
attributes include those hardware details transparent
to the programmer, such as control signals,
interfaces between computer and peripherals, and
the memory technology used.
 Computer Design

 Computer design is concerned with the hardware

design of the computer. Computer Design is
concerned with the determination of what hardware
should be used and how the parts should be
connected. This aspect of the computer hardware is
sometimes referred to as computer implementation.
 Computer Architecture

 Computer Architecture is concerned with the

structure and behavior of the computer as seen by
the user. It includes the information, formats, the
instruction sets, and techniques for addressing
memory.

 Architectural design of a computer system is

concerned with the various functional modules, such
as processors and memories, and structuring them
together into computer system.
There are two basic types of architecture

 Von Neumann Architecture

 Harvard Architecture
 Von Neumann Architecture

 The Von Neumann Architecture has a single storage structure to

hold both instructions and data. The CPU can be either reading
an instruction or reading / writing data from / to the memory
because instructions and data use the same BUS system.

 According to non Neumann Architecture structure of computer

system as composed of the following components:-

 Central Processing Unit

The unit is called as arithmetic and logic unit. This unit performs
the computer’s computational and logical functions.

 Memory
Computer system uses several memories for the storage of binary
information like RAM(Random Access Memory), ROM etc.
 Control Unit
 This unit directs other components of the computer system to
perform certain actions, such as directing the fetching of data or
instructions from memory to be processed by processed by the
ALU.

 Man-Machine Interface
 Input and output devices such as keyboard for input and display
monitor for output.

 Random Access Memory (RAM)

 Central Processing Unit (CPU)
 Input-Output Processor(IOP)
 Input Devices
 Output Devices
In the Von Neumann Architecture, Program and data are stored in the same memory and managed by the same
information-handling subsystem.
Example : Desktop Personal Computer.
 Harvard Architecture

 The Harvard Architecture has a physically separated

storage and signal pathways for instructions and data.
 In the Harvard Architectural Computer, the CPU can
read both an instruction and data from memory at the
same time, leading to double the memory bandwidth.
In the Harvard architecture, program and data are
stored and handled by different subsystems.
 Example: - Microcontroller based computer system
(Single-chip microcomputer) and DSP (Digital signal
Processor) based computer systems.
 A Microcontroller with Harvard Architecture can
both read an instruction and perform a data
memory access at the same time, even without a
cache. A Harvard Architecture microcontroller can
thus be faster for a given circuit complexity
because instruction fetches and data access do not
contend for a single memory pathway.
HARDVARD ARCHITECTURE
 REGISTER TRANSFER LANGUAGE

 A Language in which the symbolic notation is used to

describe the micro operation transfer among
registers is called a register transfer language.

 Here ‘Register Transfer’ means a logic circuit that

performs micro operations and transfer the result of
the operation to the same or another register.
 REGISTER TRANSFER

 Computer registers are designated by capital letters

to denote the function of the register.
 For example: the register that an address for the
memory unit is called a memory address register and
is designated by the name MAR, other designations
for the register are PC (for program counter), IR(
instruction register), and R1 ( for processor register).
 In this register, if the register is of n-bit then the
numbering is started in sequence from 0 to n-1
starting from 0 in the right most position and
increasing the number toward leftmost side.
 Fig 4-1 shows the representation of register in block
diagram form the most common way to represent a
register is by a rectangular box with the name of
register inside as in fig. 4-1 a. the individual bits can
be distinguished in 4-1 b. the numbering of bits in 16
bit register can be marked on the top of the box as
shown in the fig 4-1 c. A 16 bit register is divided
into two parts in 4-1 d. bits 0 through 7 are assigned
the symbol L ( for the low bytes) and bits 8 through
15 are assigned the symbol H( for high byte). The
name of 16 bit register is PC.
 (5) Information transfer from one register to another is designated
in symbol form by means of a replacement operator in the
statement.
R2  R1
 Denotes the transfer of the content of register R1 into register R2.
By definition the content of the source register R1 does not change
after the transfer.

 (6) Normally we want the transfer to occur only under a

predetermined control condition. This can be shown by means of an
of than statement
If (P=1) than ( R2  R1)
 Where p is a control function which is a Boolean variable that is
equal to 1 or 0 the control function in the statement as follows
P: R2  R1
(7) Symbols of Register Transfer :
Some symbols are used in Register Transfer Language to describe the
expression.
 (2)BUS TRANSFER

 A BUS is the set of common lines (wires) in which each

line is used for one bit of the register through which
binary information is transferred at a time.

 A digital computer has many registers and path must be

provided to transfer information from one register to
another. The number of wires will be increased if
separate lines are used between each register and all the
other registers in the system. A more efficient scheme for
transferring information between registers in a multiple
register configuration in a common bus system. The bus
structure contains of a set of common lines one for each
bits of a register, through which binary information is
transferred one at a time.
 These are two ways to construct common bus
systems

 With the help of multiplexer

 With three state bus buffers

One way of constructing common bus system is with
multiplexer. The multiplexer select the source register
whose binary information is then placed on the bus. The
construction of a bus system for four register is shown in
figure 4-3. The BUS consists of four 4X1 multiplexer and
two control signals s0 and s1. The MUX 0 multiplexes the
four 0 bits of the register.
 Mux1 multiplexer multiplexes the four 1 bits of
the register and similarly for the other two bits.

 In general a bus system will multiplex k register of

bits. The number of multiplexer needed to construct
the bus is equal to n, the number of bits in each
register. The size of the multiplexer must be k*1
since it multiplexes k data lines.
The transfer of information from a bus into one of many destination register can
be accomplished by connecting bus lines to the inputs of all destination register.
For ex:- BUS C , R1  BUS
The content of register C is placed on the bus, the content of bus is loaded into
register R1 by activating load input.
 THREE STATE BUS BUFFERS

 A bus system can be constructed with three state

gates instead of multiplexer. A three state gate is a
digital circuit that exhibits three states. Two of the
states are signal equivalent to logic 1 and logic 0 and
third state is high impedance state. In this state
output does not have logic significance.
The graphic symbol of a three state buffer
gate is shown in figure 4-4.
it is distinguished from a normal buffer having
both a normal input and control input.
 The construction of a bus system with three state
buffer is shown in figure 4-5. The outputs of 4 buffer
are connected together to form a single bus line.
 One way to ensure that no more than one control
input is activated at a time is use a decoder. When
enable input of decoder is 0, bus is in high
impedance state.
 To construct a common bus system for four register
of n bits each using three state buffer, we need n
circuit,
 The outputs of four buffers are connected together to
form a single bus line. The control inputs to the
buffer determine which of the four normal inputs
will communicate with the BUS line. Only one buffer
can be in active at a time.
 When the enable input of the decoder is 0, all of its
four outputs are 0, and the BUS line is in high
impedance state because all four buffers are
displayed. When the enable input is active, one of
the three state buffers will be active, depending on
the binary value in the select inputs of the decoder.
 MEMORY TRANSFER

 The operations of memory unit are memory read and memory

writes. The transfer of information from a memory word to the
outside environment is called read operation. the transfer of new
information to be stored into the memory is called a write
operation, a memory word is symbolized by the letter M.
 Memory Read: Consider a memory unit that receives the
address from a register, called a register denoted by AR. The
data are transferred to another register called data register
denoted by DR. The read operation can be stated as follows:-
Read: DR  M[AR]
 This causes a transfer of information into DR from word M
selected by the address in AR.
 Memory Write: The write operation transfers
the content of a data register to a memory word M
selected by the address. Consider that input data
are in register R1 and address is in AR. The write
operation can be stated symbolically as follows:
Write: M[AR]  R1
 This causes a transfer of information from R1 into
the memory word M selected by address in AR.
 MICROOPERATION

 The Micro operation is an elementary operation

performs on the information stored in one or more
register. The result of the information may replace
the previous binary information of a register. Or may
be transferred to another register.
 Examples of Micro operation are shift, count
, clear and load.
 The Micro operation most often encountered in
digital computer is classified into four categories.
 Register transfer Micro operation transfers binary
information from one register to another.

 Arithmetic micro operation performs arithmetic

operation on numeric stored in register.

 Logic Micro operation performs bit manipulation

operations on the numeric data stored in register.

 Shift Micro operation performs shift operation on the

data stored in the register.
 Register transfer Micro operation does not change
the information content when information moves
from source register to the destination register. The
statement R2  R1 Denotes a transfer of the
content of register R1 into another register R2 
called replacement operator.
 The arithmetic Micro operation, logic micro
operation and shift Micro operation change the
information content during the operation.
 ARITHMETIC MICROOPERATION

 Arithmetic operation are performed on the stored

binary information in the register is called as
Arithmetic Micro operation. The basic arithmetic
operations are add, subtract, increment,
decrement, complement and shift. All other
arithmetic operations can be obtained from variation
or a sequence of these basic operations. This micro
operation changes the content of register after
transfer.
 Add Micro operation

 This micro operation adds the content of the one

register with the content of the another register and
transfer the result into a third register. We require
three registers R1, R2, and R3 and functions that
perform operations such as parallel adder.
 For example- R3  R1 +R2
 This micro operation state that the content of
register R1 is added with the content of register R2
and result is transferred into the third register R3.
 LOGIC CIRCUIT: FULL ADDER and BINARY
ADDER are examples of the add microoperation.
 Full adder: The digital circuit that performs the
arithmetic sum of the two bits and a previous carry is
called a full adder.
 Full adder adds the three bits and produces
the two output sum and carry.
 Binary adder : The digital circuit that generates
the arithmetic sum of two binary numbers of any
length is called a binary adder. the binary adder is
constructed with full adder circuits connected in
cascade with the output carry from one full adder
connected to the input carry of the next adder. Here,
we have designed 4 bit binary adder.
 Subtract micro operation : This micro operation
subtracts the content of one register from content of
another register and result is transferred into third
register. In computer systems, the subtraction is
performed through complement and addition of the
contents. if two’s complement of a number is added
with the another number then its subtraction
operation is performed in the computer.

 For example: R3  R1 +R2’+1

 Adding to the content of the R1 with 2’s complement of
R2 is equivalent to R1 – R2, in the above statement R2’
is the 1’s complement and 1 is added to find 2’s
complement of R2.
 Logic circuit :-binary adder and subtractor is an
example of subtract micro operation.
 Binary adder – subtractor: Addition and subtraction
operations can be combined into one common circuit by
including an XOR gate with each full-adder. The mode
input M control the operation .when the M=0 the circuit
is an adder and when the m=1 then the circuit is a
subtractor. each XOR gate receives input M and one of
the inputs B. When M=0 we have B XOR 0 = B. when
M=1, we have B XOR 1 =B’ and C0=1.
 B3 A3 B2 A2 B1 A1 B0 A0

FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0
 (iii) increment microoperation : This microoperation
increments the one value of register.
 For example:- R1<-R1+1
 Logic circuit: binary’s incrmenter is the example of
increment microoperation.

 Binary incrementer : The increment microoperation adds one to
a number in a register.
 For example if a 4 bit register has a binary value 0110 , it will go to
the 0111 after increment. This microoperation is implemented with
a binary counter .every time the count enable is active, the clock
pulse transition increments the content of the register by one. Here
4 bit combinational circuit has implemented.
 The circuit receives the four bits A0 to A3 ads one to it and
generates the incremented output S0 through A3.
The circuit receives the four bits A0 to A3 ads one to it and
generates the incremented output S0 through A3.

A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0
 (iv) Decrement Microoperation: This microoperation
decrement one values from value of register.
For example: R1  R1-1
B’ is the symbol of the 1’s complement of B. adding 1 to
the 1’s complement gives the 2’s complement of B.
F  A+B Content of A plus B transferred to F.
F  A-B Content of A minus B transferred to F.
B  B’ Complement register B.
B  B’+1 Forms the 2’s complement.
F  A+B’+1 A plus 2’s complement of B.
A  A+1 Increment A
A  A-1 Decrement A
 ARITHMETIC CIRCUIT

 Arithmetic circuit can be implemented in one composite arithmetic circuit.

the basic component of an arithmetic circuit is parallel adder.
 Diagram of 4 bit parallel circuit is shown. This circuit is used for all
arithmetic Micro operation in which 4bit binary adder and 4 multiplexer
are used. in each full adder , two inputs X & y are passed. The four A input
is passed to the X input of full adder and four B input is passed to the Y
input of each full adder through multiplexer A and B are 4bit numbers
where A has A3A2A1A0 and B has B3B2B1Bo0. The four inputs of B has its
normal and complement value which is input into 0, 1 position input of
each multiplexer .the input 0 and 1 is passed to the 2,3 position of each
multiplexer. A carry Cin is passed to each full adder of 4 bit binary adder.
 The four multiplexer uses two common selection lines s0, s1 to select the
number of input value. In this arithmetic circuit the output of binary
adder is calculated from the expression given below:-
 The OIP of binary adder is calculated by:
D = A +Y+Cin
 Where A is 4 bit binary number at the X inputs and B is 4 bit binary
number at Y input. C is the input for carry.
Addition: when S0S1=00, the 0 input of all the multiplexer is selected and passed to the Y input of the adder.in
this condition,
D=A+B when Cin =0 and
D=A+B+1 when Cin =1.
It means this circuit will work like half adder and full adder.

Subtraction: We know that to subtract any number , 2’s complement of that number is added.2’s
complement is equal to the 1’s complement +1.

When S0S1=01 the 1 input(B’) is passed to the Y input of adder

If Cin =0 than D=A+B’
And if Cin=1 than subtraction is performed.
D=A+B’+1 where (B’+1. Is 2 complement of B)

Increment :- when the S0S1=10 the third input 0 is passed to each Y input of adders.
If Cin=0 then D=A
If Cin =1 then D=A+1

Decrement: When S0S1=11 the fourth input 1 is passed to each adder.

if Cin =0, then D=A+(1111)= A+(2’s complement of 0001)=A-1
if Cin =1 then D=A-1+1=A
 LOGIC MICRO OPERATION

 Logic micro operation specify binary operation for

the string of bits stored in register. For ex- the EX-
OR micro operation with content of two register R1
and R2 is given by
P : R1  R1 XOR R2
It specify a logic micro operation to be executed
when control variable P=1
Specify binary operations on the strings of
bits in registers

 Logic micro operations are bit-wise operations, i.e.,

they work on the individual bits of data.
 useful for bit manipulations on binary data.
 useful for making logical decisions based on the bit
value
 LIST OF LOGIC MICROOPERATION

 16 different logic operations with 2 binary vars.

 Truth tables for 16 functions of 2 variables and the
corresponding 16 logic micro-operations.
 APPLICATIONS OF LOGIC
MICROOPERATIONS
• Logic microoperations can be used to manipulate individual bits or a
portions of a word in a register

• Consider the data in a register A. In another register, B, is bit data that

will be used to modify the contents of A

– Selective-set AA+B
– Selective-complement AAB
– Selective-clear A  A • B’
– Mask (Delete) AA•B
– Clear AAB
– Insert A  (A • B) + C
– Compare AAB
 SELECTIVE SET

• In a selective set operation, the bit pattern in B is used to set certain

bits in A

1 1 0 0 At
1010 B
1 1 1 0 At+1 (A  A + B)

• If a bit in B is set to 1, that same position in A gets set to 1, otherwise

that bit in A keeps its previous value
 SELECTIVE COMPLEMENT

• In a selective complement operation, the bit pattern in B is used to

complement certain bits in A

1 1 0 0 At
1010 B

0 1 1 0 At+1 (A  A  B)

• If a bit in B is set to 1, that same position in A gets complemented from

its original value, otherwise it is unchanged
 SELECTIVE CLEAR

• In a selective clear operation, the bit pattern in B is used to clear

certain bits in A

1 1 0 0 At
1010 B

0 1 0 0 At+1 (A  A  B’)

• If a bit in B is set to 1, that same position in A gets set to 0, otherwise it

is unchanged
 MASK OPERATION

• In a mask operation, the bit pattern in B is used to clear certain bits in

A

1 1 0 0 At
1010 B

1 0 0 0 At+1 (A  A  B)

• If a bit in B is set to 0, that same position in A gets set to 0, otherwise it

is unchanged
 CLEAR OPERATION

• In a clear operation, if the bits in the same position in A and B are the
same, they are cleared in A, otherwise they are set in A

1 0 1 0 At
1010 B

0 0 0 0 At+1 (A  A  B)
Timing signal
 INSTRUCTION CYCLE:

 (1) Fetch an instruction from the memory.

 (2) Decode the instruction.
 (3) Read the effective address from the
memory if the instruction has an indirect
address.
 (4) Execute instruction.
(1) FETCH AN INSTRUCTION FROM THE
MEMORY
 Initially PC is loaded with the address of the first
instruction of the program. the sequence counter
(SC) is cleared to 0.after each clock pulse , SC is
incremented by one , so that the timing signals go
through a sequence T0,T1,T2, and so on.
T0:AR PC
T1:IRM[AR],PC PC+1
(2) Decode the instruction: The fetched
instructions are decoded at time T2,which can be
specified with the microoperation.:-

T2D0....D7  decode IR [ 12-14 ],

AR IR (0-11),
I IR(15)
 (3) Read effective address:
D7’IT3 : AR M[AR]
Other instruction are identified with the specified
control function and executed.
D7’I’T3: nothing
D7I’T3: execute register –reference
instruction
D7IT3: execute an input –output instruction
 (4) Execute the instruction: After fetching the
indirect address from the memory, instructions are
executed and SC is initialized with 0 sign and
control is passed to the first step.
 Types of instruction:
there are three types of instructions:
1. Register Reference instruction
2. Memory Reference instructions
3. Input –output instruction
 (1) Register –Reference Instruction:-
instruction which has operation code D7=111 and i=0
then it is called as register –reference instruction
 The first seven register-reference instructions
perform clear, complement, circular shift, and
increment microoperation n the AC or E registers.
 The next four register cause a skip of the next
instruction in sequence when a stated condition is
satisfied.
 (2) Memory Reference Instructions: An
instruction which has operation code D7=000 to 110
and i=1 or 0 then it is called memory –reference
instructions.
 (1)AND to AC :- this is an instruction that performs the AND
logic operation on pairs of bits in AC and the memory word
specified by the effective address. the result of the operation is
transferred to AC. the microoperation that executes this
instruction are:-
D0T4 : DR M[AR]
D0T5:ACAC DR,SC0

 (2) ADD to AC :- this instruction adds the contents of the

memory word specified by the effectiveness address to the
value of AC .the sum is transferred to AC and the output carry
is transferred E flip flop.
D0T4:DRM[AR]
D0T5: ACAC+DR,ECount, SC0
 (3) LDA : load to AC:- this instruction transfers the
memory word specified by the effective address to AC.
the microoperation needed to execute this instruction
are:-
D2T4 : DR M[AR]
D2T5 :AC DR,SC0

 (4) STA : store AC:- this instruction stores the content

of AC into the memory word specified by the effective
address .
D3T4 :M[AR] AC, SC 0
 (5) BUN: branch unconditionally : this instruction transfers the
program to the instruction specified by the effective address. this
instruction allows the programmer to specify an instruction out of
sequence and we say that program branches unconditionally. the
instruction is executed with one microoperation.
D4T4:PC AR,SC0

 (6) BSA: branch and save return address: this instruction is useful
for branching to a portion of the program called subroutine or
procedure .when executed , the BSA instruction stores the address
of next instruction in sequence into a memory location specified by
the effective address.
D5T4: M[AR] PC , AR AR+1
D5T5 :PC AR,SC 0
 (7) ISZ: increment and skip if zero:- this instruction
increments the word specified by the effective
address and if the incremented value is equal to
zero, PC is incremented by 1.
D6T4: DR  M[AR]
D6T5:DR DR+1
D6T6 M[AR] DR, if DR=0
then PC PC+1, SC 0
 (3) Input –output Instruction :- input-output
instructions have an operation code 1111 and are
recognized by the control when D7=1 and I=1
 Timing and control :

 The timing for all register of computer is controlled

by a master clock generator.
 The control signal are generated in the control unit
and provides control inputs for multiplexors in the
common bus, control inputs in the processor
registers and microoperation for accumulator.
 There are two types of control organization:
1. Hardwired Control
2. Micro-Programmed Control
 Hardwired control:

 In this hardwired organization, the control logic is

implemented with gates, flip-flops, decoders and
other digital circuits. If the design has to be modified
or changed it requires changes in the wiring among
the various components.
 Construction and working:

 Construction and working: The control unit consists

of two decoders, a sequence counter and a number of
control logic gates. A read instruction is placed in the
instruction register(IR).
 in this instruction register, there are 3 parts-1 I bit,
operation code, and bits 0 to 11.I bit is transferred to flip
–flop ,the operation code in bits 12 through 14 are decode
in D0-D7 by 3:8 decoder, bits 0 to 11 is applied to control
logic gates.
 Next counter decoder 4:16 provided 16 timing signals t0
through t15.
 The sequence counter(SC) can be incremented or cleared
synchronously.
 Micro-programmed control:

 In this organization, the control information is stored in a

control memory. The control memory is programmed to
initiate the required sequence of a microoperation. Any
required changes or modifications can be done by updating
the micro program in control memory.
 A control unit with its binary control values stored as words in
memory is called a micro- programmed control. Each word in
the control memory contains a microinstruction that specifies
one or more micro-operations for the system. A sequence of
microinstructions constitutes a micro-program.
 The latter is often fixed at the time of the system design and
so is usually stored in ROM. Microprogramming involves
placing some representation for combinations of values of
control variables in words of ROM for use by the rest of the
control logic via successive read operations.