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8254-Programmable Interval Timer

The 8254 is a programmable interval timer/counter chip that contains three 16-bit counters that can operate in six different modes to generate time delays and waveforms. It connects to the system data bus and can be selected by address lines to access the individual counters or the control register. The control register is used to program the operating mode and count value for each counter.

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0% found this document useful (0 votes)
421 views

8254-Programmable Interval Timer

The 8254 is a programmable interval timer/counter chip that contains three 16-bit counters that can operate in six different modes to generate time delays and waveforms. It connects to the system data bus and can be selected by address lines to access the individual counters or the control register. The control register is used to program the operating mode and count value for each counter.

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Santhosh Sandy
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© © All Rights Reserved
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PROGRAMMABLE INTERVAL

TIMER/COUNTER-8254
• It is a 24-pin DIP IC and required a single
+5VCC power supply for its operation.
• It has three identical 16-bit counters.
• These counters can operate in any one of
the six mode.
• The counter can count either in binary or
BCD.
• It generate accurate time delays and can
be used for applications such as a real-time
clock, an event counter, a digital one-shot,
a square-wave generator, and a complex
waveform generator.
What is the difference between
8253 and 8254?
• Basic differences between them are:
Whereas 8253 has an operating frequency
of 0-2.6 MHz, 8254 is operated at a
frequency that ranges between 0-10 MHz.
• 8253uses N-MOS Technology and does
not support read-back command
whereas 8254works on H-MOS
technology and supports read-back
command.
Functional Block Diagram of 8254
• It consists of three counters (counter 0, counter 1
and counter 2 ), a tri-state bidirectional data bus
buffer, Read/Write control logic unit and control
word register.
• Each counter has two input signals ( CLK and
GATE) and one output signal ( OUT ).
• Data Bus Buffer: It is an 8-bit tri-state
bidirectional buffer. It is connected to the 8-bit
data bus of the microprocessor. Data is
transmitted or received by this data bus buffer.
• Control Logic Unit: This control logic unit has
three control signals ( RD, WR and CS ) and two
address lines A1 and A0.
• RD – Active low read A1 A0 Selection Address
input.
• WR – Active low 0 0 Counter 0 80H
write input.
• CS – Active low chip
0 1 Counter 1 81H
select input.
• A0, A1- Select
counter/Control 1 0 Counter 2 82H
Register.
• D0-D7 – Bidirectional Control
1 1 83H
data bus. Register
Control Word Register
• 8254 has a powerful command called READ
BACK command, which allows the user to
check the count value, the programmed mode,
the current mode, and the current status of the
counter.
• The 8254 can operate in M2 M1 M0 Mode
six different modes, and
selection
the gate of a count.
• Mode 0: Interrupt on 0 0 0 Mode 0
terminal count.
• Mode 1: Hardware- 0 0 1 Mode 1
Retriggerable one shot.
• Mode 2: Rate generator. X 1 0 Mode 2
• Mode 3: Square-wave
generator. X 1 1 Mode 3
• Mode 4: Software-
Triggered strobe. 1 0 0 Mode 4
• Mode 5: Hardware-
Triggered strobe. 1 0 1 Mode 5
Mode 0: Interrupt on terminal count
• It is used to generate an interrupt to the
microprocessor.
• Gate should be held at high.
• Initially the OUT is low. Once a count is
loaded in the register, the counter is
decremented every cycle, and when the
count reaches zero, the OUT goes high.
This can be used as an interrupt.
• The OUT remains high until a new count
or a command word is loaded.
Mode 1: Programmable one-shot
• It can be used as a mono stable multi-
vibrator.
• In this mode, the OUT is initially high.
• When the Gate is triggered, the OUT goes
low, and at the end of the count, the OUT
goes high again, thus generating a one-
shot pulse.
Mode 2: Rate Generator
• It can be used as a frequency divider or Divide
by N counter.
• In this mode the 8254 acts as a divided by n
counter. The gate is held at high level. The
output will be high level.
• The count is loaded into the counter register and
the count down begins. When the count reaches
1, the output goes low.
• The output will go high again at the falling edge
of the next clock pulse.
• The original count is loaded again in the count
register and the process repeats.
Mode 3: Square wave generator
• Similar to mode 2 except that the output will
remain high until one half the count has been
completed (for even nos) and go low for the
other half of the count.
• If the count is odd, the output will be high for
(N+1)/2 counts and low for (N-1)/2 counts.
• In this mode the output is a square wave form.
The frequency of the output wave to the input
clock frequency divided by the number loaded
into the count register.
Mode 4: Software Triggered Strobe
• In this mode the gate is held high.
• Initially the output is in high level.
• After the mode set operation the count is
loaded into the count register and the
counter will begin counting.
• When the count reaches zero, the output
goes low for one clock period and again
goes high.
Mode 5: Hardware Triggered Strobe

• The gate is held at low level.


• The output is at high level.
• The count is loaded into the count register.
• Gate is made high.
• The counter start counting at the rising
edge of the gate pulse.
• When the count reaches zero, the output
goes low for one clock period and again
goes high.

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