High Speed Board

Design
Signal Integrity Analysis

Presented
By
Anand Mathew

© Wipro Technologies - Wipro Confidential

Agenda

 Basics of Signal Integrity

 What is it & why required
 Some theory (txn lines, logic families, models)
 Signal quality problems
 How it is solved
 Signal Integrity Analysis Methodology
 Flow & Phases
 EagleWision Guidelines for each phase/activity
 Other Info
 Stackups & Trace impedance
 Other Signal Integrity problems

 Duration : 4 hrs (approx)

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What is Signal Integrity Analysis ?

 Analysis of effects produced by ‘analog’ behaviour or digital

circuits.
 Solving problems that arise from such ‘analog’ behaviour.

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Do digital devices exhibit analog traits ?

 Yes !
 Non zero rise time
 Metastability

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Ok, so what does SI involve ?

 Simulation
 Identification of problems
 Solution
 More simulation ……...

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Simulate what ?!

 Copper traces are used to form connections between devices

in PCBs.
 At high enough frequencies and edge rates, these traces
exhibit ‘transmission line behaviour’……
 ..... which, in turn, can cause unpredictable or faulty circuit
behaviour.

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SI involves simulation of board level interconnect …..

 Transmission line behaviour can be simulated and predicted

to fair accuracy.
 Simulation results, waveforms and data, can be used to
identify potential problems.
 Well established design techniques can then be used to solve
these problems.

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What are transmission line effects ?

 There are several, not all relevant to board design.

 The most pertinent of these is ‘reflection’.
 It is the root of several possible problems, and needs to be
understood and controlled for a board to work well.

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Ok, is SI then all about transmission line effects ?

 Not quite. There are other effects that can be detrimental to

circuit performance.
 Electromagnetic coupling, leading to cross-talk.
 Ground bounce, switching noise ….
 Lets look at reflection for the moment.

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Transmission lines

 Are media for wave propagation.

 Waves have energy associated with them,
 Which differs with the medium of propagation.
 When the wave encounters a difference in media (a
‘boundary’), the difference in energy is reflected back to the
source,
 Causing board designers much grief …...

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Reflections ....

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Reflections in water .....

 The falling object produces a wave propagating radially.

 At the wall of the vessel is a medium boundary, the wave
cannot continue in the same direction.
 The wave has non-zero energy associated with it and hence
can't stop in zero time.
 It's reflected back and forth, giving rise to complex
interference patterns.

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Have another look

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This analogy is crude ...

 Electrical waves are electromagnetic in nature.

 Ideally, quantum phenomena should be accounted for.
 For most applications, transmission line theory affords
sufficient accuracy,
 which is why we need to have a brief look at the same .....

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Transmission line theory ...

 The lumped model ...

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Some quantifiers ....

 The ratio Z0= √(L/C) is called the Characteristic Impedance

of the line.
 Please recall .. characteristic impedance is independent of
length, and as such is defined for an infinite line.
 Characteristic impedance has profound implications for
signal quality ......

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The other important parameter is
velocity ....
 Which is equivalent to the velocity of light in the
surrounding media .....
 and can be calculated from C0=1/√(LC)
 Velocity is equally important ... but it doesn't vary too
much across various boards, unlike characteristic
impedance.
 Electromagnetic waves take a finite time to transit through
any media.
 Thus, every trace introduces a non-zero delay in the signal
path.
 Designers need to be aware of this delay and include it in
their timing analyses.

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More on velocity

 In the case of most boards built on polymer substrate, the

propagation velocity ranges from 0.17 - 0.2 ns /inch.
 Thus, a trace of length 1 foot would introduce a delay of
approx. 2 ns in the signal path.
 In high speed circuits, this delay will have to be taken into
account.

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More on the lumped model ....

 The lumped transmission line model affords limited

accuracy.
 The number of sections required to obtain reasonable
accuracy can lead to huge computing overheads.
 Hence, consider the distributed model ...

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The distributed model ...

 The distributed model can be thought of as a lumped model

with infinite sections, the representation is ......

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The distributed model ... (Contd.)

 Is a little more difficult to visualize, more abstract.

 The only specifications are the characteristic impedance and
the velocity.
 And of course, a handful of mathematical equations ......

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Mathematics .....

 The distributed transmission line model is represented by

the following equations ....

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Solution ......

 Which have a solution of the form ......

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No sweat !

 You do not have to solve these, the simulation tool would do

it for you !!
 Even if you could solve it, there would be too many of them
to solve !!

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Thus,

 The distributed form of the transmission line is more

accurate, and hence preferred.
 It is represented by a set of linear first order partial
differential equations.
 Simulation tools use FEM algorithms to directly solve these
equations, achieving good accuracy with less computing
resources.

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So much about transmission lines ...

 Signals arise from electronic devices.

 The nature of these devices plays a crucial role in the actual
behaviour of the signal.
 There are various logic families :
 TTL
 CMOS
 ECL
 And various derivatives of these ......

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Logic Families ....
 As we know,
 These families have different characteristics
 They exhibit different high and low thresholds
 The nature of their outputs is different, i.e.
 Voltage drivers
 Current drivers
 Voltage dependent current drivers
 Each of these exhibits different behaviour with respect to
signal quality.

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Logic Families .... (Contd.)

 Even minute differences in device behaviour need to be

modeled for accurate simulation results.
 There is thus a need of device models.

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Device models

 Several modeling approaches exist

 Some widely accepted formats are :
 SPICE
 SABER
 IBIS
 VHDL models are NOT applicable here, as they are
functional models.
 Models that capture the 'analog' behaviour of devices are
required.
 SPICE and SABER both capture this analog behaviour, but
they probably do too much.

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Device models (Contd.)

 Disadvantages of SPICE and SABER models :

 Computing time
 Design Confidentiality
 Since SPICE and SABER models give away too much
information about the device, vendors are reluctant to
make them available.
 The IBIS (Input/Ouput Buffer Information System) models
are now standard for Signal Integrity Analsyis.
 Here's why :

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Device models (Contd.)

 IBIS models do not give any information about the 'CORE

LOGIC' of devices, they only specify the 'I/O BUFFER'
characteristics.
 Thus :
 Design confidentiality is preserved.
 Information contained in the model is much less, hence simulation runs
faster.
 IBIS Models capture only I/O buffer characteristics. The
core logic remains invisible.

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Device models (Contd.)

Device

I/P Core logic O/P

PIN PIN

Input Output
Buffer Buffer

IBIS Model
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Device models (Contd.)

 IBIS models are now the de-facto models for signal integrity
analysis.
 When an IBIS model is not available, it is possible to convert
a SPICE model to IBIS.
 It is also possible to convert IBIS models to SPICE, but only
I/O information is translated.

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 Thank You
for your time

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