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Crosstalk and Noise

This document discusses crosstalk noise in integrated circuits. Crosstalk noise refers to unintended coupling between signals on a die due to capacitive coupling between neighboring interconnects. Switching activity on one net can induce glitches or timing delays on coupled nets. There are two types of noise effects: glitches on steady signals due to switching aggressors, and changes in signal timing. Crosstalk glitch analysis examines how charge transferred between nets via coupling capacitance can create glitches. Whether glitches propagate depends on DC noise thresholds for glitch magnitude or AC noise analysis of glitch width and fanout loads.

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0% found this document useful (0 votes)
42 views18 pages

Crosstalk and Noise

This document discusses crosstalk noise in integrated circuits. Crosstalk noise refers to unintended coupling between signals on a die due to capacitive coupling between neighboring interconnects. Switching activity on one net can induce glitches or timing delays on coupled nets. There are two types of noise effects: glitches on steady signals due to switching aggressors, and changes in signal timing. Crosstalk glitch analysis examines how charge transferred between nets via coupling capacitance can create glitches. Whether glitches propagate depends on DC noise thresholds for glitch magnitude or AC noise analysis of glitch width and fanout loads.

Uploaded by

pajayak
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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CROSSTALK AND NOISE

1
Role of Noise
• Increased number of metal layers
• Vertically dominant metal ratio
• Higher routing density due to finer geometry
• Larger number of interacting devices and
interconnect
• Faster waveforms due to higher frequencies
• Lower supply voltage

2
CROSSTALK NOISE
• Crosstalk noise refers to unintentional coupling
activity between two or more signals.
• The crosstalk noise is caused by the capacitive
coupling between neighboring signals on the die
• This results in switching activity on a net to cause
unintentional effects on the coupled signals.
• The affected signal is called victim
• the affecting signals are termed as aggressors
• two coupled nets can affect each other, and often a
net can be a victim as well as an aggressor.

3
4
Types of Noise effect
• There are two types of noise effects caused by
crosstalk
• Glitch, which refers to noise caused on a steady
victim signal due to coupling of switching activity of
neighboring aggressors
• change in timing (crosstalk delta delay), caused by
coupling of switching activity of the victim with the
switching activity of the aggressors

5
Crosstalk Glitch Analysis
• A steady signal net can have a glitch due to charge
transferred by the switching aggressors through the
coupling capacitances

6
• In this example, the NAND2 cell UNAND0 switches
and charges its output net
• Some of the charge is also transferred to the victim
net through the coupling capacitance Cc and results
in the positive glitch
• The amount of charge transferred is directly related
to the coupling capacitance, Cc, between the
aggressor and the victim net

7
• The magnitude of the glitch caused is dependent
upon a variety of factors. Some ofthesefactorsare:
• Coupling capacitance between the aggressor net
and victim
• Slew of the aggressor net
• Victim net grounded capacitance
• Victim net driving strength

8
Types of Glitches
• Rise and Fall Glitches
• Overshoot and Undershoot Glitches

9
Glitch Thresholds and Propagation
• A glitch caused by coupling from a switching
aggressor can propagate through the fanout cell
• Analysis based upon DC or AC noise thresholds,
determine whether a glitch at a net can be
propagated through the fanout cells
• The DC noise analysis only examines the glitch
magnitude
• AC noise analysis examines other attributes such as
glitch width and fanout cell output load

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DC Thresholds
• The DC noise margin is a check used for glitch
magnitude and refers to the DC noise limits on the
input of a cell while ensuring proper logic
functionality

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AC analysis

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