xHCI
•A host controller interface is a register level
interface which allows a host controller for USB
hardware to communicate with a host controller
driver software.
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Architecture
Component layers
• Application software
• Class Driver
• USB Driver
• Host controller Driver
• Host controller (xHC)
• USB Device
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xHCI Interface spaces
• Host configuration space – for
identification and enumeration of host
• MMIO space - Register space provided by
xHC for software
• Host Memory – for Data structures
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Important xHCI Registers
• Capability register
• Runtime register
• Operational register
• Doorbell array
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Device slot and slot ID
• The term Device Slot is used as a generic
reference to a set of xHCI data structures
associated with an individual USB device.
• Slot ID refers to the index used to identify
a specific Device slot.
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Data Structures
• Device context base address array- provides the xHC with a Slot ID
based lookup table for accessing the Device Context data structure
associated with each slot.
• Device context - is managed by the xHC and used to report device
configuration and state information to system software.
• Slot context - contains information that relates to the device as a
whole, or affects all endpoints of a USB device
• Endpoint context - defines the configuration and state of a specific
USB endpoint.
• Input context - is used by system software to define device
configuration and state information that will be passed to the xHC by
an Address Device, Configure Endpoint, or Evaluate Context
Command.
• Rings - is a circular queue of data structures
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Rings
• Command ring – 1/xHC
• Event Ring – 1/Interrupter
• Transfer Ring – 1/Endpoint
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Transfer Ring
• A Transfer Ring exists for each active
endpoint or Stream declared by a USB
device. Transfer Rings contain “Transfer”
specific TRBs.
• A Transfer Request Block (TRB) is a
data structure constructed in memory by
software to transfer a single physically
contiguous block of data between host
memory and the xHC.
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Operation Model
Host controller Initialization
• Initialize the system I/O memory maps, if supported.
• After Chip Hardware Reset wait until the Controller Not Ready (CNR)
flag in the USBSTS is ‘0’ before writing any xHC Operational or Runtime
registers.
• Program the Max Device Slots Enabled (MaxSlotsEn) field in the
CONFIG register (5.4.7) to enable the device slots that system software
is going to use.
• Program the Device Context Base Address Array Pointer
(DCBAAP) register (5.4.6) with a 64-bit address pointing to where the
Device Context Base Address Array is located.
• Define the Command Ring Dequeue Pointer by programming the
Command Ring Control Register (5.4.5) with a 64-bit address pointing
to the starting address of the first TRB of the Command Ring.
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Device Slot
There will be one device slot per device and there will be multiple
slots per port
• Slot Assignment
1. Software after detecting device attach and
resetting the port shall obtain a device slot
by issuing Enable slot command to the xHC.
2. Enable slot command returns a slot ID that is
selected by the host controller
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Device Initializtion
• Resetting a Root hub port
• Device slot assignment
• Device slot Initialization
• Address assignment
• Device configuration
• Setting alternate interfaces
• Low-speed/Full-speed Device support
• Bandwidth Management
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More on Device slot
A device slot is composed of
• An entry in DCBAA
• A Device context data structure
• A Doorbell register in Doorbell array
Device context data is of two types slot context
and device context
A 32-bit Doorbell Register exists in the Doorbell
array for each device slot and is indexed by
the slot ID
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