Page Faults and The Clock Algorithm
Page Faults and The Clock Algorithm
Rate
• Does adding memory reduce number of page faults?
– Yes for LRU and MIN
– Not necessarily for FIFO! (Called Belady’s anomaly)
Ref: A B C D A B E A B C D E
Page:
1 A D E
2 B A C
3 C B D
Ref: A B C D A B E A B C D E
Page:
1 A E D
2 B A E
3 C B
4 D C
• How do we pick N?
– Why pick large N? Better approx to LRU
» If N ~ 1K, really good approximation
– Why pick small N? More efficient
» Otherwise might have to look a long way to find free page
Free Pages
For Processes
• Program Memory
Access Patterns have
temporal and spatial
locality
– Group of Pages
accessed along a
given time slice called
the “Working Set”
– Working Set defines
minimum number of
pages needed for
process to behave well
• Not enough memory for
Working
SetThrashing
– Better to swap out
process?
Working-Set Model
Read /
Write wires
Processor
Core I/O
Controllers
interrupts
0xFFFFFFFF 0xFFFFFFFFFFFFFFFF
128TiB
896MB Kernel Kernel
1GB
User
Addresses 0x00007FFFFFFFFFFF
128TiB
User
Addresses
0x00000000 0x0000000000000000
intro
Threads
Address Spaces Windows
Processes Files Sockets
Hardware ISA
Memory
Processor Protection
Boundary
OS
Ctrlr
Networks
storage
Displays
Inputs
In a picture
Read /
Write wires
Processor
Core I/O
Controllers
interrupts
• Integrated I/O
– Integrated memory controller (IMC)
» Two independent channels of DDR3 DRAM
– High-speed PCI-Express (for Graphics cards)
– DMI Connection to SouthBridge (PCH)
SandyBridge I/O: PCH
network
Example: PCI Architecture
Memory
RAM CPU
Bus
Host Bridge
PCI #0
ISA Bridge PCI Bridge
PCI #1
ISA
Controller PCI Slots USB SCSI
Scanner
Controller Controller
Legacy Root
Devices Hub Hard
Disk
CD ROM
Hub Webcam
Mouse Keyboard
Example Device-Transfer Rates in Mb/s
(Sun Enterprise 6000)
10m
addr
len
I/O Device Notifying the OS
User
Program
Kernel I/O
Subsystem
Device Driver
Top Half
Device Driver
Bottom Half
Device
Hardware
Summary
• I/O Devices Types:
– Many different speeds (0.1 bytes/sec to GBytes/sec)
– Different Access Patterns:
» Block Devices, Character Devices, Network Devices
– Different Access Timing:
» Blocking, Non-blocking, Asynchronous
• I/O Controllers: Hardware that controls actual
device
– Processor Accesses through I/O instructions,
load/store to special physical memory
– Report their results through either interrupts or a
status register that processor looks at occasionally
(polling)
• Notification mechanisms
– Interrupts
– Polling: Report results through status register that
processor looks at periodically
• Drivers interface to I/O devices
– Provide clean Read/Write interface to OS above
– Manipulate devices through PIO, DMA & interrupt
handling
– 2 types: block, character, and network