Memory and Register

CPU or Microprocessor
Addressing a memory
Opcode and Operands
Address bus and data bus
 Memory Segmentation
The memory locations of 8086 is 1Mb=10,48,576
Registers are only 16 bits, hence 8086 uses memory segmentation
With 16bits only 64kb memory can be addressed [64kb=65536]

1Mb

MEMORY
Address bus(20) Data Bus(16)

CPU
REGISTERS
ALU
CONTROL UNIT
 10,48,576=1Mb

MEMORY

Address bus(20) 1 ---- 20 Data Bus(16)

REGISTERS (16)
ALU
CONTROL UNIT
Segmented Memory
How to use compound address
with segmented memory?
Programmers would work with the two-part
addresses by doing two things within their
programs.
When they wanted to use a certain address, they
would first take the segment address of it and write
it into the segment register.

Thereafter, they would forget about the segment

and write only the offset addresses within their code
 Compound addressing
Ifthe segment address is, for
example, 2915, then the
addresses in this segment start
at 2915:0000 and go up to
2915:FFFF, which is the highest
address in this particular
segment.
INTEL 8086 ARCHITECTURE
 Architecture of Intel 8086 can be divided into two
unit
1. Bus Interface Unit (BIU)
2. Execution Unit (EU)

Bus Interface Unit (BIU)

Bus interface is 8086s interface to outside world
It provides a 16 bit bidirectional data bus and 20 bit
address bus
Responsible for all external Bus operation
Function of BIU
It sends address of memory

It fetches instruction from memory

It reads data from memory

It write data into memory

It supports instruction queuing

 Execution Unit
It tells the Bus interface Unit from where to fetch the data
Decodes the instruction and execute it

It contains:
1. Control circuitry
2. Instruction decoder
3. Arithmetic and Logic Unit
4. Register Organization
Flag register
General Purpose Register
Pointers and Index Registers
SEGMENT REGISTERS
 Segment Registers
CODE SEGMENT REGISTERS
This register contains the initial address of code segment which has processor instructions(only upper 16bits).
This address plus the offset value contained in the instruction pointer(IP) indicates the address of an instruction
to be fetched.
STACK SEGMENT REGISTER
Stack segment contains the initial address of stack segment. This address plus the value contained in the stack
pointer is used for stack operations.
DATA SEGMENT REGISTER
Data segment register contains the initial address of stack segment. This address plus the offset value in the
instruction causes a reference to specific location.
EXTRA SEGMENT REGISTER
Extra segment is used for string operations.
This register contains the initial address of extra segment(only upper 16bits).
String instructions always use ES or DI registers to calculate the physical address for the destination
INSTRUCTION POINTER AND SUMMING BLOCK
The instruction pointer register contains a 16bit offset
address of instruction that is to be executed next.
IP always references code segment register(CS).
The value contained in the instruction pointer is called
as OFFSET because this value must be added to the
base address of the code segment.
The value of the instruction pointer is incremented
after execution every function.
To form the 20 bit address of the next instruction the
16 bit IP is added to the address contained in the CS ,
which has been shifted 4 digits to the left.
Instruction queue
BIU fetches 6 instruction bytes ahead of time from the memory.
These are stored in registers called QUEUE
With the help of QUEUE it is possible to fetch/store next
instruction from the memory
It works based on FIFO.
In case of JUMP and CALL instructions , the instructions which is
already fetched is of no use.
Feature of fetching the next instruction while executing the
current instruction is called PIPELINING
Pipelining
Register Organization
8086 has powerful set of registers
General Purpose Registers, Segment Registers , Pointers and Index Registers , Flag
Registers
General Purpose registers

8086 has 4 general purpose registers labeled AX ,BX ,CX ,DX .

Each 16 bit general purpose can split into two registers.
Used for holding the data ,variables ,and intermediate results
temporarily.
Also used as counters or used for storing the offset address for
some addressing modes
POINTERS AND INDEX REGISTERS
It is used for generating 20bit address on address bus.
These registers are used along with segment registers to get the 20 bit
address
The pointer and Index group consists of instruction pointer(IP),stack
pointer(SP),base pointer(BP),source index(SI) and destination index (DI).

The IP is related to CS
BP is related to DS
SP is related with SS
 STACK POINTER
The stack pointer register contains the 16bit offset from the start of the segment to the
top of the stack. For stack operation, physical address is produced by adding the contents
of stack pointer register to the segment base address in SS.
If the content of SP is 9F20H and SSR is 4000H then physical address can be calculated
as follows
 BASE POINTER(BP) ,SOURCE INDEX(SI),DESTINATION INDEX(DI)
To hold the offset address of a data word in one of the segments.

BASE POINTER (stack)

it can be used instead of SP for accessing the stack using the based
addressing mode. In this case, the 20 bit physical address is calculated from BP
and SSR.

SOURCE INDEX:(data segment)

Source index can be used to store the offset address of a data word in data
segment. In this case, the 20 bit physical address is calculated from SI and DSR.

DESTINATION INDEX:(extra segment)

The ES register points to the extra segment in which data is stored. String
instruction always uses ES and DI to determine the 20 bit physical address.
Physical address of CS=CSR+IP
Physical address of SS =SSR+BP
Physical address of ES =ESR+DI
Physical address of DS=DSR+SI
8F110

64k

9233A
FLAG REGISTER
 CARRY FLAG
In case of addition this carry is set if there is a carry out of MSB. In
case of subtraction this flag is set when borrow is needed.

PARITY FLAG
it is set to one is the result of a byte operation or lower byte of a word
has even no of ones , otherwise zero.

AUXILIARY FLAG
This flag is set to if there is an overflow out of 3 rd bit , that is from lower
nibble to higher nibble

ZERO FLAG
zero flag sets if the result of operation in ALU is zero and flag resets if
the result is nonzero. The zero flag is also set if a register becomes zero
after an increment or decrement operation of that register.
 SIGN FLAG
After the execution of arithmetic and logical operations, if the MSB of the
result is 1, the sign bit is set to 1. sign bit 1 indicates the result is negative
otherwise positive.
OVERFLOW FLAG
This flag is set if the result is out of range , it is set when there is a carry
into MSB but no carry out of MSB, or vice versa
 Three remaining flags are used to control certain operation of processor
TRAP FLAG
Trap flag is used for single executing through a program.
If TRAP is set ,after execution of every instruction system displays the contents
of various registers and memory variable on the display. Thereby programmer
can easily correct the errors in the program.

INTERRUPT FLAG(isr)
Interrupt is used to halt the current execution of a program , the term interrupts
means to break the sequence of operation.
it is used to allow/prohibit the interruption of a program. If set maskable
interrupt will be handled , otherwise these interrupts are ignored.

DIRECTION FLAG(A string is a collection of objects stored in contiguous

memory locations. Strings are usually arrays of bytes, or words)
used for string operations. If DF=0,the string is processed from its beginning
with the first element having the lowest address , otherwise the string is
processed from the highest address towards the lowest address