Scribd
Upload
726 views22 pages

Clockless Chip by Rahul RK (9986510206)

This document summarizes a presentation on clockless chips. It discusses how clockless chips work asynchronously without a central clock, with different parts operating at different speeds. It describes how asynchronous logic circuits handle data using handshake signals. While clockless chips offer advantages like lower power consumption and reduced heat, challenges include interfacing with synchronous devices and a lack of expertise and tools. Potential applications of clockless chips include mobile electronics, personal computers, and encryption devices.

Uploaded by

rahulkmar
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
726 views22 pages

Clockless Chip by Rahul RK (9986510206)

This document summarizes a presentation on clockless chips. It discusses how clockless chips work asynchronously without a central clock, with different parts operating at different speeds. It describes how asynchronous logic circuits handle data using handshake signals. While clockless chips offer advantages like lower power consumption and reduced heat, challenges include interfacing with synchronous devices and a lack of expertise and tools. Potential applications of clockless chips include mobile electronics, personal computers, and encryption devices.

Uploaded by

rahulkmar
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
You are on page 1/ 22

Date:11 April 2009.

Clockless Chips
Under the esteemed guidance of
Romy Sinha
Lecturer, REC Bhalki

Presented by:
Lokesh S. Woldoddy
3RB05CS122
Content:
 Introduction.
 Concept of clock.
 Working of synchronous circuit.
 Asynchronous logic circuits.
 GENERAL MODEL OF ASYNCHRONOUS DESIGN
 Synchronous and asynchronous.
 How do they work?
 Clock time cycle vs. clockless time cycle.
 Simple and efficient design
 DIFFERENT STYLES.
 Problems with Synchronous Approach.
 Synchronous circuit.
 Some features.
 Challenges.
 Advantages.
 Applications.
 Conclusion.
 References.

Presentation on Clockless Chips 2


Introduction.

 Struggle for the improvement in the microprocessor’s


performance/functioning.

}
– Pipelining

– (Simultaneous) Multi-threading
Synchronous
– Clockless / Asynchronous logic

Presentation on Clockless Chips 3


Concept of clock
CLOCK:

– Tiny crystal oscillator.

– Sets basic rhythm used throughout the machine.

ADVANTAGES:

– Signals the device of the chip when to i/p or o/p.


– This functionality makes designing of synchronous chip easier.

Presentation on Clockless Chips 4


4
Presentation on Clockless Chips
Adapted : http://www.cs.columbia.edu/async/misc/technologyreview_oct_01_2001.html 5
5
Clockless chips (Asynchronous logic circuits)

 Colckless chips/Asynchronous/self-timed circuits.


 Functions away from the clock.
 Different parts work at different speeds.
 Hand-off the result immediately.

Presentation on Clockless Chips 6


GENERAL MODEL OF ASYNCHRONOUS
DESIGN:

Presentation on Clockless Chips 7


Adapted:David Geer,”Is it time for clockless chips?,”IEEE paper,pp.18-21,March 2005 7
Courtesy: Computers without clocks – Ivan E Sutherland and Jo Ebergen

Presentation on Clockless Chips 8


How do they work?

 No pure asynchronous chips are available.


 Uses handshake signals for the data exchange.
 Data moves only when required, not always.
– Minimizes power consumption.

– Less EMI ⇒ less noise ⇒ more applications.

– Stream data applications.


Presentation on Clockless Chips 9
Clock time cycle vs. clockless time cycle

Courtesy: Fulcrum Microsystems.


Presentation on Clockless Chips 10
Simple and efficient design

 No centralized clock required.

 Standardized components can be used.

Presentation on Clockless Chips 11


DIFFERENT STYLES:

Simplest implementation of asynchronous design.

Assumption: we know the largest amount of time


for each component to perform its task.

Very similar to synchronous design.

Prototype delay is introduced here.

Presentation on Clockless Chips 12


12
Problems with Synchronous Approach

 Distributing the clock globally.


 Wastage of energy.
 Traverse the chip’s longest wires in one clock cycle.
 Order of arrival of the signals is unimportant.
 Clocks themselves consume lot of energy (~30%).

Presentation on Clockless Chips 13


Synchronous circuit

 Longest path determines


the minimum clock
period.
 Dissipation of energy for
each clock cycle.
 EMI is more in
synchronous elements.
Presentation on Clockless Chips 14
Some features

 Integrated pipelining mode.


– Domino logic.

– Delay – insensitive.

 Two different implementation details


– Dual rail.

– Bundled data.

Presentation on Clockless Chips 15


Challenges
 Interfacing
between synchronous and
asynchronous
– Many devices available now are synchronous in nature.
– Special circuits are needed to align them.
 Lack of expertise.
 Lack of tools.
 Engineers are not trained in these fields.
 Academically, no courses available.

Presentation on Clockless Chips 16


Advantages (technical look)

 Asynchronous for higher


performance:
– Data-dependent delays.

– All carry bits need to be


computed.

Presentation on Clockless Chips 17


Advantages
 Works at its average speed.
 Low power consumption.
⇒ Twice life-time.
 Less heat generated.
⇒ Good to mobile devices.
 LessEMI ⇒ less noise ⇒ more applications.
 Smart cards (due to asynchronous nature).

Presentation on Clockless Chips 18


Applications:
 In the lab.

 In mobile electronics.

 In personal computers.

 In encryption devices.

Presentation on Clockless Chips 19


19
Conclusion:
 Clocks are getting faster , while chips are getting bigger
both of which make clock distribution harder
o There are also various other problems associated with it.
So we could only get out of it , if more focus , especially
at the university level is given to the asynchronous
design.
o It is certainly a challenge , but as software community
is moving towards concurrency, hardware community
must move to incorporate asynchronous logic.

Presentation on Clockless Chips 20


References
 Scanning the Technology: Applications of Asynchronous Circuits
– C. H. (Kees) van Berkel, Mark B. Josephs, and Steven M. Nowick
 Computers without clocks – Ivan E Sutherland and Jo Ebergen.
 http://ieeexplore.ieee.org/iel5/2/30617/01413111.pdf (October
2001)
 http://csdl2.computer.org/comp/mags/dt/2003/06/d6005.pdf
 http://www1.cs.columbia.edu/async/misc/technologyreview_oct_01_20
 http://www.technologyreview.com/articles/01/10/tristram1001.asp
 http://www1.cs.columbia.edu/async/misc/economist/Economist_com.h

Presentation on Clockless Chips 21


Thank you

Presentation on Clockless Chips 22

You might also like