The 8051 Microcontroller and Embedded Systems

CHAPTER 3 JUMP, LOOP, AND CALL INSTRUCTIONS

OBJECTIVES

Code 8051 Assembly language instructions using loops Code 8051 Assembly language conditional jump instructions Explain conditions that determine each conditional jump instruction Code long jump instructions for unconditional jumps Code short jump instructions for unconditional short jumps Calculate target addresses for jump instructions Code 8051 subroutines Describe precautions in using the stack in subroutines

SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

Repeating a sequence of instructions a certain number of times is called a loop. The loop action is performed by the instruction

DJNZ reg, label.

In this instruction, the register is decremented; if it is not zero, it jumps to the target address referred to by the label. Prior to the start of the loop the register is loaded with the counter for the number of repetitions. In this instruction both the register decrement and the decision to jump arc combined into a single instruction. The registers can be any of R0 - R7. The counter can also be a RAM location

SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

Looping in the 8051

Problem 1 In the 8051, looping action with the instruction "DJNZ Rx, rel address" is limited to _______ iterations. Answer : 256 Problem 2 If a conditional jump is not taken, what is the next instruction to be executed? Answer : the instruction following the jump

SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

SJMP to itself using $ sign

Problem 3 In calculating the target address for a jump, a displacement is added to the contents of register ___________ . Answer: PC Problem 3 The mnemonic SJMP stands for __________ and it is a ____ - byte instruction. Answer: short jump , 2

Loop inside a loop

What happens if we want to repeat an action more times than 256?

Example 3-3 Write a program to (a) load the accumulator with the value 55H, and (b) complement the ACC 700 times. Since 700 is larger than 255 (the maximum capacity of any register), we use two registers to hold the count. The following code shows how to use R2 and R3 for the count. MOV A,#55H ;A=55H NEXT: MOV R3,#10 ;R3=10, the outer loop count AGAIN: MOV R2,#70 CPL A ;R2=70, the inner loop count ;complement

SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

Other conditional jumps

Other conditional jumps

JZ (jump if A = 0)

In this instruction the content of register A is checked. If it is zero, it jumps to the target address. JZ instruction can be used only for register A. It can only check to see whether the accumulator is zero, and it does not apply to any other register. Don't have to perform an arithmetic instruction such as decrement to use the JZ instruction.

Other conditional jumps

JNZ (jump if A 0)

In this instruction the content of register A is checked. If it is not zero, it jumps to the target address.

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Other conditional jumps

JNC Jump if no carry, jumps if CY = 0)

carry flag bit in the flag (PSW) register is used to make the decision whether to jump "JNC label", the processor looks at the carry flag to see if it is raised (CY = 1). if it is not, the CPU starts to fetch and execute instructions from the address of the label. if CY = 1, it will not jump but will execute the next instruction below JNC.

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Other conditional jumps

JC Jump if carry, jumps if CY = 1)

if CY = l it jumps to the target address

JB (jump if bit is high) JNB (jump if bit is low)

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SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

All conditional jumps are short jumps

Table 31 8051 Conditional Jump Instructions

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Unconditional jump instructions

There are two unconditional jumps: LJMP (long jump) and SJMP (short jump).

LJMP is 3-byte instruction in which the first byte is the op-code, and the second and third bytes represent the 16-bit address of the target location. The 2-byte target address allows a jump to any memory location from 0000 to FFFFH.

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Unconditional jump instructions

SJMP (short jump)

2-byte instruction, the first byte is the op-code and the second byte is the relative address of the target location. The relative address range of 00 FFH is divided into forward and backward jumps; that is, within -128 to +127 bytes of memory relative to the address of the current PC (program counter). If the jump is forward, the target address can be within a space of 127 bytes from the current PC. If the target address is backward, the target address can be within -128 bytes from the current PC.

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Calculating the short jump address

Example 3-6 Using the following list tile, verify the jump forward address calculation.
Line 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 PC 0000 0000 0002 0004 0006 0007 0008 0009 000B 000D 000E 000F 0010 0011 0012 0013 0015 0017 Op-code 7800 7455 6003 08 04 04 2477 5005 E4 F8 F9 FA FB 2B 50F2 80FE Mnemonic ORG 0000 MOV R0, MOV A, JZ NEXT INC R0 INC A INC A ADD A, JNC OVER CLR A MOV R0, A MOV R1, A MOV R2, A MOV R3, A ADD A, R3 JNC AGAIN SJMP HERE END Operand #003 #55H0

AGAIN: NEXT:

#77h

OVER: HERE:

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Calculating the short jump address

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SECTION 3.2: CALL INSTRUCTIONS

CALL is used to call a subroutine. Subroutines are often used to perform tasks that need to be performed frequently. This makes a program more structured in addition to saving memory space. There are two instructions : LCALL (long call) and ACALL (absolute call). Deciding which one to use depends on the target address.

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SECTION 3.2: CALL INSTRUCTIONS

LCALL (long call)

3-byte instruction, the first byte is the op-code and the second and third bytes are used for the address of the target subroutine. LCALL can be used to call subroutines located anywhere within the 64K-byte address space of the 8051. To make sure that after execution of the called subroutine the 8051 knows where to come back to, the processor automatically saves on the stack the address of the instruction immediately below the LCALL. When a subroutine is called, control is transferred to that subroutine, and the processor saves the PC (program counter) on the stack and begins to fetch instructions from the new location. After finishing execution of the subroutine, the instruction RET (return) transfers control back to the caller. Every subroutine needs RET as the last instruction.

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SECTION 3.2: CALL INSTRUCTIONS

LCALL (long call)

Figure 31 8051 Assembly Main Program That Calls Subroutines

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SECTION 3.2: CALL INSTRUCTIONS

CALL instruction and the role of the stack

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SECTION 3.3: TIME DELAY FOR VARIOUS 8051 CHIPS

Machine cycle for the 8051

The MCU takes a certain number of clock cycles to execute an instruction. These clock cycles are referred to as machine cycles. In the 8051 family, the length of the machine cycle depends on the frequency of the crystal oscillator. The frequency of the crystal connected to the 8051 family can vary from 4 MHz to 30 MHz. In the original 8051, one machine cycle lasts 12 oscillator periods. Therefore, to calculate the machine cycle for the 8051, we take 1/12 of the crystal frequency, then take its inverse.

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SECTION 3.3: TIME DELAY FOR VARIOUS 8051 CHIPS

Machine cycle for the 8051

Table 32

Clocks per Machine Cycle (MC) for Various 8051 Versions

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SECTION 3.3: TIME DELAY FOR VARIOUS 8051 CHIPS

Delay calculation for other versions of 8051

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Table 33

Comparison of 8051 and DS89C4x0 Machine Cycles

SECTION 3.3: TIME DELAY FOR VARIOUS 8051 CHIPS

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Next

Lecture Problems Textbook Chapter 3

Answer as many questions as you can and submit via MeL before the end of the lecture.

Proteus Exercise Textbook Chapter 3

Do as much of the Proteus exercise as you can and submit via MeL before the end of the lecture.

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