BY AJAY KUMAR & PUTR

INTRODUCTION:

An embedded system is a computer system designed for specific

control functions within a larger system, often with real-time computing constraints.

An Embedded System is a microprocessor based system that is embedded as a subsystem, in a larger system (which may or may not be a computer system).

What is an Embedded System

Embedded system: is a system whose principal function
is not computational, but which is controlled by a computer embedded within it.

Characteristics of Embedded Systems

Single-functioned
-- Executes a single program, repeatedly

Tightly-constrained
-- Low cost, low power, small, fast, etc.

Reactive and real-time

-- Continually reacts to changes in the systems environment

-- Must compute certain results in real-time without delay

CHARACTERISTCS:

1. Embedded systems are designed to do some specific task,

rather than be a general-purpose computer for multiple tasks. Some also have real-time performance constraints that must be met, for reasons such as safety and usability; others may have low or no performance requirements, allowing the system hardware to be simplified to reduce costs. 2. Embedded systems are not always standalone devices. Many embedded systems consist of small, computerized parts within a larger device that serves a more general purpose. For example, the Gibson Robot Guitar features an embedded system for tuning the strings, but the overall purpose of the Robot Guitar is, of course, to play music. 3. The program instructions written for embedded systems are referred to as firmware, and are stored in read-only memory or Flash memory chips. They run with limited computer hardware resources: little memory, small or non-existent keyboard or screen.

FEATURES:
Small size & less weight. More efficency . Embedded systems are programmed to perform specific task only. Embedded systems are playing important roles in our lives every day.

ADVANTAGES: High reliable. Can be interface as user convenient. Embedded systems are constrained for power

consumption since many embedded systems work on a battery at low power.

Application areas
Automotive electronics Aircraft electronics Trains

Telecommunication

Application areas

Medical systems

Military applications

Application areas
Consumer electronics

Fabrication equipment

Smart buildings

A Closer Look

Essential Components
Microprocessor / DSP Sensors Converters (A-D and D-A) Actuators Memory (On-chip and Off chip) Communication path with the interacting
environment

Embedded System Structure (Generic)

Sensor AD Processor & ASICs DA Actuator

Memory

Essential Considerations
Response Time -- Real Time Area Cost Portability Low Power (Battery Life)

Fault Tolerance

Systems

Classification of Embedded Systems

Distributed and Non distributed
Reactive and Transformational Control dominated and Data dominated

USER INTERFACE:

Simple embedded devices use buttons, LEDs, graphic or

character LCDs (for example popular HD44780 LCD) with a simple menu system.

Handheld systems often have a screen with a "joystick button"

for a pointing device.

Some systems provide user interface remotely with the help of a

serial (e.g. RS-232, USB, IC, etc.) or network (e.g. Ethernet) connection.

Microprocessors and Microcontrollers

The microprocessor is a processor on one silicon chip. The microcontrollers are used in embedded computing. The microcontroller is a microprocessor with added
circuitry.

Microcontrollers

8051 Microcontroller

Objectives
Understand the 8051 Architecture Use SFR in C Use I/O ports in C

8051 Chip Pins

40 pins on the 8051 chip.
Most of these pins are used to connect to I/O devices or external data and code memory. 4 I/O port take 32 pins(4 x 8 bits) plus a pair of XTALS pins for crystal clock A pair of Vcc and GND pins for power supply (the 8051 chip needs +5V 500mA to function properly) A pair of timer pins for timing controls, a group of pins (EA, ALE, PSEN, WR, RD) for internal and external data and code memory access controls One Reset pin for reboot purpose

Pin out Diagram of the 8051 Microcontroller

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD) P3.0
(Serial) 1 40

Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)
Ext Memory Address Ext Memory Access Control Ext Memory Address

39

38

37

36

8051

35

34

33

32

10

31

(TXD) P3.1 (INT0) P3.2

interrupt

11

30

12

29

(INT1) P3.3 (T0) P3.4

Timer

13

28

14

27

(T1) P3.5 (WR) P3.6

Ex M W/R

15

26

16

25

(RD) P3.7 XTAL 2

clock

17

24

18

23

XTAL 1 GND

19

22

20

21

The Pin Connection for External Code and Data Memory

Port 0

D0 D7

EA
(enable Ex. Memory)

8051
ALE
Address Latch Enable

adress multiplex latch

A0 A7

Port 2

A8 - A15

PSEN RD
Ex. Data RAM Reade

OE

WR

Ex.Data RAM write

Extensl Code Memory ROM or EPROM

Contd.
The first 6 crystal pulses (clock cycle) is used to fetch the opcode and the second 6 pulses are used to perform the operation on the operands in the ALU. This gives an effective machine cycle rate at 1MIPS (Million Instructions Per Second).
XTAL2

Crystal

XTAL!

GND

Crystal to 8051 XTAL 1/2

Contd.

The B register is a register just for multiplication and division operation which requires more register spaces for the product of multiplication and the quotient and the remainder for the division. The immediate result is stored in the accumulator register (Acc) for next operation and the Program Status Word (PSW) is updated depending on the status of the operation result

8051 Internal Architecture

Ex.M
R, W

timer interrupt

serial

T1, T0 INT1, INT0TXD.RXD

P1.0 p1.7 (1-8)

P3.0 p3.7 (10-17)

(40)Vcc (20) Vg

Port 1

Port 3

Data Register B Acc T

RAM
EPROM

TCON,TMOD TLO/1, THO/1 SCON,SBUF,IE,IP FCON (SFRs

code

Ex.M access Control (29-31)

Timer And Control psw IR

ALT User data PC

+1

Reset (9) OSC Port 2 Port 0

(18 19)

P2.7 P2.0(21-28) A15 - 8

P0.7 P0.0 (32-39) A7 - 0 A

15 - 0

Ex.M (upto 64k)

Simplified 8051 block diagram

Ports Port Reading and Writing

There are 4 8-bit ports: P0, P1, P2 and P3. All of them are dual purpose ports except P1 which is only used for I/O. The following diagram shows a single bit in an 8051 I/O port.
Vcc(5v)

10k

Internal data bus(one bit)

Read latch

Read pin

Q
Port pin FET

Latch CL Q

Single Bit In I/O Port

The Port Alternate Functions

PORT P1 (Pins 1 to 8): The port P1 is a port dedicated for general
I/O purpose. The other ports P0, P2 and P3 have dual roles in addition to their basic I/O function.

PORT P0 (pins 32 to 39): When the external memory access is

required then Port P0 is multiplexed for address bus and data bus that can be used to access external memory in conjunction with port P2. P0 acts as A0-A7 in address bus and D0-D7 for port data. It can be used for general purpose I/O if no external memory presents.

PORT P2 (pins 21 to 28): Similar to P0, the port P2 can also play a
role (A8-A15) in the address bus in conjunction with PORT P0 to access external memory.

Contd.

PORT P3 (Pins 10 to 17):

In addition to acting as a normal I/O port, P3.0 can be used for serial receive input pin(RXD) P3.1 can be used for serial transmit output pin(TXD) in a serial port, P3.2 and P3.3 can be used as external interrupt pins(INT0 and INT1), P3.4 and P3.5 are used for external counter input pins(T0 and T1), P3.6 and P3.7 can be used as external data memory write and read control signal pins(WR and RD)read and write pins for memory access.

Memory and SFR Memory

The 8051 code(program) memory is read-only, while the data
memory is read/write accessible. The program memory( in EPROM) can be rewritten by the special programmer circuit.

The 8051 memory is organized in a Harvard Architecture. Both the

code memory space and data memory space begin at location 0x00 for internal or external memory which is different from the Princeton Architecture where code and data share same memory space.

The advantage of the Harvard Architecture is not only doubling

the memory capacity of the microcontroller with same number of address lines but also increases the reliability of the microcontroller, since there are no instructions to write to the code memory which is read only.

Separate read instructions for external data and code memory.

Internal code Memory ROM or EPROM 4k or up External data memory RAM 64k

0xFF SFR(direct access)

128 bytes

External code memory ROM or EPROMext 64k

0x80 0x7F General purpose RAM (variable data) 0x30 0x2F Bit addressible RAM 16x8 bits 0x20 0x1F Register bank 0(R0-R7) Register bank 1(R0-R7) Register bank 2(R0-R7) 0x00 Register bank 3(R0-R7) Internal data memory RAM 4x8= 32 bytes 16 bytes 80 bytes

Contd.

In this model, the data memory and code memory use

separate maps by a special control line called Program Select Enable (PSEN). This line (i.e. when PSEN = 0) is used to indicate that the 16 address lines are being used to address the code memory. When this line is 1, the 16 address lines are being used to address the data memory.

Contd.
The 8051 has 256 bytes of internal addressable RAM,
although only first 128 bytes are available for general use by the programmer. The first 128 bytes of RAM (from 0x00 to 0x7F) are called the direct memory, and can be used to store data. The lowest 32 bytes of RAM are reserved for 4 general register banks. The 8051 has 4 selectable banks of 8 addressable 8-bit registers, R0 to R7.

Contd.

This means that there are essentially 32 available general purpose registers, although only 8 (one bank) can be directly accessed at a time. The advantage of using these register banks is time saving on the context switch for interrupted program to store and recover the status. Otherwise the push and pop stack operations are needed to save the current state and to recover it after the interrupt is over. The default bank is bank 0. The second 128 bytes are used to store Special Function Registers (SFR) that C51 program can configure and control the ports, timer, interrupts, serial communication, and other tasks.

Special Function Registers (SFRs)

The SFR is the upper area of addressable memory, from
address 0x80 to 0xFF. This area consists of a series of memorymapped ports and registers. All port input and output can therefore be performed by get and set operations on SFR port name such as P3. Also, different status registers are mapped into the SFR for checking the status of the 8051, and changing some operational parameters of the 8051. All 8051 CPU registers, I/O ports, timers and other architecture components are accessible in 8051 C through SFRs They are accessed in normal internal RAM (080H 0FFH) by 8051 C, and they all are defined in the header file reg51.h listed below.

Contd.
There are 21 SFRs. In addition to I/O ports, the most frequently used SFRs to
control and configure 8051 operations are:

TCON (Timer CONTROL) TMOD (Timer MODE) TH0/TH1 and TL0/TL1 (Timers high and low bytes) SCON (Serial port CONTROL) IP (Interrupt Priority) IE ( Interrupt Enable)

Almost all 8051 C embedded programs include the

reg51.h.

SFRs and Interrupts

Interrupt is an internal or external event that

suspends a program and transfers the control to an event handler or ISR to handle the event.

After the service is over the control is back to the

suspended program to resume the execution, The microcontroller in a embedded system connects many devices and need to handle service requests from devices all the time.

You can classify Registers for function

1. Enable interrupts
IE SFR enables interrupts individually and globally EX0/EX1: Enable external interrupt INT0/INT1 ET0/ET1: Enable Timer 0/Timer1 interrupt ES: Enable serial interrupt EA: Enable global interrupt

Set 1 in a bit to enable its interrupt, e.g. EA =1;

reset 0 to masks that interrupt, e.g., EA = 0;

2. Interrupt Flags
The interrupt flags are set to 1 when the interrupts occur. IE0/IE1 in TCON - For External Interrupts TF0/TF1 in TCON - For Timer Interrupts TI/RI in SCON - For Serial Interrupts The flag 1 indicates the interrupt occurrence and the flag 0 indicates no interrupt.

3. Interrupt Priority
There are two types of interrupt priority: User Defined Priority and Automatic Priority User Defined Priority The IP register is used to define priority levels by users. The high priority interrupt can preempt the low priority interrupt. There are only two levels of interrupt priority.

//The external interrupt INT0 at port P3.2 is assigned a high priority.

EX0 = 1;
//the external interrupt INT1 at port P3.3 is assigned a low priority.

EX1 = 0; Automatic Priority In each priority level, a priority is given in order of:

INT0, TF0, INT1, TF1, SI.

For example, if two external interrupts are set at same priority level, then INT0 has precedence over INT1.

External Interrupts
An external interrupt is triggered by a low level or negative
edge on INT0 and INT1 which depends on the external interrupt type setting. Set up an external interrupt type by IT0 and IT1 of TCON SFR. E.g., IT0 = 1; //set INT0 as Negative edge triggered IT1 = 0; // set INT1 as Level Triggered The external interrupt source may be a sensor, ADC, or a switch connected to port P3.2(INT0) or P3.3(INT1). You use IE0/IE1 to test the external interrupt events: Ex. If IE0 = 1 then the INT0 interrupt takes place. Note that if an external interrupt is set to low level trigger, the interrupt will reoccur as long as P3.2 or P3.3 is low that makes the code difficult to manage.

 You enable external interrupt by EX0/EX1 of

E.g.,

IE SFR.

If the interrupt is level activated, then IE0/1 flag has

EX1 = 0; You dont need to reset the edge triggered external
interrupt. This fragment makes the INT1 external interrupt ready on port P3.3 pin: to be cleared by user software as

EA = 1; EX0 = 1;

//enable external interrupt INT0

EA =1; EX1 =1; IT1 =1;

Serial Interrupts

Serial communication with Universal Asynchronous

Receive Transmit (UART) protocol transmits or receives the bits of a byte one after the other in a timed sequence on a single wire. It is used to communicate any serial port of devices and computers. The serial interrupt is caused by completion of a serial byte transmitting or receiving. The transmit data pin (TxD) is at P3.1 and the receive data pin (RxD) is at P3.0. All communication modes are controlled through SCON, a non bit addressable SFR. The SCON bits are defined as SM0, SM1, SM2, REN, TB8, RB8, TI, RI.

HIGH VS LOW VOLUME:

For high volume systems such as portable music players or mobile

phones, minimizing cost is usually the primary design consideration. Engineers typically select hardware that is just good enough to implement the necessary functions.

For low-volume or prototype embedded systems, general purpose

computers may be adapted by limiting the programs or by replacing the operating system with a real-time operating system.

Importance of Embedded Software and Embedded Processors

... the New York Times has estimated that the average American comes into contact with about 60 micro-processors every day.... [Camposano, 1996] Most of the functionality of embedded systems will be implemented in software!

Latest top-level BMWs contain over 100 microprocessors [Personal communication]

Views on embedded System

It is estimated that each year embedded software is

written five times as much as 'regular' software The vast majority of CPU-chips produced world-wide today are used in the embedded market ... ; only a small portion of CPU's is applied in PC's ... the number of software-constructors of Embedded Systems will rise from 2 million in 1994 to 10 million in 2010; ... the number of constructors employed by softwareproducers 'merely' rises from 0.6 million to 1.1 million.