DSP C5000

Chapter 20
Polyphase FIR Filter
Implementation
for Communication Systems
ESIEE, Slide 2
Multirate Processing 1 of 2
Multirate processing arises in many fields
of digital signal processing:
Digital audio: sampling frequency conversion
(32 kHz, 44.1kHz, 48kHz), sharp cut-off of FIR
filter,
Signal processing for digital communications:
symbol rate processing, bit rate processing,
sample rate processing,
Speech processing: 3G speech codec (Adaptive
Multi Rate), fractionnal pitch estimation, ...

ESIEE, Slide 3
Multirate Processing 2 of 2
Involves two actions on the digital signal:
Downsampling: resampling downwards the
digital signal in the digital domain.



Upsampling: resampling upwards the digital
signal in the digital domain.


M
F
e
F
e
/M
Retain one sample over M and discard
the M-1 others, every M samples.
L
F
e
LF
e
Insert L-1 zeros between each sample
ESIEE, Slide 4
Downsampling 1 of 2

=
1
1
2
) (
1
M
k
n
M
k
j
e n x
M
t
) (
1
) ( ) ( ) ( ) ( n x
M
mM n n x mM x m y
m
Folding term
M
x(n) y(m)
else. 0
, if ) (
) (
mM n n x
m y
ESIEE, Slide 5
Downsampling 2 of 2
Anti-aliasing Filter





Noble identity for decimation
M
x(n) y(m)
H(z)
F
e
F
e
/M
f
c
: (F
e
/M)/2
M H(z
M
) M H(z)
ESIEE, Slide 6
Upsampling 1 of 2
L
x(m) y(n)
else. 0
, if ) (
) (
mL n m x
n y
L
m
m
L
n
n
z X z m x z n y z Y ) ( ) ( ) (
ESIEE, Slide 7
Upsampling 2 of 2
Interpolating Filter






Noble identity for upsampling
L
x(m) y(n)
H(z)
LF
e
F
e
f
C
: (F
e
/L)/2
H(z) L H(z
L
) L
ESIEE, Slide 8
Polyphase Implementation of FIR Filters
Decimation Case 1 of 4
M H(z) M E(z
M
)

1
0
) (
mM
n
n
z n h z H
Let n=lM+k
M
k
M
k
k
z E z z H

1
0
with

1 /
0
M N
l
l
k
z k lM h z E
ESIEE, Slide 9
Polyphase Implementation of FIR Filters
Decimation Case 2 of 4
M
E
0
(z
M
)
E
1
(z
M
)
E
M-1
(z
M
)
z
-1
z
-1
F
e
F
e
/M
M-1 filter evaluation over M
are discarded.
N filter length
M H(z)
Time
Processing load (MAC/s)
MT
e
N
ESIEE, Slide 10
Polyphase Implementation of FIR Filters
Decimation Case 3 of 4
Using noble identity
M E
0
(z)
E
1
(z)
E
M-1
(z)
z
-1
z
-1
M
M
F
e
F
e
/M
Time
Processing load (MAC/s)
MT
e
N
No more useless computations, but one sampling period over M, CPU is
burdned with N MAC/s.
ESIEE, Slide 11
Polyphase Implementation of FIR Filters
Decimation Case 4 of 4
Equivalent commutator model
E
0
(z)
E
1
(z)
E
M-1
(z)
F
e
F
e
/M
Commutator runs at F
e
,. At each input sample only one component is computed and accu-
mulated with the result of the previous one. The result is output when the last component
is reached and accumulator is reset. This spreads the processing load over MT
e
.
Time
Processing load (MAC/s)
MT
e
N/M
ESIEE, Slide 12
Polyphase Implementation of FIR Filters
Interpolation Case 1 of 5
L H(z) R(z
L
) L

1
0
) (
lL
n
n
z n h z H
Let n=mL+L-1-k
L
k
L
k
k L
z R z z H

=

1
0
) 1 (
with
1 /
0
1
L N
m
m
k
z k L mL h z R
ESIEE, Slide 13
Polyphase Implementation of FIR Filters
Interpolation Case 2 of 5
L H(z)
LF
e
R
0
(z
L
)
R
1
(z
L
)
R
M-1
(z
L
)
z
-1
z
-1
L
Time
Processing load (MAC/s)
T
e
/L
N
L-1 multiplications by 0 over L
For each filter evaluation.
N filter length.
F
e
ESIEE, Slide 14
Polyphase Implementation of FIR Filters
Interpolation Case 3 of 5
Using noble identity
R
0
(z)
R
1
(z)
R
M-1
(z)
L
L
L
z
-1
z
-1
LF
e
F
e
At each output sampling instant,
only one component is non zero
ESIEE, Slide 15
Polyphase Implementation of FIR Filters
Interpolation Case 4 of 5
Equivalent commutator model
R
0
(z)
R
1
(z)
R
M-1
(z)
F
e
LF
e
Time
Processing load (MAC/s)
N/L
T
e
/L
For each output sampling instant one polyphase component is computed.
When we reach again the first component (M-1) a new input sample is inputed
in the delay line of each polyphase component.
ESIEE, Slide 16
Polyphase Implementation of FIR Filters
Interpolation Case 5 of 5
Linear Periodically Varying Time system
h
0
z
-1
h
L
h
2L
z
-1
h
1
z
-1
h
L+1
h
2L+1
z
-1
h
L-1
z
-1
h
2L-1
h
3L-1
z
-1
z
-1
z
-1
h
0
h
1
h
L-1
h
L
h
L+1
h
2L-1
h
2L+1
h
3L-1
h
2L
ESIEE, Slide 17
Case Study


Shaping filters for a QPSK modem :
Emitter: interpolation case.
Receiver: decimation case

Efficient Algorithm Implementation :
Good ordering of computations,
Efficient memory organization and management.
ESIEE, Slide 18
Emitter 1 of 4
bits
Ak
Bk
|k: Phase
computation
Cos()
Sin()
QPSK modulator
RCF
RCF
DAC
DAC
Fs Fe
|k
Fb
Bit
frequency
Symbol
frequency
Sample
frequency
s(t)=1/2[cos(2tfot).cos(|(Ak,Bk))-sin(2tfot).sin(|(Ak,Bk))]
ESIEE, Slide 19
Emitter 2 of 4
Let F
e
=16F
s
(16 sample / symbol)
Define a raised cosine filter with:
6 symbols length.
Roll_off : 0.5
Matlab command
h=RCOSFIR(0.5,3,16,1);
In red: ideal interpolating filter
In blue: actual RC filter
16 H(z)
Equivalent system
ESIEE, Slide 20
Emitter 3 of 4
The 16 Polyphase filters are defined by :
1 /
0
1
L N
m
m
k
z k L mL h z R
With N=112 and L=16
96 , 80 , 64 , 48 , 32 , 16 , 0

110 , 94 , 78 , 62 , 46 , 30 , 14
111 , 95 , 79 , 63 , 47 , 31 , 15
15
1
0
h h h h h h h m r
h h h h h h h m r
h h h h h h h m r

Filter length is 97, impulse response is padded with 0 to reach 112=7*16
ESIEE, Slide 21
Emitter 4 of 4
h(0)
h(16)
h(32)
h(48)
h(64)
h(80)
h(96)
h(1)
h(17)
h(33)
h(49)
h(65)
h(81)
h(97)
h(15)
h(31)
h(47)
h(63)
h(79)
h(95)
h(111)
Coefficients
x(0)
x(1)
x(2)
x(3)
x(4)
x(5)
x(6)
Symbols
15
th
sample
1
st
sample
2
nd
sample
When coefficient pointer reaches this address a new
symbol will be input at the next output sample period
R=flipud(reshape(h,8,12));
R=round(R*2^15);
fid=fopen('coef.inc','wt');
for p=1:8
fprintf(fid,'\t.word\t%d\n,R(p,:))
end
fclose(fid);
Shuffle coefficients
ESIEE, Slide 22
Emitter (C callable)
.sect "coefs2"
Ncomp .set 16 ;number of polyphase component
coefs2 .include "coefpoly2.inc"
coefsfin:
coefsize .set coefsfin-coefs2
Lfil .set coefsize/Ncomp ;polyphase component length
filbufQ .usect "filtre2",Lfil ;data buffer
.text
_firinit:
ST #coefs2,*(adbufQ) ;pointer to current coefs pointer
STM #filbufQ,AR2 ;zeroed initial buffer condition
RPT #Lfil-1
STL A,*AR2+
RET
ESIEE, Slide 23
_firTxQ: ;context save
LD #var,DP
STM #coefsize,BK
MVDM adbufQ,AR2 ;current coefs pointer
STM #1,AR0
STM #filbufQ,AR3 ;symbol buffer
STL A,*AR3 ;new sample (guess hold during 16 samples)
RPTZ A,#Lfil-1 ;compute one polyphase component
MAC *AR2+0%,*AR3+,A
MVMD AR2,adbufQ ;save new current coefs pointer
SFTA A,-16
SFTA A,-1 ;output of RCF can be greater than 1 !
CMPM @adbufQ,#coefs2 ;test if delay symbols is needed
BC endTxQ,NTC ;jump if not necessary
MAR *+AR3(-2)
RPT #Lfil-2
DELAY *AR3-
endTxQ:
;context restore
RET
ESIEE, Slide 24
Symbol vs Sample Output
F
e
: 16 khz
F
s
: 1 khz
A| : t/4 constant for each symbol
f= F
s
/8=125 Hz
Symbol output Sample output
ESIEE, Slide 25
Receiver 1 of 2
Fb
ADC
ADC
RCF
RCF
Fe Fs
Bit
processing
Symbol
processing
ESIEE, Slide 26
Receiver 2 of 2
Receiver structure is quite similar, except
that:
Each polyphase component has its own delay tap
Each polyphase output has to be accumulated for M
polyphase computations and accumulator is outputed
every M input sample and reset.

E
0
(z)
E
1
(z)
E
M-1
(z)
ESIEE, Slide 27
Follow on Activities
Laboratory 10 for the TMS320C5416 DSK
Illustrates the effects of decimation and anti-
aliasing filters.
Laboratory 11 for the TMS320C5416 DSK
Illustrates the effects of interpolation and anti-
imaging filters.
Application 9 for the TMS320C5416 DSK
Uses interpolation and decimation to produce
sharper cut-offs FIRs than would be obtained
otherwise.

ESIEE, Slide 28
Reference
Digital Signal Processing a Practical
Approach by Emmanuel C. Ifeachor
and Barrie W. Jervis. Chapter 9. Multirate
digital signal processing.