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BECE206P-Analog Circuit Lab Manual

The document is a lab manual for the Analog Circuits Lab course at Vellore Institute of Technology for Winter 2024-2025. It outlines course objectives, expected outcomes, indicative experiments, and detailed procedures for various experiments involving amplifiers, including frequency response analysis, power efficiency evaluation, and operational amplifier characteristics. The manual includes specific aims, required components, and procedures for each experiment, along with tabulation formats for recording results.

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Daivik Trivedi
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0% found this document useful (0 votes)
22 views44 pages

BECE206P-Analog Circuit Lab Manual

The document is a lab manual for the Analog Circuits Lab course at Vellore Institute of Technology for Winter 2024-2025. It outlines course objectives, expected outcomes, indicative experiments, and detailed procedures for various experiments involving amplifiers, including frequency response analysis, power efficiency evaluation, and operational amplifier characteristics. The manual includes specific aims, required components, and procedures for each experiment, along with tabulation formats for recording results.

Uploaded by

Daivik Trivedi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Vellore Institute of Technology, Vellore

School of Electronics Engineering


(SENSE)

Lab Manual
Winter 2024-2025

Registration Number :

Student Name :

Programme :

Slot :

Course Code : BECE206P


Course Title : Analog Circuits Lab
Class ID :
Faculty Name : Dr.
Venue : TT246
SCHOOL OF ELECTRONICS ENGINEERING

B.TECH. Electronics and Communication Engineering


BEC206P – ANALOG CIRCUITS LAB Winter 2024-2025

Course Objectives:

1. To apply knowledge gained in the theory course and get hands-on experience of the
topics

Course Outcome:

Students will be able to

1. Design and analyse the frequency response of amplifiers and differential amplifiers
2. Determine the efficiency of different classes of power amplifiers.
3. Design and analyse the waveform generator circuits

Indicative Experiments

1. Design of single-stage and multistage amplifiers using BJT and to 4 hours


analyse its frequency response characteristics.
2. Design of single-stage and multistage amplifiers using MOSFET and 4 hours
to analyse its frequency response characteristics.
3. Design of a Power Amplifier and estimation of its power 2 hours
conversion efficiency
4. Design of differential amplifier using MOSFET and determine 4 hours
itsCMRR and also perform the frequency response analysis.
5. Design of closed-loop amplifiers using Op-amp and perform 2 hours
experimentation to determine voltage gain.
6. Design of circuits using op-amp to determine the DC and AC 4 hours
characteristics.
7. Design of Instrumentation amplifier for the given specifications. 2 hours
8. Design of Comparator and Schmitt trigger circuits using Op-amp. 4 hours
9. Design of waveform generators and filters using op-amp 2 hours
10. Design of circuits using IC 555 timer for different applications. 2 hours
Total Laboratory Hours 30 hours
Mode of Assessment: Continuous Assessment and Final Assessment Test
Experiment No. 1
Frequency response of Common Emitter Amplifier-Single Stage

Aim: To design a CE amplifier for the given specifications and plot its frequency response

Components Required:

Resistors

Capacitors

NPN Transistor - BC547BP

Equipments Required:

Function Generator

Power Supply

CRO

Circuit Diagram:
Model graph:

Input waveform Output waveform

Fig.1 Input and Output Waveforms

Fig.2 Frequency Response Curve

Design:

Voltage gain Av = 100

VCC  12V , IC  4mA , f  100Hz

hfe = 100
To find RE:

VCE  50% of VCC

VRE  10% ofVCC

VRC  40% of VCC

VRE
RE 
IE

To find R1 & R2:

VR2  VBE VRE

VR1  VCC  VR 2

Assume the current passing through R1 and R2 as 10IB and 9IB


IC
I 
B
h fe

V
R2  9IR2
B

V
R1  10IR1
B

To find RC:

VRC  VCC  VCE  VRE

VRC
RC 
IC

RB  R1 || R2

1
C
2fRB

To find Bypass capacitance:


RE
X 
CE
10
10
CE 
2fRE

Tabulation:

Input voltage (Vi) =

Frequency (Hz) Output Voltage (Vo)volts Gain = 20 log(Vo/Vi ) dB

Procedure:

1. 1. Set the amplitude of the input signal to a required voltage


2. Vary the frequency from 100Hz-1MHz and note down the corresponding output voltage.
3. Tabulate the readings and calculate the gain using the formula.
AM (dB) =20log (Vo/Vi)
4. Plot the frequency response characteristics in the semi-log sheet .
5. Draw a line at maximum gain AM(dB) less than by 3dB parallel to the X-axis as shown in the
Fig.2.
6. Draw two lines at the intersection of the characteristic curve and the 3dB line onto the X-axis
which gives the (fH) and (fL) .
7. The difference between fH and fL gives the Bandwidth of the amplifier.
Result:

Midband gain of the CE amplifier Single stage =

Bandwidth of the CE amplifier Single stage =

Gain bandwidth product Single stage =


Frequency response of common source amplifier-single stage
Aim:

To design a Common Source Amplifier using n-channel MOSFET for the given specifications
and to determine its frequency response.

Components Required:

Resistors

Capacitors

MOSFET – BS170

Equipments Required:

Function Generator

Power Supply

CRO

Circuit Diagram:
VDD

10V
XSC1
R4
Ext Trig
10kΩ +
_
C2 A B
+ _ + _

XBP1
200nF
C1 Q1
R1
BS170
IN OUT
4kΩ 2nF
R2
V1 1MΩ
25mVpk
100Hz R3 C3

2kΩ 159µF
V2
2.7V
Design specifications:

VDD=10 V, ID=0.5 mA, f=100Hz, Rg=1M, gm=100ms, Rsig=4k, VDS=4V, VTN=1.2V and
kn’ (W/L) = 0.5 mA/V2
Design:

To find VGS:

ID= (½)kn’ (W/L) (VGS-VTN)2


To find RD &RS :

VDD =IDRD+VDS+IDRS
VDD-VDS = IDRD+ IDRS
VDD-VDS = ID(RD+ RS)
(VDD-VDS/ID)=RD+RS
RD+RS =
Assume (RD should be high) and fix RS

To find C1, C2 and CS :

Model graph:

Input waveform Output waveform

Fig.1 Input and Output Waveforms


Fig.2 Frequency Response Curve

Tabulation:

Input voltage (Vi) =

Frequency (Hz) Output Voltage (Vo)volts Gain = 20 log(Vo/Vi ) dB


Procedure:

1. Set the amplitude of the input signal to a required voltage


2. Vary the frequency from 100Hz-1MHz and note down the corresponding output voltage.
3. Tabulate the readings and calculate the gain using the formula.
AM (dB) =20log (Vo/Vi)
4. Plot the frequency response characteristics in the semi-log sheet .
5. Draw a line at maximum gain AM(dB) less than by 3dB parallel to the X-axis as shown in the
Fig.2.
6. Draw two lines at the intersection of the characteristic curve and the 3dB line onto the X-axis
which gives the (fH) and (fL) .
7. The difference between fH and fL gives the Bandwidth of the amplifier.
Result:
Midband gain of the CS amplifier Single stage= _
Bandwidth of the CS amplifier Single stage =
Gain bandwidth product Single stage =
Class B and Class AB Power amplifier
Aim

• To evaluate the power efficiency of a Class B power amplifier by calculating the input
and output power to the amplifier.

• To evaluate the power efficiency of a Class AB power amplifier by calculating the input
and output power to the amplifier.

Components Required:

Resistors

IRF510 (NMOS Power MOSFET) or 2SK2553S and IRF9540 (PMOS Power MOSFET) or
2SJ517

Equipments Required:

Function Generator

Power Supply

CRO

Circuit Diagram: Class B Power Amplifier

VDD
12V

XSC1

Q1 Ext Trig
+
IRF510
_
A B
+ _ + _

V1
12Vpk
1kHz
0° Q2
IRF9540 R1
1kΩ

VSS

-12V
Class AB Power Amplifier
VDD
12V
XSC1

Q1 Ext Trig
+
IRF510
_
A B
V2 + _ + _

5V
V1
12Vpk
V3
1kHz
0° 5V
Q2
IRF9540 R1
1kΩ

VSS

-12V

Class B amplifier

Procedure:

1. Apply a large signal , 12 V peak, 1KHz sine wave.

2. Observe the output across the load resistor with respect to the input.

3. Verify if you get unity voltage gain and a signal in phase with the input

Power Calculation:

Measure the following

VIN peak

VL peak
 V L2 P
AC power delivered to the load  

2RL

VL
I LP 
RL
2I L P
I dc 


DC input power is calculated using

PIN dc  VCC  I dc


PO AC 
 *100%
PIN dc
 P2 PIN  PO
Power dissipated by each o/p transistor, P  
2 2

Model Graph

Class B power Amplifier

Fig.1 Class B Power Amplifier Input and Output signal

Class AB power Amplifier

Fig.2 Class AB Power Amplifier Input and Output signal


Tabulation

Class B power Amplifier

Input Output Efficie Dead


VIN RL VL
S.No VDD DC AC ncy Zone
(V) (Ω) (V)
Power Power (%) (uS)

Class AB Power Amplifier

VIN RL VL Input DC Output Efficiency


S.No VDD
(V) (Ω) (V) Power AC Power (%)

Result

Inference
DIFFERENTIAL AMPLIFIER

Aim :

To design a Differential Amplifier and determine the differential, common mode voltage gain
and CMRR.

Components Required:

MOSFET’s-2N7000-2Nos

Resistors-4 kΩ- 2Nos

Equipments Required:

Function Generator

Power Supply

CRO

Circuit Diagram:

Fig.1 Differential Amplifier in Common Mode Operation


Fig.2 Differential Amplifier in Differential Mode Operation

Procedure:

To Find Differential Gain (Ad)

*Connect FG(10mVpk,1KHz) at the Gate of Q1 and connect the Q2 Gate to


Ground
* Connect CRO at the drain of Q2 and measure Voltage and find gain(Ad)

To Find Common Mode Gain(Ac)

 Connect both Q1 and Q2 Gate terminal to a common input(same 10mVpk,1KHz) .


 Connect the CRO at the drain of Q2(as shown in figure) and measure Voltage and find
gain(Acm)

To find CMRR

(CMRR)dB = 20 log(Ad/Acm)
Tabulation:

DIFFERENTIAL MODE COMMON MODE CMRR

FREQ Vid=V1- Vo Ad Ad Vcm=(V Vo Acm Acm 20log(Ad/Acm)


(1 KHz) V2 (dB) 1+V2)/2 (dB) dB

10mV,
1mA

15 mV,
2mA

Result

Inference
Design of Closed Loop Amplifiers

[Inverting, Non- inverting amplifier and Voltage follower]

Aim:
The purpose of this experiment is to construct different closed loop
amplifiers using op-amp and to test its response for DC or AC inputs.

Components & Equipments required:


1. Operational amplifier - µ A 741
2. Resistors
3. Signal generator
4. CRO
5. Bread board
6. Power supply
7. Connecting wires

Non inverting amplifier:


Circuit and Design:
Procedure:
1) Connect the circuit as shown.
2) Set the power supply to + 12V. Apply 100mV, 1 kHz sinusoidal signal from FG.
3) Adjust the CRO to view the input and the output sinusoids in the two channels.
4) Record the output amplitude and note the phase relationship between V in and Vout
5) Verify the theoretical and practical gain. Plot the signals in graph sheet.

Inverting amplifier:
Circuit and Design:

Choose Rf =10 kΩ, R1= 1 kΩ


Phase shift between input and output = 180o
Procedure:
1) Connect the circuit as shown.
2) Set the power supply to + 12V. Apply 100mV, 1 kHz sinusoidal signal from FG.
3) Adjust the CRO to view the input and the output sinusoids in the two channels.
4) Record the output amplitude and note the phase relationship between V in and Vout
5) Verify the theoretical and practical gain. Plot the signals in graph sheet.

Voltage follower:
Circuit and design:

Vout / Vi = 1
Procedure:
1) Connect the circuit as shown.
2) Set the power supply to + 12V. Apply 100mV, 1 kHz sinusoidal signal from FG.
3) Adjust the CRO to view the input and the output sinusoids in the two channels.
4) Record the output amplitude and note the phase relationship between V in and Vout
5) Verify the theoretical and practical gain. Plot the signals in graph sheet.
Tabulation:

Input Output
Voltage Voltage Frequency Phase Theoritical Practical
Configuration (mv) (mv) (kHz) (deg) Gain Gain

Inverting
Amplifier

Non-
Inverting
Amplifier
Voltage
follower

Inference/Result:
DC characteristics of Operational amplifiers [Input
bias current, offset current and offset voltage]

Aim:
To determine the dc parameters like input bias current, offset current and offset voltage.

Components & Equipments required:


1. Operational amplifier - µ A 741
2. Resistors
3. Capacitors
4. Bread board
5. Power supply
6. Multimeter
7. Connecting wires

Input bias current ( IB+ )


Circuit and Design:
IB+ = Vo / R1, where R1=1MΩ resistance as shown below

Procedure:
1) Connect the circuit as shown.
+
2) Measure Vo using DC multimeter and hence calculateB I
Input bias current (IB - )

Circuit and Design:

IB- =Vo / Rf where Rf =1MΩ resistance as shown below.

Procedure:
1) Connect the circuit as shown.
2) Measure Vo using DC multimeter and hence calculate IB-

Input offset voltage:


Circuit and Design:
Procedure:
1) Connect the circuit as shown.
2) The effect of bias current is compensated by Rcomp. The output voltage is given
byVo = [1 + (Rf / R1) ] Vios +Iio Rf
where Vios is the input offset voltage and Iio is input offset
current.Vo = [1 + (Rf / R1) ] Vios for negligible Iio
3) Hence Vios can be calculated using the Vo measured in the above circuit.

Inference/Result:
AC characteristics of Operational amplifiers
[Slew rate and Frequency Response]
Aim:
To find the slew rate of op-amp
To find the frequency response of op-amp

Components & Equipments required:


1. Operational amplifier - µ A 741
2. Resistors
3. Signal generator
4. CRO
5. Bread board
6. Power supply
7. Connecting wires

Slew rate:
Circuit and Design:

Procedure:
1) Connect the circuit as shown above.
2) Adjust the FG to apply 1V peak, 1 kHz Square wave to the non-inverting input.
3) Observe both the input and output Vo using the 2 channels of CRO.
4) Increase the frequency slowly. You will observe that while the input is a square
wave,the output is NOT a square wave, but has a finite slope as shown below.
Slew Rate = ΔV / Δt volts/μsec

Frequency response: Circuit and Design:

Procedure:
1) Connect the circuit as shown above.
2) Apply 100mV peak, 100 Hz sinusoidal signal as Vi. Observe the output
amplitude inthe CRO.
3) Keeping the input amplitude fixed (100mV peak), vary the frequency from 100Hz
to 1MHz and note down the output amplitude in each case.
4) Calculate the gain as shown in the table below and plot the frequency response
on asemi-log graph sheet.
Tabulation:
Vi = mV

Frequenc Output voltage Gain = 20 log


y Vo Vo/Vi
Hz Volts dB

Frequency response Graph

Inference/Result:
Design of Instrumentation Amplifier

Aim:
To design an instrumentation amplifier circuit using Op-amp and amplify the given
voltage according to required gain.

Components & Equipments required:


1. Operational amplifier - µ A 741
2. Resistors
3. Signal generator
4. CRO
5. Bread board
6. Power supply
7. Connecting wires

Design:

The input voltage to the instrumentation amplifier is the difference of the voltages given to
each of the initial Op-amps.

The gain at the output is:


AV = (R2 / R1) (1 + 2Rf / Rg)

Let R1 = R2 = 1 k Ω , Rf = 50 k Ω

Find Rg for different values of gain.

Procedure:
1). Connect the circuit as shown below.
2) Apply two ac signals at the input terminals and observe the output waveform.
3) Calculate the practical gain of the amplifier.
Circuit Diagram:

Tabulations:
V1=100 mV, V2 = 200 mV

Gain Av, Rg ( k Ω) Vo( Theoretical) Vo( Practical)


(V/V) (V) (V)

Inference & Result:


Design of Comparator and Schmitt trigger
Aim:
To study the operation of 741 op-amp as a comparator and a Schmitt trigger.

Components & Equipments required:


1. Operational amplifier - µ A 741
2. Resistors
3. Signal generator
4. Potentiometer
5. CRO
6. Bread board
7. Power supply
8. Connecting wires

Comparator - Circuit and Design:


Model Graph:

Procedure:
1) Connect the circuit as shown and adjust the 10K potentiometer so that Vref = 1V
2) Adjust the FG so that Vi = 3V peak, 1 kHz sine wave
3) Using the CRO, observe the input and output waveforms simultaneously. Plot
them ina graph sheet.
4) If Vref is made 0 Volts in the above circuit, it functions as a Zero crossing
detector(The output switches between Vsat and –Vsat every time the input sine
wavecrosses zero)

Schmitt Trigger: Circuit and Design:


Model graph:

For Schmitt trigger circuit,


VUT = R2/(R1+R2) . (+Vsat)
For Vcc=12 V, Vsat will be 10V approximately.
VUT = 2Volts
Similarly VLT = R2/(R1+R2) . (-
Vsat)VLT = -2Volts

Procedure:
1) Connect the circuit as shown above.
2) Apply 4V peak, 1 kHz sine wave as input from FG.
3) Using the CRO, observe the input and output waveforms simultaneously. Verify if
youare getting the output waveform as shown below. Plot them in a graph sheet.
Observation:

Inference/Result:

33
Sine wave generation using Wien bridge oscillator

Aim:

To design a Wien bridge oscillator using op-amp

Components & Equipment required:

1. Operational amplifier - µ A 741


2. Resistors
3. Capacitors
4. CRO
5. Bread board
6. Power supply
7. Connecting wires

Circuit and Design:

34
Choose C= 0.05 μF and R1 = 12 k Ω
The frequency of oscillation fo is exactly the resonant frequency of the balanced Wien
bridge and is given by fo= 1/(2πRC). Assuming that the resistors and capacitors are
equalin value in the reactive leg of the Wien bridge. At this frequency, the gain
required for sustained oscillations is given by
Av =1/B =3
that is , 1+(Rf/R1)
=3or Rf = 2R1
Procedure:

1) Connect the circuit as shown.


2) After giving the power supply to the chip, connect Vout, the output to the CRO
3) Now adjust the 50 k potentiometer such that Rf = 2R1, ie. 24 k. When it is exactly
so,you will find sustained oscillations at the output.
4) Measure the amplitude and frequency. Verify the frequency with the
theoreticalfrequency.
5) Plot the output in graph sheet.

Tabulation:

Inference/Result:

35
Design of Active Filters [Low pass and High pass filter]

Aim:

To design and test the low pass and high pass filters using operational amplifier IC741.

Components & Equipment required:

1. Operational amplifier - µ A 741


2. Resistors
3. Signal generator
4. CRO
5. Bread board
6. Power supply
7. Connecting wires

Low Pass Filter:

Circuit and Design:

Let us design the first order low pass filter for passband gain AV = 2 and cutoff frequency
= 5 kHz
Passband gain AV = 1+ (Rf /Ri),
AV = 2
Hence Rf = Ri = 10 kΩ
Cutoff frequency fC = 1/(2πRC) = 5
kHzChoose C = 0.01µF, find R.

36
Model Graph:

Procedure:

1) Connect the circuit as shown.


2) Apply 100 mV, 100 Hz sinusoidal signal as the input to the circuit.
3) Measure the output voltage. Vary the frequency from 100Hz to 30 kHz and
measure the outputvoltage for various frequencies of input signal.
4) Plot the frequency response graph and calculate the cutoff frequency.

37
Tabulation:

Vi = mV

Frequency Hz Output Voltage gain (dB)


VoltageVo
(Volts)

High Pass filter Circuit and Design:

38
Let us design the first order high pass filter for pass band gain AV = 2 and
cutofffrequency = 5 kHz
Passband gain AV = 1+ (Rf /Ri),
AV = 2
Hence Rf = Ri = 10 kΩ
Cutoff frequency fC = 1/(2πRC) = 5
kHzChoose C = 0.01µF, find R.

Model Graph:

Tabulation:

Vi = mV

Frequency Hz Output Voltage Voltage gain dB

39
Procedure:

1) Connect the circuit as shown.


2) Apply 100mV, 100 Hz sinusoidal signal as the input to the circuit.
3) Measure the output voltage. Vary the frequency from 100Hz to 30 kHz and
measurethe output voltage for various frequencies of input signal.
4) Plot the frequency response graph and calculate the cutoff frequency.

Second order high pass filter:

Circuit and design:

Let us design the second order High pass filter for passband gain Av=2 and cutoff
frequency = 5 kHz
Pass band gain Av=1 +
(Rf/Ri)Av = 2, Hence Rf = Ri
= 10kΩ Cutoff frequency fc =
1

2 R1R2C1C2 = 5 kHz

Let R1=R2=R, C1=C2=C


So fc =1/(2πRC)
40
Choose C=0.01µF, Find R.

Procedure:
1) Connect the circuit as shown.
2) Apply 100mV, 100 Hz sinusoidal signal as the input to the circuit.
3) Measure the output voltage. Vary the frequency from 100Hz to 30 kHz and
measurethe output voltage for various frequencies of input signal.
4) Plot the frequency response graph and calculate the cutoff frequency. Compare
the slope of first order and second order high pass filter graphs. Record your
observations.

Tabulation:
Vi = mV

Frequency Hz Output Voltage Voltage gain dB

Inference / Result:

41
Design of Astable Multivibrator using Timer

Aim:
To design an astable multivibrator using timer that will produce a square wave of
frequency 1 kHz.

Components & Equipments required:


1. Operational amplifier – IC 555
2. Resistors
3. Capacitors
4. CRO
5. Bread board
6. Power supply
7. Connecting wires

Circuit and Design:


Lets design an astable multivibrator which will produce a square wave of
frequency 1kHz.
Ton = 75% (Ton is the percentage of time for which the output is
high)Ton = 0.69(R1+R2) C
Toff = 0.69(R2) C
Time Period, T = 0.69(R1+2R2)
C Frequency, f= 1.45 /
((R1+2R2) C) Toff =
0.69(R2)*C=0.25 ms

42
Let C = 0.1µF
R2=3.6 k (Put 3.3 k and 330Ω in series)
Similarly, Ton = 0.69(R1+R2) C = 0.75
ms
Substituting R2 and C, we get R1= 7.2 k (Put 6.8 k and 470Ω in series)

Procedure:
1) Connect the circuit as shown above.
2) Use VCC = 5V.Use R1, R2 and C as calculated above.
3) Observe the output at pin no.3 using CRO. Measure the amplitude and
frequency ofthe square wave you got.
4) Observe the capacitor voltage at pin no.6 using CRO. You will be able to see
thecapacitor charging and discharging as shown in the figure below.
5) Verify the theoretical time period with the practical time period. Plot the
waveforms ina graph sheet.

43
Observations:

Inference / Result:

44

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