4/21/25

Chapter 1
BJT as a Small Signal Amplifiers

1
Assoc. Prof. Ts. Dr. Ruzlaini Bt Ghoni

Contents

• Common Emitter (CE), Common Collector (CC) and

Common Base (CB)
• AC parameters
• AC analysis at middle frequency for CC, CE and CB
configuration
• Frequency response

Topic Learning Outcomes

• Understand the concept of amplifiers

• Identify and apply internal transistor parameters

• Understand and analyze common-emitter, common-

base, and common-collector amplifiers

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Introduction

One of the primary uses of a transistor is to amplify ac

signals. This could be an audio signal or perhaps some high
frequency radio signal. It has to be able to do this without
distorting the original input.

What is Small Signal Analysis?

• Small signal analysis relates to the linear approximation of a

transistor model around it's operating point (Q-point).

• The output is a replica of the input except for a change in amplitude.

• In simple terms this means that a sine wave in gives a sine

wave out. That is the hallmark of a linear system.

What is Large Signal Analysis?

A large signal make the device operate in a non-linear fashion by

clipping the output or introducing various kinds of distortion.

This is why you cannot turn the volume on an amplifier all the way up
to the maximum value because even small input signals will be
reduced to unintelligible hash.

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Amplifier Operation

For the analysis of transistor circuits from both dc and ac

perspectives the ac subscripts are lower case and italicized.
Instantaneous values use both italicized lower case letters
and subscripts.

1.5 V 5V

In
Amplifier Out

Out
5V
Gain = = 3.33
1.5
InV

Gain can be expressed in decibels (dB).

The dB is a logarithmic unit.
Common logarithms are exponents of the number 10.

The log of 100 is 2

2
10 = 100 The log of 1000 is 3
103 = 1000
10-2 = 0.01 The log of 0.01 is -2

100 = 1 The log of 1 is 0

103.6 = 3981
The log of 3981 is 3.6
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The maximum value of VCE for this circuit is 14 V.

The maximum value of IC is 14 mA.

These are the limits for this circuit.

14 V
IC(MAX) =
1 kΩ

350 kΩ 1 kΩ

14 V
C

B
CC E

10

10

The load line connects the limits.

This end is called The linear region is between the limits.

saturation.

SAT. 14 100 mA
LINEAR
12 80 mA
10
60 mA
IC in mA 8
6 40 mA

4 20 mA
2
0 mA
0 2 4 6 8 10 12 14 16 18

VCE in Volts

This end is called cutoff. CUTOFF

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Use Ohm’s Law to determine the base current:

14 V
IB = = 40 mA
350 kΩ

350 kΩ 1 kΩ

14 V
C

B
CC E

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An amplifier can be operated at any point along the load line.

The base current in this case is 40 mA.

14 100 mA
Q 80 mA
12
10
60 mA
IC in mA 8
6 40 mA

4 20 mA
2
0 mA
0 2 4 6 8 10 12 14 16 18

VCE in Volts

Q = the quiescent point

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The input signal varies the base

current above and below the Q point.

14 100 mA

12 80 mA
10
60 mA
IC in mA 8
6 40 mA

4 20 mA
2
0 mA
0 2 4 6 8 10 12 14 16 18

VCE in Volts

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14

Overdriving the amplifier causes clipping.

14 100 mA

12 80 mA
10
60 mA
IC in mA 8
6 40 mA

4 20 mA
2
0 mA
0 2 4 6 8 10 12 14 16 18

VCE in Volts

The output is non-linear.

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What’s wrong with this Q point?

14 100 mA

12 80 mA
10
60 mA
IC in mA 8
6 40 mA

4 20 mA
2
0 mA
0 2 4 6 8 10 12 14 16 18

VCE in Volts

How about this one?

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14 V
IB = = 40 mA
350 kΩ
IC = β x IB = 150 x 40 mA = 6 mA

VRL = IC x RL = 6 mA x 1 kΩ = 6 V

VCE = VCC - VRL = 14 V - 6 V = 8 V

This is a good Q point for linear amplification.

350 kΩ 1 kΩ
14 V
C

B
CC E b = 150

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14 V
IB = = 40 mA (IB is not affected)
350 kΩ
IC = β x IB = 350 x 40 mA = 14 mA (IC is higher)

VRL = IC x RL = 14 mA x 1 kΩ = 14 V (VRL is higher)

VCE = VCC - VRL = 14 V - 14 V = 0 V (VCE is lower)

This is not a good Q point for linear amplification.

350 kΩ 1 kΩ
14 V
C

B
CC E b = 350
b is higher
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The higher b causes saturation.

14 100 mA

12 80 mA
10
60 mA
IC in mA 8
6 40 mA

4 20 mA
2
0 mA
0 2 4 6 8 10 12 14 16 18

VCE in Volts

The output is non-linear.

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AC equivalent circuit is obtained by:

1) Setting all DC Sources to zero

2) Replace all capacitors with short circuit equivalent

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BJT circuit under investigation

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3) Replace the network in more convenient and logical form

Note on the current direction for AC equivalent

circuit

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BJT small signal ac equivalent circuit

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DEFINITION OF THE INPUT AND OUTPUT IMPEDANCES

Input and output impedances are a concept and do not represent any physical resistor

They represent a value in Ohms (Ω) that takes into consideration the design of the amplifiers (the
arrangement of the components around the transistor) and to what and how they are connected
(source, other amplifiers or transducers)

The input impedance is connected across the input terminals of the amplifier while the output
impedance is connected in series with the amplifier

Zin=Vin/Iin Zout=Vout/Iout

Generally, an input impedance is high and an output impedance is low. Ideal amplifiers have
an infinite input impedance and a zero value for the output impedance.

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IMPORTANCE OF THE IMPEDANCES

If there is something to really keep in mind about why input and output
impedances are so important is matching. Impedance matching is a simple
concept that states that the power transfer from an internal source
resistance (RS) to a load (RL) is maximized when RS=RL. A simple
representation is given below to define the different parameters in this
context :

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Common-Emitter (CE) Fixed-Bias Configuration

𝑉"
b 𝐼"
𝑉!
𝐼!

The input (Vi) is applied to the base and the output (Vo) is from the collector.

The Common-Emitter is characterized as having high input impedance and low output impedance
with a high voltage and current gain. 25

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C om m on-Em itter ( C E ) F ix e d - B ia s C o n f ig u r a t io n

DC Equivalent Circuit
IC
b= = gain
IB
VCC = 12 V + This is why BJT is known as CURRENT GAIN !!
+
+ + VCC 12 V
IB = = = 34.3 μA
RB 350 kΩ
V RB
RB RC VR C
350 kΩ 1 kΩ
+ IC = b x IB = 150 x 34.3 μA = 5.14 mA
+-
C VR C = VR L = IC x RL = 5.14 mA x 1 kΩ = 5.14 V
-
VCC bD C = ba c = 150 VCE VCC VCE = VCC - VR L = 12 V – 5.14 V = 6.86 V
B
E +
- IC ≅ IE = 5.14 mA
VC

VE

- --
- 26

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Common-Emitter (CE) Fixed-Bias Configuration

Removing DC effects of VCC and Capacitors

1) Setting all DC Sources to zero
2) Replace all capacitors with short
circuit equivalent
3) Replace the network in more
convenient and logical form

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Transistor Equivalent Circuits

• BJT small signal analysis is modeled by use of resistance or r parameters
for better understanding.
• Since the base resistance, rb is small it is normally is not considered and
since the collector resistance, rc is fairly high we consider it as an open. The
emitter resistance, re is the main parameter that is viewed.

re is determined from this

simplified equation.

re = 25 mV/ IE

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Common-Emitter (CE) Fixed-Bias Configuration

re model
Input Output

b and ro : look in the datasheet for the transistor or test the transistor using a curve
tracer

re : calculate using dc analysis re = 25 mV/ IE

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C o m m o n -E m itte r (C E ) F ixe d -B ia s C o n fig u ra tio n

Impedance Calculations

Input Impedance: Output Impedance:

Z i = R B || bre Z o = R C || ro

Z i ≅ bre (assumed R B ≥ 10 bre ) Z o ≅ R C (assumed ro ≥ 10 R C )

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C o m m o n -E m itte r (C E ) F ixe d -B ia s C o n fig u ra tio n

Gain Calculations
Voltage Gain (Av) Current Gain (Ai)
Av = Vo = - (Rc || ro) Ai = Io = bRBro
Vi re Ii (ro + RC)(RB + bre)
Av = - Rc (assumed ro ≥ 10 R C ) Ai ≅ b
re (assumed ro ≥ 10 R C , R B ≥ 10 bre)

Current Gain from Voltage Gain

Ai = - Av Zi
RC

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C o m m o n -E m itte r (C E ) F ixe d -B ia s C o n fig u ra tio n

Voltage Gain

Av = Vo Vo = -bIb (Rc || ro)

Vi Vi = Ib bre

Negative sign of inverse output voltage

waveform (The phase relationship between
input and output is 180 degrees inverse)

Av = -bIb (Rc || ro) = -(Rc || ro) = - Rc

Ib bre re re if ro = ∞ or ≥ 10 Rc

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C o m m o n -E m itte r (C E ) F ixe d -B ia s C o n fig u ra tio n

Current Gain
Io = robIb Io = rob
Ai = Io = Io ro + Rc Ib ro + Rc
Ii Ib Ib = RBIi Ib = RB
RB + bre Ii RB + bre

Ai = Io Ib = rob RB ∴ Ai = Io = robRB
Ib Ii ro + Rc RB + bre Ii (ro + Rc)(RB + bre)
if ro ≥ 10 Rc and RB ≥ 10bre

∴ Ai = Io ≅ robRB = b
Ii (ro)(RB)

∴ Ai = -Av Zi
RC 33

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Common Emitter – Voltage-Divider Bias Configuration

R1 and R2 form
a voltage divider

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C o m m o n -E m itte r (C E ) V o lta g e D iv id e r-B ia s C o n fig u ra tio n

DC Equivalent Circuit
R2
VB = x VCC
VCC 12 V +VCC R1 + R2

VB = 2.7 kΩ
x 12 V
R1 2.7 kΩ + 22 kΩ
22 kΩ
RC 2.2 kΩ R1
VB = 1.31 V
C
+VB
VE = VB - VBE
VB
B R2 VE = 1.31 V - 0.7 V = 0.61 V
VBE
E
VE VE
R2 IE =
2.7 kΩ RE RE
220 Ω
0.61 V
IE = = 2.77 mA
220 W

IC ≅ IE 35

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C o m m o n -E m itte r (C E ) V o lta g e D iv id e r-B ia s C o n fig u ra tio n

AC Equivalent Circuit
Input Output

Input Impedance: Output Impedance:

Z i = R 1 || R 2 || bre Z o = R C || ro

Z o ≅ R C (assumed ro ≥ 10 R C )
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C o m m o n -E m itte r (C E ) V o lta g e D iv id e r-B ia s C o n fig u ra tio n

Gain Calculations
Voltage Gain (Av) Current Gain (Ai)
Av = Vo = - (Rc || ro) Ai = Io = b(R1 || R2 )ro
Vi re Ii (ro + RC)((R1 || R2 ) + bre)

Av = - Rc (assumed ro ≥ 10 R C ) Ai = Io = b(R1 || R2 )
re Ii ((R1 || R2 ) + bre)
(assumed ro ≥ 10 R C)

Ai = Io ≅ b
Ii
(assumed ro ≥ 10 R C, ( R 1 || R 2 ) ≥ 10 bre)

Current Gain from Voltage Gain

Ai = - Av Zi
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RC

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C o m m o n -E m itte r (C E ) V o lta g e D iv id e r-B ia s C o n fig u ra tio n

Voltage Gain

Av = Vo Vo = -bIb (Rc || ro)

Vi Vi = Ib bre

Negative sign of inverse output voltage

waveform (The phase relationship between
input and output is 180 degrees inverse)

Av = -bIb (Rc || ro) = -(Rc || ro) = - Rc

Ib bre re re if ro = ∞ or ≥ 10 Rc

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C o m m o n -E m itte r (C E ) V o lta g e D iv id e r-B ia s C o n fig u ra tio n

Current Gain
Io = robIb Io = rob
Ai = Io = Io ro + Rc Ib ro + Rc
Ii Ib Ib = (R1 || R2) Ii
Ib = (R1 || R2)
(R1 || R2) + bre
Ii (R1 || R2) + bre

∴ Ai = Io = rob (R1 || R2)

Ii (ro + Rc)(R1 || R2) + bre) if ro ≥ 10 Rc and (R1 || R2 ) ≥ 10bre

∴ Ai = Io ≅ rob (R1 || R2) ≅ b (R1 || R2) ≅ b (R1 || R2) ≅ b

Ii (ro) ((R1 || R2) + bre) ((R1 || R2) + bre) (R1 || R2)

∴ Ai = -Av Zi
RC 39

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C o m m o n -E m itte r B ia s C o n fig u ra tio n

Unbypassed RE

40

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C o m m o n -E m itte r (C E ) B ia s C o n fig u ra tio n

AC Equivalent Circuit
Unbypassed RE

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C o m m o n -E m itte r (C E ) B ia s C o n fig u ra tio n

AC Equivalent Circuit - Unbypassed RE

Apply KVL at input side:

Input Impedance: Output Impedance:

V i = Z bIb = Ibbre + IeR E b >> 1 Zo = RC

Z b = bre + (b + 1)R E

V i = Ibbre + ( b + 1 ) IbR E Z b ≅ b re + bR E
Z b ≅ b (re + R E ) Z i = R B || Z b
∴ Z b ≅ V i = bre (b+ 1) IbR E R E >> re
Z b ≅ brIeb (Assumed RE >> re ) 42

∴ Z b ≅ bR E

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C o m m o n -E m itte r (C E ) B ia s C o n fig u ra tio n Unbypassed R E

Gain Calculations

Voltage Gain (Av) Current Gain (Ai)

Av = Vo = - bRc Ai = Io = bRB
Vi Zb Ii RB + Zb

Av = Vo = - Rc (assumed Zb ≥ b(re + RE ) Current Gain from Voltage Gain

Vi re + RE
Ai = - Av Zi
or
RC
Av = Vo ≅ - Rc (assumed Z b ≥ bRE
Vi RE

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C o m m o n -E m itte r (C E ) B ia s C o n fig u ra tio n Unbypassed R E

Voltage Gain
Vo = -IoRc = -bIbRc = -b Vi Rc Ib = Vi
Av = Vo Zb Zb
Vi Vi = IbZb

Av = -bRc
Zb
Substituting z b = b (re + RE )

Av = - Rc
re + RE
Assumed z b ≅ bRE ) Negative sign of inverse output voltage
waveform (The phase relationship between
input and output is 180 degrees inverse)
Av = -Rc
RE 44

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C o m m o n -E m itte r (C E ) B ia s C o n fig u ra tio n Unbypassed R E

Current Gain

Io = bIb Io = b
Ai = Io = Io Ib
Ii Ib Ib = RB Ii Ib = RB
RB + Zb Ii RB + Zb

∴ Ai = Io = Io Ib =b RB
Ii Ib Ii RB + Zb

∴ Ai = -Av Zi
RC

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C o m m o n -E m itte r B ia s C o n fig u ra tio n

Bypassed RE

This is the same circuit as the CE fixed-bias configuration and

therefore can be solved using the same re model
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Common-Collector (CC) Configuration

DC Equivalent Circuit

IB = VCC
RB
IE ≅ IC = βIB

Also known as Emitter Follower

Input is on the base and the output is from the emitter
47

High Current gain and High input impedance

47

Common Collector Configuration

AC Equivalent Circuit

Input Impedance: Output Impedance:

Z i = R B || Z b Z b ≅ b (re + R E)
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Z b = bre + (b + 1)R E Z o ≅ bR E

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Common Collector Configuration

Calculation for 𝐼$
'*
𝐼$ = 𝛽 + 1 𝐼& = 𝛽 + 1
(-

𝑉)
𝐼& =
𝑍&
𝑍% = 𝛽𝑟, + 𝛽 + 1 𝑅-
Substituting 𝑍% gives
𝑉) 𝛽+1 ≅β
𝐼$ = 𝛽 + 1 𝑉) = + 𝑅0
𝛽𝑟$ b&' b&
+𝛽1 ( b)*)
≅ ' = 𝑟,
b

$*
∴ 𝐼# =
%+ & ',
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Emitter-Follower Configuration
Impedance Calculations (cont’d)
Output Impedance:
7"+#)#)I2/4"2E-/R-/2#3R"6")*"2+E%2/4"2"3#//"%2+E00E1"%2 *E)+#I-%./#E)
&#
! D" =
%" + $ !

'# = & " %% $! '$  %! ####

& " >>% !
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Common Collector Configuration

Gain Calculations

Voltage Gain (Av) Current Gain (Ai)

𝑉" 𝑅- 𝛽𝑅3
𝐴. = = 𝐴) ≅ −
𝑉! 𝑅- + 𝑟, 𝑅3 + 𝑍&
Current Gain from Voltage Gain
𝑉"
𝐴. = ≅1
𝑉! %
𝐴# = -𝐴$ & (
Assummed 𝑅- ≫ 𝑟,, 𝑅- + 𝑟, ≅ 𝑅-

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Common Collector Configuration

Voltage Gain
𝑅+ 𝑉,
𝑉* =
𝑅+ + 𝑟#
$3 ',
∴ 𝐴- = =
$* ', & %+
𝑅- ≫ 𝑟,
𝑅- + 𝑟, ≅ 𝑅-

$3
∴ 𝐴- = ≅1
$*
The phase relationship between input and
output is in-phase
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Common Collector Configuration

Current Gain
5/60
𝐼4 = 5
/ 7 81

6 5/
∴ 61= 5
0 / 7 81

𝐼9 = −𝐼: = − 𝛽 + 1 𝐼4
6
∴ 62 = − 𝛽 + 1
1

53 53 5- 6;
𝐴) = = =− 𝛽+1
5* 5- 5* 6;7 (-
𝛽+1 ≅β

5'; (
∴ 𝐴, ≅ − or
𝐴) = -𝐴8 6 *
'; & 6- ,
53

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Common-Base (CB) Configuration

The input (Vi) is applied to the emitter and the output (Vo) is from the
collector

The Common-Base is characterized as having low input impedance and

high output impedance with a current gain less than 1 and a very high
voltage gain
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Common-Base (CB) Configuration

AC Equivalent Circuit

Input Impedance: Output Impedance:

Z i = R E || re Z o = RC

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Common-Base (CB) Configuration

Gain Calculations

Voltage Gain (Av)

𝑉" 𝛼𝑅3 𝑅3
𝐴. = = ≅
𝑉! 𝑟, 𝑟,

Current Gain (Ai)

𝐼:
𝐴) = = −𝛼 ≅ −1
𝐼)

56

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Common-Base (CB) Configuration

Voltage Gain

𝑉* = −𝐼* 𝑅7 = − −𝐼7 𝑅7 = 𝛼𝐼# 𝑅8

$*
𝐼# =
%+

'*
𝑉* =α ;+
𝑅<

$3 '= '= The phase relationship between input and

∴ 𝐴- = = 𝛼 ≅ output is in-phase
$* %+ %+

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Common-Base (CB) Configuration

Current Gain

𝐼# = 𝐼,

𝐼# = −𝛼𝐼# = -𝛼𝐼,

93
∴ 𝐴, = = −𝛼 = −1
9*

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Troubleshooting

Check the DC bias voltages – if not correct check power supply,

resistors, transistor. Also check to ensure that the coupling
capacitor between amplifier stages is OK.

Check the AC voltages – if not correct check transistor, capacitors

and the loading effect of the next stage.

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