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DIYguide Logic Ckts 2011

The document discusses logic circuits and Boolean algebra techniques for simplifying logic functions including: - Using a truth table to prove an equivalence between two Boolean expressions - Simplifying logic functions using De Morgan's theorems, Boolean algebra, and Karnaugh maps - Determining the logic function and converting to NAND form for a given circuit diagram - Finding the simplest sum-of-products form for a logic function from a given truth table

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58 views

DIYguide Logic Ckts 2011

The document discusses logic circuits and Boolean algebra techniques for simplifying logic functions including: - Using a truth table to prove an equivalence between two Boolean expressions - Simplifying logic functions using De Morgan's theorems, Boolean algebra, and Karnaugh maps - Determining the logic function and converting to NAND form for a given circuit diagram - Finding the simplest sum-of-products form for a logic function from a given truth table

Uploaded by

brandon-lim-5784
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Logic Circuits:

13.10 Use a truth table to prove that -

B = AB + AB
Similar to the complete induction method for proving the Boolean theorems, first of all we should identify the variables and the terms derived from them; The above expression has two variables A and B, which can have four possible combinations, as shown below (A` is derived from A through logic negation):

A 0 0 1 1

B 0 1 0 1

A` 1 1 0 0

Now, create columns for the terms existing on the L.H.S and R.H.S (follow standard gate definitions) in order to compare the two sides

A 0 0 1 1

B 0 1 0 1

A` 1 1 0 0

AB 0 0 0 1

A`B 0 1 0 0

R.H.S. = AB+A`B 0 1 .. ..

L.H.S = B .. ..

Now Fill-in the blanks to prove L.H.S = R.H.S...


S.Chauhan MP2008 (2010-11)

13.13 Simplify the following logic function: a) using De Morgans theorems and the rules of Boolean algebra; b) using K-maps

F ( X , Y , Z ) = X .Y .Z + X .Y .Z + X .(Y + Z )
(a) Use simple Boolean theorems and axioms to reduce the function. Term 3 can be simplified using De Morgans laws:

F ( X , Y , Z ) = X .Y .Z + X .Y .Z + X Y Z
Terms 1 and 3 can be combined Distributivity theorem (2 variables in common) and so on:

= X .Y .Z + X Y Z + X .Y .Z ........associativ ity .. .. = Y Z + X .Y .Z .......... .........identity


(b) Use K-maps for simplification. There are 3 variables X, Y and Z. We can use either 1 or 2-dimensional map; one of the ways to write the latter is shown below (Remember, you need to use Gray code):

Z 0 1

XY 00 1 0

01 0 1

11 0 0

10 1 0

You can combine and make loops only in powers of 2. All the three 1s seem to be non-adjacent. Not true! Try wrapping around the columns, you have a pair

13.15 Simplify the logic function using Boolean Algebra and K-maps.

F ( A, B, C ) = A.B.C + A.B.C + A.B.C + A.B.C


(a) Use simple Boolean theorems and axioms to reduce the function. Terms 1-2 and 3-4 can be combined:

F ( A, B, C ) = A.B.(C + C ) + A.B.(C + C ).......distributi vity


Now use complementarity and so on

= A.B.(1) + A.B.(1).......Complement arity .. .. .. = B.......... .......... ......... Identity


(b) Use K-maps for simplification. There are 3 variables A, B and C. We can use either 1 or 2-dimensional map; one of the ways to write the latter is shown below (Remember, you need to use Gray code):

C 0 1

AB 00 0 0

01 1 1

11 1 1

10 0 0

You can combine and make loops only in powers of 2. All the four 1s are adjacent and hence can be combined together. A is changing along the columns and C along the rows; B remains constant at 1. Thus the answer is B

13.17 Determine the Boolean function describing the operation of the circuit shown in Figure P.13.17 and convert it to NAND-only configuration
(a) This circuit includes two levels of computation: First obtain individual Gate outputs, starting from the left and write at the output of the respective Gate. The outputs thus obtained from level-one are ANDed to get the final output:

Note: This circuit uses 4-Gates and 3-ICs

(B) This circuit already has two NANDs. If we can convert the NOT and AND Gate into NANDs, well have all NANDs i.e. NAND-only configuration. Using simple theorems and De Morgan s laws, we can do this:

Note: This circuit uses 5-Gates but only 2-Ics thus reducing the Hardware cost by 2/3rd Draw the circuit

13.24 Find the logic function corresponding to the truth table of Figure P13.24 in the simplest sum of-products form.
A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 1 0 0 0 1 0 1 1 For SoP, look for those Rows which give output F as 1 and write their minterms (as shown in red below). These give the products; SoP form is obtained by OR-ing them:

A`B`C`

F = A`B`C` + A B`C` + A B C` + A B C
A B`C` A B C` ABC
Now, for simplest SoP, simplify/optimize this expression either using Boolean Algebra or, K-maps

C 0 1

AB 00 1 0

01 0 0

11 1 1

10 1 0
Now, use K-map rules for combining adjacent 1s & deduce the answer. F = AB+A`C`

(a) First of all, write the final expression, similar to the steps used in problem 13.17 and then minimize (simplify/optimize) it using Boolean Algebra or, K-maps. Note that you have 4-Gates and 3-Ics to start with. One of the possible ways could be :

Identify and write all the theorems in each step above. Now you have 3-Gates and 2-ICs. Use involution and De Morgans laws to write NOR-only configuration and re-draw the circuit thus obtained! Do you see any advantage in this case??

An equality comparator compares the inputs and gives an output (true) when they are equal and no output (false) when unequal. We are told there are two inputs A and B. So, lets write the truth table for such a comparator: Output Y is 1 when both A and B are 0 (row 1) or 1 (row 4) Now, draw the logic circuit as represented by the truth table. You can write output in standard canonical form i.e. Y = AB + AB Or, As you can recognize, the truth-table indicates a standard gate! Which one is it? Draw the circuit symbol for that gate Then draw the output waveform. Output is high when both the inputs are equal (high or low). A few cycles are shown, you can complete the remaining

A 0 0 1 1

B 0 1 0 1

Y 1 0 0 1

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