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Microprocessor Nec 503

This document outlines the structure of a B. Tech. examination paper for Microprocessors, including various sections with questions on microprocessor concepts, architecture, and interfacing techniques. It consists of multiple sections requiring brief answers, detailed explanations, and diagrammatic representations. The exam covers topics related to 8085 and 8086 microprocessors, including their features, interrupts, and interfacing with peripheral devices.

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0% found this document useful (0 votes)
4 views2 pages

Microprocessor Nec 503

This document outlines the structure of a B. Tech. examination paper for Microprocessors, including various sections with questions on microprocessor concepts, architecture, and interfacing techniques. It consists of multiple sections requiring brief answers, detailed explanations, and diagrammatic representations. The exam covers topics related to 8085 and 8086 microprocessors, including their features, interrupts, and interfacing with peripheral devices.

Uploaded by

lokeshrawat342
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Printed pages: 02 Roll No.

Sub Code: NEC503


Paper Id: 3052
B. TECH.
(SEM V) THEORY EXAMINATION 2017-18
MICROPROCESSOR

Note: 1. Attempt all sections. If require any missing data; then choose suitably.
2. Any special paper specific instruction.
SECTION – A

1. Attempt all question in brief: 2x10=20

(a) What is a microprocessor? What is the technology used in microprocessors?


(b) What are the different buses and what jobs they do in a microprocessor?
(c) Draw the basic block diagram of microprocessors and discuss the same.
(d) The address capability of 8085 is 64 KB. Explain.
(e) How many instructions 8085 can support?
(f) Mention the addressing modes of 8085.
(g) Explain the concept of Memory segmentation in 8086 microprocessor.
(h) How many hardware interrupts 8085 supports?
(i) How many I/O ports can 8085 access?
(j) Why the lower byte addresses bus (A0 – A7) and data bus (D0 – D7) are
multiplexed?

SECTION – B

2. Attempt any three of the following: 10x3=30

(a) Draw the architecture of 8085 and mention its various functional blocks.
(b) Explain different types of interrupts in 8085 Microprocessors.
(c) Draw the pin diagram and functional block diagram of 8254.
(d) Explain the difference between IO mapped IO and Memory Mapped IO
interfacing technique.
(e) Explain PPI (8255) with its block diagrams. Also explain its operating modes.

SECTION – C

3. Attempt any one part of the following: 10x1 =10

(a) Explain the features and architecture of 8086 Microprocessors. Mention the jobs
performed by BIU and EU.
(b) What are interrupt? Explain types of interrupt in 8086.
4. Attempt any one of the following: 10 x 1 =10

(a) Explain ALE, HOLD, READY, S0, S1 SIGNALS for 8085 microprocessor.
(b) Design a hexadecimal up counter which count from 00H to FFH in a system with
a 1.0 µs clock period.
5. Attempt any one of the following: 10 x 1 =10

(a) Write a program to add two 16-bit numbers for 8085mp.


(b) Explain PPI (8255) with its block diagrams. Also explain its operating modes.

6. Attempt any one of the following: 10 x 1 =10

(a) Explain the operation of 8254 in mode 3. Briefly explain 8254 as a counter?
(b) Design a system for 8085 such that it contain 4KB of EPROM and 2KB of
RAM using two 2KB of EPROM and two 1KB of RAM. Draw the complete
interfacing diagram.
7. Attempt any one of the following: 10 x 1 =10
(a) Draw the block diagram of 8251 USART and explain each block. Also draw its
interfacing with 8086.
(b) With the help of a functional block diagram and working of 8257 DMA controller.

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