Computer Organization and Assembly Language - In-depth Explanation
1. Objectives and Perspectives of Assembly Language
Assembly language provides an interface between high-level programming and machine code. It enables
direct manipulation of hardware using symbolic instructions. This course introduces why assembly is
essential in systems programming, reverse engineering, embedded systems, and performance-critical
applications.
2. Organization and Design of Basic Computer
A basic computer system consists of input units, processing units (CPU), memory units, and output units.
Understanding their interconnections and operations forms the basis of computer architecture. Topics include
fetch-decode-execute cycles, data paths, and control signals.
3. Microprocessor Bus Structure: Address, Data, and Control
The CPU communicates with other components via buses:
- Address Bus: Determines the memory location to read/write data.
- Data Bus: Transfers actual data to/from memory or peripherals.
- Control Bus: Sends control signals (e.g., memory read/write, I/O enable).
4. Memory Organization and Structure (Segmented and Linear Models)
- Segmented Model: Memory is divided into segments like code, data, and stack. Each segment has a base
address and offset. Common in x86 architecture.
- Linear Model: Memory is addressed linearly. Simpler for modern systems with large memory spaces. Used
in flat memory models.
5. Addressing Modes
These define how operands are accessed in assembly instructions:
- Immediate: Operand is directly specified.
- Register: Operand is in a CPU register.
- Direct/Indirect: Operand address is specified directly or through a register.
- Indexed/Base Mode: Used in array or structure access.
6. Programming with Assembly Language
Computer Organization and Assembly Language - In-depth Explanation
Covers syntax and semantics of assembly instructions including instruction formats, data definitions, flow
control (loops, branches), and performance-tuned code writing.
7. Introduction to the Assembler and Debugger
- Assembler: Translates assembly language to machine code.
- Debugger: Tool to step through programs, inspect registers/memory, and troubleshoot bugs.
8. Introduction to Registers and Flags
Registers are small CPU storage areas (e.g., EAX, EBX). Flags indicate operation results (Zero, Carry,
Overflow, Sign) and influence conditional branches.
9. Machine-Level Representation of Programs
Understanding how code is translated into binary: instruction encoding, opcodes, operand formats, and how
compilers and assemblers handle translation.
10. Data Movement Operations
Operations like MOV, LEA, PUSH, POP transfer data within the CPU and memory. Crucial for subroutine
calls and parameter passing.
11. Arithmetic and Logical Operations
- Arithmetic: ADD, SUB, INC, DEC, MUL, DIV
- Logical: AND, OR, XOR, NOT, SHL, SHR
These affect flags for conditions and flow control.
12. Procedures
Procedures are modular code blocks using CALL and RET. Argument passing via registers or stack.
Maintains code modularity and reuse.
13. Array Allocation and Access
Low-level memory management of arrays, accessed via base address and offset. Uses loops and pointer
arithmetic.
Computer Organization and Assembly Language - In-depth Explanation
14. Subroutines, Stack and Its Operation
Subroutines use the stack for storing return addresses and local data. Stack managed with PUSH/POP and
stack frame pointers (SP, BP).
15. Peripheral Control Interrupts
Interrupts handle asynchronous events:
- Types: Maskable and Non-maskable
- Interrupt Vector Table (IVT), ISR (Interrupt Service Routines), Software Interrupts (INT n).
16. Interfacing with High-Level Languages
Mixing C/C++ with inline assembly for speed and control. Covers calling conventions and compiler-generated
assembly inspection.
17. Real-Time Applications
Real-time systems require strict timing. Assembly is used in embedded systems for deterministic response
(sensors, robotics, etc.).
18. Y86 Instruction Set Architecture
Y86 is a simplified version of x86 used in education. Teaches CPU simulation, instruction
fetch-decode-execute cycle, and register/memory operations.
