UNIT - IV

DIGITAL LOGIC
Digital Logic:
Boolean Algebra, Basic and Universal Logic gates, Half
adder, Full adder, Simplification of logic expressions using K-
maps, Multiplexer, De-multiplexer, Encoder and Decoder.

BOOLEAN ALGEBRA

George Boole in 1854 invented a new kind of algebra known

as Boolean algebra. It is sometimes called switching algebra.
Boolean algebra is the mathematical frame work on which
logic design based. It is used in synthesis & analysis of binary
logical function.

Laws of Boolean Algebra:

1. 0’=1
2. 1’=0
3. If A=0, A’=1
4. IF A=1, A’=0
5. A’’=A
6. A.0=0
7. A.1=A
8. A.A=A
9. A.A’=0
10. A+0=A
11. A+1=1
 12. A+A=A
13. A+A’=1
14. A+AB=A(1+B)=A
15. A+A’B=A+AB+A’B=A+B(A+A’)=A+B
LOGIC GATES

• It is an electronic circuit which makes logic decisions.

A logic gate is a digital circuit with one or more input
signal and only one output signal. All input or output
signals either low voltage or high voltage. A digital
circuit is referred to as logic gate for simple reason i.e.
it can be analyzed on the basis of Boolean algebra.
• To make logical decisions, three gates are used. They
are OR, AND and NOT gate. These logic gates are
building blocks which are available in the form of IC.
• The input and output of the binary variables for each
gate can be represented in a tabular column or truth
table.
1. OR Gate: The OR gate performs logical additions
commonly known as OR function. The OR gate has two or
more inputs and only one output. The operation of OR gate is
such that a HIGH(1) on the output is produced when any of
the input is HIGH. The output is LOW(0) only when all the
inputs are LOW.

• If A & B are the input variables of an OR gate and c

is its output, then A+B. similarly for more than two
 variables, the OR function can be expressed as
Y=A+B+C.
• Logical Symbol:

A
Y
B

 Truth table

Input Output

A B Y= A+B

0 0 0

0 1 1

1 0 1

1 1 1
2. AND Gate : The AND gate performs logical
multiplication, commonly known as AND function. The AND
gate has two or more inputs and a single output. The output of
an AND gate is HIGH only when all the inputs are HIGH.
Even if any one of the input is LOW, the output will be LOW.
If a & b are input variables of an AND gate and c is its output,
then Y=A.B

Logic Symbol

A
Y
B

Truth table

Input Output

A B Y=A.B

0 0 0

0 1 0

1 0 0

1 1 1
3. Not Gate ( Inverter): The NOT gate performs the basic
logical function called inversion or complementation. The
purpose of this gate is to convert one logic level into the
opposite logic level. It has one input and one output. When a
HIGH level is applied to an inverter, a LOW level appears at
the output and vice-versa.
4.NAND Gate: The output of a NAND gate is LOW only
when all inputs are HIGH and output of the NAND is HIGH
if one or more inputs are LOW.

A
Y
B
5. NOR Gate: The output of the NOR gate is HIGH only
when all the inputs are LOW.

A
Y
B
6.XOR Gate or Exclusive OR gate: In this gate output is
HIGH only when any one of the input is HIGH. The circuit is
also called as inequality comparator, because it produces
output when two inputs are different. When both the inputs
are high, then the output is low.

A
Y
B
7. XNOR Gate or Exclusive NOR Gate: An XNOR gate is
a gate with two or more inputs and one output. XNOR
operation is complimentary of XOR operation. i.e. The
output of XNOR gate is High, when all the inputs are
identical; otherwise it is low.

A
Y
B
Universal Logic Gate

NAND and NOR gates are called Universal gates or

Universal building blocks, because both can be used to
implement any gate like AND,OR an NOT gates or any
combination of these basic gates.
NAND gate as Universal gate
NOR gate as Universal gate:
De Morgan’s Theorems:

It is one of the important properties of Boolean algebra. It is

extensively useful in simplifying complex Boolean
expression.
Theorem 1: It states that “the compliments of product of two
variables equal to sum of the compliments of individual
variable”.

X⋅Y =X +Y
Theorem 2: It states that compliment of sum of two variables
is equal to product of compliment of two individual variables.

X +Y =X⋅Y

1. RealizeEXOR Gate using only minimum

NAND Gates
2. RealizeEXOR Gate using only NOR Gates
XNOR + NOR = XOR i.e. Add NOR gate to the
ouptut of XNOR gate. Here is the boolean
algebra for XOR gate:
3. RealizeEX-NOR Gate using only minimum
NOR Gates

4. RealizeEX-NOR Gate using only NAND

Gates
XOR + NAND Inverter(NOT) = XNOR i.e. Add
NOT Gate to the output of XOR gate as shown in
the image above. Here is the boolean algebra
for XNOR gate:
Canonical and Standard Form

Canonical Form –

In Boolean algebra,Boolean function can be expressed as

Canonical Disjunctive Normal Form known as minterm and
some are expressed as Canonical Conjunctive Normal Form
known as maxterm .
In Minterm, we look for the functions where the output
results in “1” while in Maxterm we look for function where
the output results in “0”.
We perform Sum of minterm also known as Sum of
products (SOP) .
We perform Product of Maxterm also known as Product of
sum (POS).
Boolean functions expressed as a sum of minterms or
product of maxterms are said to be in canonical form.

 Example – Express the Boolean function F = xy +

x’z as a product of maxterms
 Solution –
F = xy + x’z = (xy + x’)(xy + z) = (x + x’)(y + x’)(x
+ z)(y + z) = (x’ + y)(x + z)(y + z)
x’ + y = x’ + y + zz’ = (x’+ y + z)(x’ + y + z’)
x + z = x + z + yy’ = (x + y + z)(x + y’ + z)
y + z = y + z + xx’ = (x + y + z)(x’ + y + z)
F = (x + y + z)(x + y’ + z)(x’ + y + z)(x’ + y + z’)

Standard Form – A Boolean variable can be expressed in

either true form or complemented form. In standard form
Boolean function will contain all the variables in either true
form or complemented form while in canonical number of
variables depends on the output of SOP or POS.
A Boolean function can be expressed algebraically from a
given truth table by forming a :
 minterm for each combination of the variables that
produces a 1 in the function and then taking the OR of all
those terms.
 maxterm for each combination of the variables that
produces a 0 in the function and then taking the AND of
all those terms.
 Example – Convert Boolean expression in
standard form F=y’+xz’+xyz
 Solution – F = (x+x’)y'(z+z’)+x(y+y’)z’ +xyz
F = xy’z+ xy’z’+x’y’z+x’y’z’+ xyz’+xy’z’+xyz
Half Adder:

A combinational circuit which performs the arithmetic

addition of two binary digits is called Half Adder. In the half
adder circuit, there are two inputs, one is addend and augends
and two outputs are Sum and Carry.

Logic Expression :

Circuit Symbol of Half adder:

Full Adder: The full adder is a combinational circuit that
performs the arithmetic sum of three input bits.

• It consists of three inputs and two outputs. Two of the

inputs are variables, denoted by A and B, represent the
two significant bit to be added. The third input C in
 represents carry form the previous lower significant
position.
Truth Table for Full Adder

A Sum
B F u ll Ad d er
C ar r y
C in
Full adder Circuit using two Half adders:

Fig 5.4:Full adder Circuit using two Half adders

SIMPLIFICATION USING BOOLEANALGEBRA

A simplified Boolean expression uses the

fewest gates possible to implement a given
expression.

Example
Using Boolean algebra techniques,
simplify this
expression:

AB + A(B + C) + B(B +C)

Solution
Step 1: Apply the distributive law to the second
and third terms in the expression, as follows:
AB + AB + AC + BB +BC
Step 2: Apply rule 7 (BB = B) to the fourth
term.
AB + AB + AC + B +BC
Step 3: Apply rule 5 (AB + AB = AB) to the
first two terms.
AB + AC + B +BC
Step 4: Apply rule 10 (B + BC = B) to the last
two terms.
 AB + AC +B
Step 5: Apply rule 10 (AB + B = B) to the first and
third terms.
B+AC
At this point the expression is simplified as much
as possible.

Boolean Algebra Practice Problems

Solutions to the Boolean Algebra Practice Problems
•Draw a logic circuit for (A + B)C.

Soln:

•Draw a logic circuit for A + BC + D.

Soln:

•Draw a logic circuit for AB + AC.

Soln:
•Draw a logic circuit for (A + B)(C + D)C.

Soln:

2-variable k-map
There are 4 cells (22) in the 2-variable k-map. It will look like (see
below image)

The possible min terms with 2 variables (A and B) are A.B, A.B’,
A’.B and A’.B’. The conjunctions of the variables (A, B) and (A’, B)
are represented in the cells of the top row and (A, B’) and (A’, B’) in
cells of the bottom row. The following table shows the positions of
all the possible outputs of 2-variable Boolean function on a K-map.
A general representation of a 2 variable K-map plot is shown
below.

When we are simplifying a Boolean equation using Karnaugh map,

we represent the each cell of K-map containing the conjunction
term with 1. After that, we group the adjacent cells with possible
sizes as 2 or 4. In case of larger k-maps, we can group the variables
in larger sizes like 8 or 16.

The groups of variables should be in rectangular shape, that means

the groups must be formed by combining adjacent cells either
vertically or horizontally. Diagonal shaped or L-shaped groups are
not allowed. The following example demonstrates a K-map
simplification of a 2-variable Boolean equation.

Example

Simplify the given 2-variable Boolean equation by using K-map.

F = X Y’ + X’ Y + X’Y’

First, let’s construct the truth table for the given equation,
We put 1 at the output terms given in equation.

In this K-map, we can create 2 groups by following the rules for

grouping, one is by combining (X’, Y) and (X’, Y’) terms and the
other is by combining (X, Y’) and (X’, Y’) terms. Here the lower right
cell is used in both groups.

After grouping the variables, the next step is determining the

minimized expression.

By reducing each group, we obtain a conjunction of the minimized

expression such as by taking out the common terms from two
groups, i.e. X’ and Y’. So the reduced equation will be X’ +Y’.

3 variable K-maps

For a 3-variable Boolean function, there is a possibility of 8 output

min terms. The general representation of all the min terms using 3-
variables is shown below.

A typical plot of a 3-variable K-map is shown below. It can be

observed that the positions of columns 10 and 11 are interchanged
so that there is only change in one variable across adjacent cells.
This modification will allow in minimizing the logic.

Up to 8 cells can be grouped in case of a 3-variable K-map with

other possibilities being 1,2 and 4.

Example

Simplify the given 3-variable Boolean equation by using k-map.

F = X’ Y Z + X’ Y’ Z + X Y Z’ + X’ Y’ Z’ + X Y Z + X Y’ Z’

First, let’s construct the truth table for the given equation,

We put 1 at the output terms given in equation.

There are 8 cells (23) in the 3-variable k-map. It will look like (see
below image).

The largest group size will be 8 but we can also form the groups of
size 4 and size 2, by possibility. In the 3 variable Karnaugh map, we
consider the left most column of the k-map as the adjacent column
of rightmost column. So the size 4 group is formed as shown
below.
And in both the terms, we have ‘Y’ in common. So the group of size
4 is reduced as the conjunction Y. To consume every cell which has
1 in it, we group the rest of cells to form size 2 group, as shown
below.

The 2 size group has no common variables, so they are written

with their variables and its conjugates. So the reduced equation
will be X Z’ + Y’ + X’ Z. In this equation, no further minimization is
possible.
4 variable K-maps

There are 16 possible min terms in case of a 4-variable Boolean

function. The general representation of minterms using 4 variables
is shown below.
 A typical 4-variable K-map plot is shown below. It can be observed
that both the columns and rows of 10 and 11 are interchanged.

The possible number of cells that can be grouped together are 1, 2,

4, 8 and 16.

Example

Simplify the given 4-variable Boolean equation by using k-map. F

(W, X, Y, Z) = (1, 5, 12, 13)

Sol: F (W, X, Y, Z) = (1, 5, 12, 13)

By preparing k-map, we can minimize the given Boolean equation

as F = W Y’ Z + W ‘Y’ Z