Boolean Algebra

and Logic Gates

Boolean Algebra and Logic Gates
Acknowledgement
This slide show is intended for use in class, and is not a complete document.
Students need to refer to the book to read more lessons and exercises. Students
have the right to download and store lecture slides for reference purposes; Do not
redistribute or use for purposes outside of the course.

[1] Morris R. Mano (Author), Michael D. Ciletti, [2019] Digital Design: With an
Introduction to the Verilog HDL, chapter 2 - Boolean algebra and Logic
gates, 5th Edition.

📧 trantrungtin.tdtu.edu.vn
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Chapter Objectives

1. Boolean Algebra
2. Precedence of Operators
3. Truth Table
4. Duality
5. Basic Theorems
6. Complement of Functions
7. Standard Forms
8. Minterms and Maxterms
9. Canonical Forms
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Syllabus
2.1 Introduction 2.6 Canonical and Standard Forms

2.2 Basic Definitions 2.7 Other Logic Operations

2.3 Axiomatic Def. of Bool. Algebra 2.8 Digital Logic Gates

2.4 Basic Theorems and Properties 2.9 Integrated Circuits

of Boolean Algebra
2.10 Summary
2.5 Boolean Functions

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2.1 Introduction
● Analog circuit ● Digital circuit

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2.1 Digital Circuits
● Advantages of digital circuits over analog circuits
○ More reliable (simpler circuits, less noise-prone)
○ Specified accuracy (determinable)
○ Abstraction can be applied using simple mathematical model
– Boolean Algebra
○ Ease design, analysis and simplification of digital circuit –
Digital Logic Design

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2.2 Types Of Logic Blocks
● Combinational: no memory, output depends solely on
the input
○ Gates
○ Decoders, multiplexers
○ Adders, multipliers
● Sequential: with memory, output depends on both
input and current state
○ Counters, registers
○ Memories

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Boolean Algebra ■ Truth tables
A B A⋅B A B A+B A A'
0 0 0 0 0 0 0 1
● Boolean values: 0 1 0 0 1 1 1 0

○ True (1) 1 0 0 1 0 1

○ False (0)
1 1 1 1 1 1

● Connectives ■ Logic gates

○ Conjunction (AND)
■ A ⋅ B; A ∧ B
○ Disjunction (OR)
■ A + B; A ∨ B
○ Negation (NOT)
■ ; ¬A; A'

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And (∙)
● Do write the AND operator ∙ instead of omitting it.
○ Example: Write a∙b instead of ab
○ Why? Writing ab could mean it is a 2-bit value.

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Laws Of Boolean Algebra
● Identity laws
○ A+0=0+A=A; A⋅1=1⋅A=A
● Inverse/complement laws
○ A + A' = 1 ; A ⋅ A' = 0
● Commutative laws
○ A+B=B+A; A⋅B=B⋅A
● Associative laws
○ A + (B + C) = (A + B) + C ; A ⋅ (B ⋅ C) = (A ⋅ B) ⋅ C
● Distributive laws
○ A ⋅ (B + C) = (A ⋅ B) + (A ⋅ C) ; A + (B ⋅ C) = (A + B) ⋅ (A +
C) 10
Precedence Of Operators
● Precedence from highest to lowest
○ Not
○ And
○ Or
● Examples:
○ A ⋅ B + C = (A ⋅ B) + C
○ X + Y' = X + (Y')
○ P + Q' ⋅ R = P + ((Q') ⋅ R)
● Use parenthesis to overwrite precedence. Examples:
○ A ⋅ (B + C)
○ (P + Q)' ⋅ R 11
Truth Table x y z y+z x ⋅ (y + z)

● Provide a listing of every 0 0 0 0 0

possible combination of 0 0 1 1 0
inputs and its corresponding 0 1 0 1 0
outputs.
0 1 1 1 0
○ Inputs are usually listed in
binary sequence. 1 0 0 0 0
● Example
1 0 1 1 1
○ Truth table with 3 inputs and
2 outputs 1 1 0 1 1

1 1 1 1 1
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 Proof Using Truth Table
● Prove: x ⋅ (y + z) = (x ⋅ y) + (x ⋅ z)
○ Construct truth table for LHS and RHS

x y z y+z x ⋅ (y + z) x⋅y x⋅z (x ⋅ y) + (x ⋅ z)

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Check that column for LHS = column for RHS

◈ 13
Duality
● If the AND/OR operators and identity elements 0/1 in a Boolean
equation are interchanged, it remains valid
● Example:
○ The dual equation of a+(b⋅c)=(a+b)⋅(a+c) is a⋅(b+c)=(a⋅b)+(a⋅c)
● Duality gives free theorems – “two for the price of one”. You
prove one theorem and the other comes for free!
● Examples:
○ If (x+y+z)' = x'⋅y'⋅z' is valid, then its dual is also valid:
(x⋅y⋅z)' = x'+y'+z'
○ If x+1 = 1 is valid, then its dual is also valid:
x⋅0 = 0
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Basic Theorems (1/2)
● Idempotency
○ X+X=X; X⋅X=X
● Zero and One elements
○ X+1=1; X⋅0=0
● Involution
○ ( X' )' = X
● Absorption
○ X + X⋅Y = X ; X⋅(X + Y) = X
● Absorption (variant)
○ X + X'⋅Y = X + Y ; X⋅(X' + Y) = X⋅Y 15
Basic Theorems (2/2)
● DeMorgan’s
○ (X + Y)' = X' ⋅ Y' ; (X ⋅ Y)' = X' + Y'
● DeMorgan’s Theorem can be generalised to more
than two variables, example:
(A + B + … + Z)' = A' ⋅ B' ⋅ … ⋅ Z'
● Consensus
○ X⋅Y + X'⋅Z + Y⋅Z = X⋅Y + X'⋅Z
○ (X+Y)⋅(X'+Z)⋅(Y+Z) = (X+Y)⋅(X'+Z)

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Proving A Theorem
● Theorems can be proved using truth table, or by
algebraic manipulation using other theorems/laws.
● Example: Prove absorption theorem X + X⋅Y = X
X + X⋅Y = X⋅1 + X⋅Y (by identity)
= X⋅(1+Y) (by distributivity
= X⋅(Y+1) (by commutativity)
= X⋅1 (by one element)
= X (by identity)
● By duality, we have also proved X⋅(X+Y) = X
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 Boolean Functions
x y z F1 F2 F3 F4
● Examples of Boolean
0 0 0 0
functions (logic
equations): 0 0 1 0
F1(x,y,z) = x⋅y⋅z' 0 1 0 0
F2(x,y,z) = x + y'⋅z 0 1 1 0
F3(x,y,z) = x'⋅y'⋅z + x'⋅y⋅z + x⋅y' 1 0 0 0
F4(x,y,z) = x⋅y' + x'⋅z 1 0 1 0
1 1 0 1
1 1 1 0

◈ 18
 Complement
● Given a Boolean function F, the x y z F1 F1'
complement of F, denoted as F',
0 0 0 0
is obtained by interchanging 1
0 0 1 0
with 0 in the function’s output
values. 0 1 0 0
● Example: F1 = x⋅y⋅z' 0 1 1 0
● What is F1' ? 1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 0

◈ 19
Canonical and Standard Forms (1/2)
● Certain types of Boolean expressions lead to circuits that
are desirable from implementation viewpoint.
● Two standard forms:
○ Sum-of-Products
○ Product-of-Sums
● Literals
○ A Boolean variable on its own or in its complemented form
○ Examples: x, x', y, y'
● Product term
○ A single literal or a logical product (AND) of several literals
○ Examples: x, x⋅y⋅z', A'⋅B, A⋅B, d⋅g'⋅v⋅w
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Canonical and Standard Forms (2/2)
● Sum term
○ A single literal or a logical sum (OR) of several literals
○ Examples: x, x+y+z', A'+B, A+B, c+d+h'+j
● Sum-of-Products (SOP) expression
○ A product term or a logical sum (OR) of several product terms
○ Examples: x, x + y⋅z', x⋅y' + x'⋅y⋅z, A⋅B + A'⋅B',
A + B'⋅C + A⋅C' + C⋅D
● Product-of-Sums (POS) expression
○ A sum term or a logical product (AND) of several sum terms
○ Examples: x, x⋅(y+z'), (x+y')⋅(x'+y+z),
(A+B)⋅(A'+B'), (A+B+C)⋅D'⋅(B'+D+E')
● Every Boolean expression can be expressed in SOP or POS. 21
 Do It Yourself
● Put the right ticks in the following table.

Expression SOP? POS?

X'∙Y + X∙Y' + X∙Y∙Z
(X+Y')∙(X'+Y)∙(X'+Z')
X' + Y + Z
X∙(W' + Y∙Z)
X∙Y∙Z'
W∙X'∙Y + V∙(X∙Z + W')
◈ 22
Minterms & Maxterms (1/2)
● A minterm of n variables is a product term that
contains n literals from all the variables.
○ Example: On 2 variables x and y, the minterms are:
○ x'∙y', x'∙y, x∙y' and x∙y
● A maxterm of n variables is a sum term that contains n
literals from all the variables.
○ Example: On 2 variables x and y, the maxterms are:
○ x'+y', x'+y, x+y' and x+y
● In general, with n variables we have 2n minterms and
2n maxterms.
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Minterms & Maxterms (2/2)
● The minterms and maxterms on 2 variables are denoted by m0 to m3 and
M0 to M3 respectively.
Minterms Maxterms
x y
Term Notation Term Notation
0 0 x'∙y' m0 x+y M0
0 1 x'∙y m1 x+y' M1
1 0 x∙y' m2 x'+y M2
1 1 x∙y m3 x'+y' M3
■ Each minterm is the complement of the corresponding
maxterm
❑ Example: m2 = x∙y'
m2' = ( x∙y' )' = x' + ( y' )' = x' + y = M2 24
Canonical Forms
● Canonical/normal form: a unique form of
representation.
○ Sum-of-minterms = Canonical sum-of-products
○ Product-of-maxterms = Canonical product-of-sums

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 Sum-Of-Minterms
● Given a truth table, x y z F1 F2 F3
example: 0 0 0 0 0 0
● Obtain sum-of-minterms 0 0 1 0 1 1
expression by gathering the 0 1 0 0 0 0
minterms of the function 0 1 1 0 0 1
(where output is 1). 1 0 0 0 1 1
1 0 1 0 1 1
F1 = x∙y∙z' = m6 1 1 0 1 1 0
F2 = 1 1 1 0 1 0

◈ F3 = 26
 Product-Of-Maxterms
● Given a truth table, example: x y z F1 F2 F3
● Obtain product-of-maxterms
0 0 0 0 0 0
expression by gathering the
maxterms of the function 0 0 1 0 1 1
(where output is 0). 0 1 0 0 0 0
0 1 1 0 0 1
F1= 1 0 0 0 1 1
F2 = (x+y+z) ∙ (x+y'+z) ∙ (x+y'+z')
1 0 1 0 1 1
= M0 ∙ M2 ∙ M3 = ΠM(0,2,3)
F3 = 1 1 0 1 1 0
1 1 1 0 1 0

◈ 27
Conversion
● We can convert between sum-of-minterms x y z F2 F2'
and product-of-maxterms easily
0 0 0 0 1
● Example: F2 = Σm(1,4,5,6,7) = ΠM(0,2,3)
● Why? See F2' in truth table. 0 0 1 1 0
0 1 0 0 1
■ F2' = m0 + m2 + m3 0 1 1 0 1
Therefore, 1 0 0 1 0
F2 = (m0 + m2 + m3)' 1 0 1 1 0
= m0' ∙ m2' ∙ m3' (by DeMorgan’s)
= M0 ∙ M2 ∙ M3 (mx' =Mx) 1 1 0 1 0
1 1 1 1 0

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2.7 Other Logic Operations
● 2n rows in the truth table of n binary variables.
n
● 22 functions for n binary variables.
● 16 functions of two binary variables.

● All the new symbols except for the exclusive-OR symbol are not in
common use by digital designers.
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Boolean Expressions

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2.8 Digital Logic Gates
● Boolean expression: AND, OR and NOT operations
● Constructing gates of other logic operations
○ The feasibility and economy;
○ The possibility of extending gate's inputs;
○ The basic properties of the binary operations (commutative and
associative);
○ The ability of the gate to implement Boolean functions.

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Standard Gates
● Consider the 16 functions in Table 2.8 (slide 33)
○ Two are equal to a constant (F0 and F15).
○ Four are repeated twice (F4, F5, F10 and F11).
○ Inhibition (F2) and implication (F13) are not commutative or
associative.
○ The other eight: complement (F12), transfer (F3), AND (F1), OR
(F7), NAND (F14), NOR (F8), XOR (F6), and equivalence (XNOR) (F9)
are used as standard gates.
○ Complement: inverter.
○ Transfer: buffer (increasing drive strength).
○ Equivalence: XNOR.
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Summary of Logic Gates

Figure 2.5 Digital logic gates 33

Summary of Logic Gates

Figure 2.5 Digital logic gates 34

Multiple Inputs
● Extension to multiple inputs
○ A gate can be extended to multiple inputs.
■ If its binary operation is commutative and associative.
○ AND and OR are commutative and associative.
■ OR
● x+y = y+x
● (x+y)+z = x+(y+z) = x+y+z
■ AND
● xy = yx
● (x y)z = x(y z) = x y z

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Multiple Inputs
○ NAND and NOR are commutative but not associative → they are not extendable.

Figure 2.6 Demonstrating the nonassociativity of the NOR operator;

(x ↓ y) ↓ z ≠ x ↓(y ↓ z) 36
Multiple Inputs
○ Multiple NOR = a complement of OR gate, Multiple NAND = a complement of AND.
○ The cascaded NAND operations = sum of products.
○ The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascated NOR and NAND gates 37

Multiple Inputs
○ The XOR and XNOR gates are commutative and associative.
○ Multiple-input XOR gates are uncommon?
○ XOR is an odd function: it is equal to 1 if the inputs variables have an odd number of 1's.

Figure 2.8 3-input XOR gate 38

Positive and Negative Logic
● Positive and Negative Logic
○ Two signal values <=> two logic values
○ Positive logic: H=1; L=0
○ Negative logic: H=0; L=1
● Consider a TTL gate
○ A positive logic AND gate
○ A negative logic OR gate
○ The positive logic is used in this book

Figure 2.9 Signal assignment and logic polarity 39

Positive and Negative Logic

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Figure 2.10 Demonstration of positive and negative logic
2.9 Integrated Circuits
● Level of Integration
● An IC (a chip)
● Examples:
○ Small-scale Integration (SSI): < 10 gates
○ Medium-scale Integration (MSI): 10 ~ 100 gates
○ Large-scale Integration (LSI): 100 ~ xk gates
○ Very Large-scale Integration (VLSI): > xk gates
● VLSI
○ Small size (compact size)
○ Low cost
○ Low power consumption
○ High reliability
○ High speed

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Digital Logic Families
● Digital logic families: circuit technology
○ TTL: transistor-transistor logic (dying?)
○ ECL: emitter-coupled logic (high speed, high power consumption)
○ MOS: metal-oxide semiconductor (NMOS, high density)
○ CMOS: complementary MOS (low power)
○ BiCMOS: high speed, high density

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Digital Logic Families
● The characteristics of digital logic families
○ Fan-out: the number of standard loads that the output of a typical gate can
drive.
○ Power dissipation.
○ Propagation delay: the average transition delay time for the signal to
propagate from input to output.
○ Noise margin: the minimum of external noise voltage that caused an
undesirable change in the circuit output.

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CAD
● CAD – Computer-Aided Design
○ Millions of transistors
○ Computer-based representation and aid
○ Automatic the design process
○ Design entry
■ Schematic capture
■ HDL – Hardware Description Language
● Verilog, VHDL
○ Simulation
○ Physical realization
■ ASIC, FPGA, PLD

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Chip Design
● Why is it better to have more gates on a single chip?
○ Easier to build systems
○ Lower power consumption
○ Higher clock frequencies

● What are the drawbacks of large circuits?

○ Complex to design
○ Chips have design constraints
○ Hard to test

● Need tools to help develop integrated circuits

○ Computer Aided Design (CAD) tools
○ Automate tedious steps of design process
○ Hardware description language (HDL) describe circuits
○ VHDL (see the lab) is one such system

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