IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

Optimal Design of a Dual Active Bridge DC-DC

Converter
Dibakar Das, Student Member, IEEE and Kaushik Basu, Member, IEEE
Abstract—This paper presents a systematic design pro- power flow capability, soft switching leading to high efficiency
cedure for a Dual active bridge (DAB) DC-DC converter. and power density [1]. These converters are used in several
Design of a DAB converter involves determination of two applications such as DC microgrids, battery chargers, solid
key parameters i.e. transformer turns ratio and the series
inductance value. Existing literature addresses this prob- state transformers, etc.
lem through numerical optimization which is computation In dual active bridge topology, two H-bridge converters
intensive and does not provide much insight. In general apply square waveforms to transformer primary and secondary
loss is minimized by applying equal weightage to all op- windings in series with an inductor. A phase shift is intro-
erating conditions, which may not be practical. Given an duced between the waveforms for power transfer, [2]. This
operating power range, terminal voltage range and switch-
ing frequency, this paper presents a way to optimally se- modulation strategy is known as single phase shift strategy
lect the design variables through analytical solution of a (SPS) in literature. Later, it was found that introducing duty
constrained optimization problem. Analysis is carried out modulation in primary and secondary voltages can lead to
in time domain and optimal triple phase shift modulation several advantages, [3]. This three degree of freedom in
strategy is considered that ensures minimum inductor rms modulation (two duty cycles and phase shift) is known as
current and soft switching. The choice of the design pa-
rameters results in minimization of the worst-case inductor triple phase shift (TPS) strategy in literature, [3]. The TPS
rms current over the entire operating range of the converter strategy is considered in this paper.
which leads to both efficiency and size optimization. A Several methods exist in literature which address the op-
procedure for selection of devices and filter capacitors timal modulation problem based on minimization of a given
and design of magnetics is given. A 2.6kW experimental objective function. In such problems, for a specified operating
prototype is designed to validate the theoretical analysis.
condition (power, voltage, switching frequency) and a given
design (transformer turns ratio, series inductance value), the
Index Terms—Dual active bridge, RMS current minimiza- objective is to determine the TPS modulation parameters
tion, TPS modulation, Soft switching, Optimal design
which will minimize power loss. For loss minimization, one
popular approach is using fundamental approximation [4]–
N OMENCLATURE [7] of the voltage and current waveform and minimize the
V1 Voltage of the controlled port. circulating [4], [5] or reactive component [6], [7] of the
V2 Voltage of the uncontrolled port. inductor current. Although this approach leads to a simpler
iL Instantaneous inductor current. analysis, the approximations may not be valid over a wide
Irms Actual value of inductor rms current. operating range of the converter. A more general method that
irms Scaled value of inductor rms current. results in accurate prediction over a wide range of operation is
P Average power transferred between the DC ports. to use time-domain expressions for power and inductor current
p Scaled value of average transferred power. [3], [8]–[10].
fs Switching frequency of the converter. Considering time domain analysis, the objective function
n Turns ratio of the transformer. for minimization may be inductor rms current [8]–[10], peak
L Total series inductance of the DAB converter. current [11]–[15], soft switching [3], [16] or total loss [17]–
d1 Duty cycle of primary voltage waveform. [19]. Out of the above alternatives for the objective function,
d2 Duty cycle of secondary voltage waveform. the rms of the inductor current with soft switching is a suitable
δ Phase shift between primary and secondary volt- candidate for optimization because it represents the conduction
age waveforms. losses in the devices and the magnetic components which
m Voltage conversion ratio. form a major fraction of the total loss of the converter, [8].
Moreover, reducing the rms of inductor current also implies
reduction of peak currents and capacitor ripple current ratings.
I. I NTRODUCTION
Several approaches for minimization of rms currents

D UAL Active Bridge (DAB) converters are a desirable

choice in DC-DC power conversion since they have sev-
eral beneficial features such as galvanic isolation, bidirectional
through time domain exact analysis can be found in literature.
A numerical approach for choosing optimal TPS parameters
can be found in [8]. The proposed strategy has three regions of
operation based on the power output of the converter. A more
Manuscript received May 29, 2020; revised November 10, 2020;
accepted November 26, 2020. The authors are with the Department of formal treatment of the rms current minimization problem
Electrical engineering, Indian Institute of Science, Bangalore, 560012, and an analytical solution can be found in [10]. Though soft
India (e-mail: [email protected], [email protected]). This work was switching is not included in the problem formulation, it is
supported by the Indian Space Research Organisation, Government
of India under the project titled “Development of AC power system for shown that the results satisfy the soft switching constraints.
satellite applications”. In a typical DC-DC converter, the voltage at one port is
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tightly regulated despite variations in the other port voltage. provided for selection of the inductance value which reduces
The design specifications include voltage at the regulated port, the computation effort. The solution thus obtained provides
the range of unregulated port voltage, range of operating optimal values of the design variables (transformer turns ratio
power and the switching frequency, [20]–[22]. Design of DAB and inductance value). The proposed solution results in the
DC-DC converter involves determining the turns ratio of the maximum rms current (at maximum power) to remain close
transformer and the series inductance [19], [23], [24]. Based to its minimum value despite variations of voltage at the
on the worst-case stresses on the components, the design of uncontrolled port. The optimal TPS strategy can be applied to
magnetic components and selection of switches and capacitors the optimal design to obtain minimum rms currents and soft
can then be carried out. switching over the entire operating range of the converter. The
In [23], the transformer turns ratio is chosen to obtain volt- key steps in selecting the power devices, filter capacitors and
age conversion ratio of unity at maximum value of unregulated design of magnetics is also presented.
voltage while applying SPS strategy for power transfer. The The rest of the paper is organized as follows. Section II
inductance value is chosen to provide good controllability. describes the design problem and modelling of the converter
This method is simple and widely used but it does not attempt for various zones of operation. An optimization problem is
to minimize rms inductor current or losses. In [24], a numerical formulated for rms current minimization. A systematic proce-
design approach is adopted for selection of optimal trans- dure is discussed for the choice of design parameters. Section
former turns ratio and inductance value for minimization of III demonstrates the experimental results with the proposed
rms inductor current averaged over several operating voltages design strategy. Section IV concludes the paper.
at fixed power. Same method is used to minimize peak inductor
current or total power loss which provide separate deign II. A NALYSIS & O PTIMAL D ESIGN
parameter values. SPS strategy is considered for the analysis. Consider the dual active bridge DC-DC converter trans-
It is well known in DAB literature [3], [8] that SPS results ferring power P between DC voltage sources V1 and V2
in large rms currents and loss of ZVS for wide variation of and switching at frequency fs shown in Fig.1. The two H-
voltage and power. In [19], a numerical approach similar to bridge converters convert the DC voltages V1 and V2 to duty
[24] is taken but TPS with ZVS is considered and average modulated square waveforms vab and vcd respectively. These
efficiency is used as an objective function. Search is carried waveforms are then applied to a transformer connected in se-
over a range of operating points resulting due to variations in ries with an inductor. The switches of the H-bridge converters
unregulated port voltage and power. are considered ideal and the effect of transformer magnetising
Total loss or efficiency as an objective function is com- inductance is neglected in the analysis. The inductor L in Fig.1
plex and requires knowledge of device and magnetics related is the transformer leakage inductance along-with the external
parameters which are usually not known before the basic inductance. The converter can thus be equivalently replaced by
design is completed. In numerical search technique [19], [24], two voltage sources and an inductor L as shown in Fig.2a. The
the search space is divided into discrete points and objective power transfer between DC ports is carried out by introducing
function is evaluated at each point to identify the optimum. a phase shift between vab and vcd .
This process is computation extensive, requires programming A DAB converter can be modulated with three degrees of
effort and does not provide much insight. Applying equal freedom (DOF). The primary and secondary voltage wave-
weightage to each operating point may not be practical. forms can be duty modulated. The pulse widths are decided
This paper presents a novel analytical design procedure for by d1 Ts /2 and d2 Ts /2 for primary and secondary voltages
a DAB DC-DC converter. The design specifications are the
regulated port voltage, range of unregulated voltage, operating
power range and switching frequency. Optimal TPS strategy
is considered for the analysis which results in minimum rms
current while ensuring soft switching. For accurate results, the
minimization problem is formulated considering time domain
analysis. Though it may seem obvious, it is established that
maximum rms current with optimal TPS strategy flows at
maximum power. This conclusion is independent of the choice Fig. 1: A Dual active bridge DC-DC converter
of design parameters and the variation of voltage at the
unregulated port. Minimization of the maximum rms current
experienced by the converter over the operating range leads
to optimal sizing of devices, filter capacitors and magnetics.
A constrained optimization problem to minimize worst case
inductor rms current is formulated and then solved analytically.
The first order necessary conditions are applied on objective
function to obtain algebraic equations for optimal variables.
Since a closed form expression does not exist for one of 0

the equations, a numerical root finding technique is used Fig. 2: (a) Equivalent Circuit of DAB, (b) Typical vab , vcd and
to find the optimal value. A polynomial curve-fit is then iL waveforms with 3-DOF control
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respectively as shown in Fig.2b. The time-shift δTs /4 is

provided for power transfer where Ts = 1/fs . It can be
seen from Fig.2b that the duty cycles d1 , d2 ∈ [0, 1]. The
phase shift ranges between − T4s and T4s which corresponds to
δ ∈ [−1, 1]. δ > 0 results in power transfer from V1 to V2 .

A. Problem Description
Consider a DAB converter with the following specifications:
Port 1 Voltage: V1 , Switching Frequency: fs
Port 2 Voltage: V2min ≤ V2 ≤ V2max
Power Rating: Pmin ≤ P ≤ Pmax
The problem above represents a scenario where one of the
DC voltages (V1 ) is tightly regulated despite variations of
V2 . The converter load also may vary between two known
limits. Converter design involves determination of transformer
turns ratio, n and value of series inductance L. After the
design, the operation problem involves finding the modulation
strategy (d1 , d2 and δ) for a given P and V2 . The specifications
of inductor, transformer, switches and capacitor can then be
determined based on worst-case operating conditions. The
converter design should be carried out such that the maximum
value of inductor rms current, Irms is minimized over the
entire operating range (considering variations in P and V2 ) of
the converter. Moreover, zero voltage switching (ZVS) should Fig. 3: DAB operating zones for d1 , d2 , δ ∈ [0, 1]
be ensured for the entire operating region of the converter.
Fulfilling these design objectives results in improved size and proportionality factor that is a function of m, d1 , d2 and δ.
efficiency of the converter. The subsequent section discusses The average power over a switching cycle can be written as,
the converter model in steady state which is used for solving
the optimization problem. V12
P = × p(m, d1 , d2 , δ) (4)
2πfs L

B. Converter Modelling The values of irms , p and the ZVS constraints are determined
The voltage conversion ratio is defined below where n1 and for various m, d1 , d2 and δ in the subsequent sections.
n2 are the number of turns in the transformer windings. 1) Converter operating zones: The range of values that d1 ,
d2 and δ can assume is between zero and one. So, each feasible
n1 V 2 nV2 point (d1 , d2 , δ) belongs to a unit cube. This unit cube can be
m= = (1)
n2 V 1 V1 divided in five different operating zones where the expressions
For a given n and the variation of V2 described above, m varies for p and irms are different because the inductor voltage
between mmin := nV2min /V1 and mmax := nV2max /V1 . has different pattern [3]. The different constraints in terms
0
With the defined conversion ratio, the voltage levels in vcd := of operating variables [d1 , d2 , δ] for each zone is depicted in
nvcd are ±mV1 and zero. Note that the voltage levels in vab Fig.3(a)-(e). Considering the transformation θ = 2πfs t to (2)
are ±V1 and zero. The inductor current can be described by, described before, the dynamics in i can be described by the
following equation,
diL
L = vab − nvcd (2) di
dt = vL (θ) (5)
Since the primary and secondary pulse widths are proportional
dθ
to Ts , the inductor
 current magnitude is proportional to V1LTs 0
where vL (θ) := (vab − vcd )/V1 is the scaled inductor voltage.
V1 For operation of the converter in zone V, the values of vL
or 2πf sL
. Scaling the time axis with θ = 2πfs t, the
inductor current at any time instant can be written as a product and i(θ) at different time instants are indicated in Fig.3f.
V1
of 2πf and a proportionality factor i(m, d1 , d2 , δ, θ). The Considering the value of i at θ = 0 as i0 , the value of i1
sL
actual rms current Irms can then be written as, can be determined from (5)
s
Z 2π
V1 1 V1 i1 = i0 + mθ1 (6)
Irms = i2 dθ = irms (m, d1 , d2 , δ) (3)
2πfs L 2π 0 2πfs L The values i2 -i5 can be similarly determined using (5). The
Instantaneous power is the product of vab and the inductor inductor voltage vL has half wave symmetry. Thus, i at steady
V2
current and hence will be proportional to 2πf1s L with a state will be free from DC offsets and will have half wave
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TABLE I: ZVS Constraints for different Operating Zones

Zone I (d1 − d2 m) > 0 (δ − d2 + d2 m) > 0 (d2 + δ − d2 m) < 0
Zone II (d1 − d2 m) < 0 (d1 m − d1 + mδ) < 0 (d1 − d1 m + mδ) > 0
Zone III (d1 − d2 m) > 0 (d2 m − d2 + δ) > 0 (d1 − d1 m + mδ) > 0 (d1 − d2 m) < 0
Zone IV (d1 − d2 m) > 0 (d1 + d2 m) > 0 (d1 − d2 m) < 0
Zone V (d1 − 2m + mδ + md1 ) > 0 (d2 + δ + md2 − 2) > 0 (δ − d2 + d2 m) > 0 (d1 − d1 m + mδ) > 0

means (d1 − 2m + mδ + md1 ) > 0. Evaluation of the current

polarity condition for the remaining switching transitions leads
to three more inequality constraints in m, d1 , d2 and δ. A
similar analysis can be carried out for zones I-IV. The set of
inequality constraints are summarised in Table I.
From Table I, it can be concluded that ZVS conditions
can be simultaneously satisfied in zones I, II and V only.
Fig. 4: Capacitor assisted soft switching All the transitions are not zero voltage switched in zones
III and IV. Inequalities which cannot be satisfied simultane-
ously in zone III and IV are highlighted in Table I. Using
symmetry. This implies i0 = −i5 . The values i0 -i5 can now the rms current expression in (3) and the current values
be determined as functions of m, d1 , d2 and δ. from (7), the expression for irms is obtained in (9). Inte-
π grating the vab iL product over half line cycle, the power
i0 = (m − d1 − mδ) 1
pzV = 2π [(i1 +i2 )(θ2 -θ1 )+(i2 +i3 )(θ3 -θ2 )+(i3 +i4 )(θ4 -θ3 )]. Us-
2
π ing the current expressions from (7) and time instants from
i1 = (2m − md1 − d1 − mδ)
2 Fig.3f, the scaled power is obtained in (8). The values of p
π and irms can be similarly evaluated for zones I and II. The
i2 = (δ + d2 + md2 − 2)
2 (7) expressions are indicated in (8) and (9).
π
i3 = (δ − d2 + md2 )
2
π C. Optimal Modulation Strategy
i4 = (d1 − md1 + mδ)
2 In general, the inductor rms current is a function of n, L,
−π
i5 = (m − d1 − mδ) V1 , V2 , P , d1 , d2 and δ. In the design problem, V1 and fs
2 are fixed which from now onwards will be treated as known
The scaled inductor current waveform i is determined for
constants. V2 and P change over a range. Since n and V2 (both
zone V. Similar analysis can be carried out for zone I-IV.
2) Conditions for soft switching: Consider that the con-
unknown at this  appear to impact on Irms and P as a
 point)
nV2
product m = V1 , their variation can be represented as m.
verter is operating in zone V and undergoing the switching
transition at θ = θ1 as shown in Fig.3f. At this instant, The objective of design is to find n and L so that maximum
switch S2 is turning off and switch S1 is turned on after rms current over a variation of V2 and P is minimized. As a
dead-time. This situation is depicted in Fig.4. Assume that first step, we need to determine Irms as a function of m, P
the current i1 at θ1 is less than zero. This implies that switch and L. For one such given operating point (V2 and P ) and
S2 was conducting prior to its turn-off and thus vC2 = 0 given n and L or in other words for a given P , m and L, it is
(Fig.4a). On removing gate pulse for S2 , the inductor current possible to find d1 , d2 and δ so that Irms is minimized. This
quickly shifts to the capacitors C2 and C1 , charging and optimization problem where (3) is the objective function with
discharging them respectively (Fig.4b). The channel current (4) and ZVS conditions as the constraints is solved in [10].
quickly reduces before voltage vC2 increases and hence it The solution is known as optimal modulation strategy. Using
reduces turn-off loss of S2 . Once the voltage vC1 reduces (3) and (4) the problem can written as,
to zero, the diode D1 starts to conduct (Fig.4c). Turning on min irms |m (d1 , d2 , δ)
the switch after this instant will lead to ZVS turn on of S1 . 0≤d1 ,d2 ,δ≤1, ZVS
(10)
p=P ×(2πfs L)/V12 =
Thus i1 should be less than zero for soft switching which p|m (d1 ,d2 ,δ)

pzV = 0.25mπ 1 − (1 − d1 )2 − (1 − d2 )2 − (1 − δ)2

pzI = 0.5mπδd2 pzII = 0.5mπδd1 (8)

π2

i2rms,zI −2d1 3 + 3d1 2 d2 m + 3d1 2 − 6d1 d2 m − 2d2 3 m2 + d2 3 m + 3d2 2 m2 + 3d2 δ 2 m 


= 
12 


π 2 


i2rms,zII 3 3 2 2 2 3 2 2 2 
= d1 m − 2d1 + 3d1 + 3d1 d2 m − 6d1 d2 m + 3d1 δ m − 2d2 m + 3d2 m 
12 (9)
π2


i2rms,zV −2d1 3 − 3d1 2 δm + 3d1 2 m + 3d1 2 + 6d1 δm − 6d1 m − 2d2 3 m2 − 3d2 2 δm+ 

= 
12




2 2 2 3 2


3d2 m + 3d2 m + 6d2 δm − 6d2 m − δ m + 3δ m − 6δm + 4m

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TABLE II: Boundary power levels [10] minimized for P = Pmax . Substituting L (using P = Pmax
pc1 pc2 in (4)) in (3) we obtain (11)
 
πm2 (1−m) (1−m2 )π
 
m≤1 −1 + √ 1 2 irms (m, d1 , d2 , δ) Pmax irms Pmax
2 2m
√
(1−m ) Irms = = × (11)
m>1
π(m−1) mπ

1 − m2 + m m2 − 1

p(m, d1 , d2 , δ) V1 p V1
2m 2
As Pmax /V1 is constant and known a priori from specifica-
TABLE III: Optimum modulation parameters [10] tions, minimization of Irms is equivalent to minimization of
 
irms
p ∈ [0, pc1 )
q
p ∈ [pc1 , pc2 ) the ratio p . Operation of the converter in zones I, II and
2p
πd1 (1 − δ) = πm 2d1 − d21 − 2p


d1 = (1−m)π V are considered since ZVS constraints can be only satisfied
m≤1 d1 = md2 d =1 in these zones. For solving the multidimensional optimization
q2
δ = (1 − m)d2 δ = 1 − 2d1 − d21 − 4p problem m is fixed as a parameter and the optimal d∗1 , d∗2 and
mπ

∗ irms
d1 = md2 d1 = 1 δ are determined which leads to minimum p for that
q
m>1 d2 = 2p
πd2 (1 − δ) = mπ
2d2 − d22 −

2p particular m. We obtain the following optimization problem
πm(m−1) m2
q
4p with unknown variables m, d1 , d2 and δ.
δ = (m − 1)d2 δ = 1 − 2d2 − d22 − mπ  
irms
Note that p|m (d1 , d2 , δ) implies p is a function of all four min (d1 , d2 , δ) (12)
d1 ,d2 ,δ∈[0,1] p m>0
variables but m is treated as a constant. The solution depends ZVS
on both m and p. For any given m, p must be smaller than mπ 4
for solution of (10) to exist. Solution of the problem leads to E. Solution for a given m
three regions of operation [10]. For operating powers p upto Minimization of (12) is carried out by fixing m as a
pc1 (indicated in Table II, next page), the converter operates parameter and analytically solving the problem through KKT
in zone I (zone II) for m > 1 (m < 1) with the modu- conditions. The ZVS conditions are met only in zone I, II
lation parameters listed in Table III. For p ∈ [pc1 , pc2 ], the and V which form mutually exclusive subsets of the unit
modulation parameters are obtained by solving simultaneous cube. The optimization problem is solved in zones I, II and
equations in d1 and δ for m ≤ 1 and in d2 and δ for m > 1. V separately and the minima among these three zones is
These equations are indicated in second column of Table III. identified. For the converter operating in zone V, the objective
Beyond power levels of pc2 , the converter operates with the 
irms,zV
function to be minimized is pzV . The expression for
conventional phase shift strategy (d1 = 1, d2 = 1). The value
q
4p pzV and irms,zV is given in (8) and (9) respectively. The
of δ is given by δ = 1 − 1 − mπ .
The optimal value of irms for various m ∈ [0.5, 2] and 2.5
p ∈ [0, mπ/4] is shown in Fig.5. It can be seen that for any
fixed m (which means fixed nV2 ) and any arbitrary choice of L 2
(provided pmax ≤ mπ/4 is ensured), the value of irms (hence
Irms ) monotonically increases as p (or P ) is increased. Thus 1.5
Irms is maximum when P = Pmax . It is now established that
once m and L are fixed, the maximum value of rms current 1
always occurs at Pmax . 0.5 1 1.5 2
1
D. Design Problem Formulation 0.75
At this point we restate the design problem: (a) V1 and fs 0.5
are known and fixed quantities, (b) n and V2 appears as a 0.25
product in (3) and (4) which is represented by m, (c) m and
0
L needs to be determined so that rms inductor current Irms is 0.5 1 1.5 2

Fig. 6: (a) Variation of optimum Irms with m (b) Optimum

operating point (d∗1 , d∗2 , δ ∗ )
2

1.5

0.5

0
0.5 1 1.5 2

Fig. 5: Optimum value of irms for various m and p Fig. 7: Optimum L∗ (or p∗ ) as a function of m
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2
1 + m2 d∗6 2
m2 + 1 d∗5 2
4m2 + 1 d∗4 2
5m2 + 1 d∗3 4 ∗2 6




1 − 6m 1 + 3m 1 − 2m 1 + 6m d1 − m = 0 (13a)
2 2 1 2
d∗7 4 2
d∗6 2
d∗5 2
d∗4 2
d∗3 12d∗2 − 2 d∗2 + 2 = 0






1+m 2 − 2m + 10m + 8 2 + 15m + 24 2 − 8m + 34 2 + 4m + 26 2 − 2 (14a)
m m
s
d∗1 d∗2 d∗2 q
δ∗ = 1 − d∗2 ∗ 1 δ∗ = 1 − + d∗2 ∗ 2 ∗2
2 − 2d2 + m d2 (14b)
+ 1 − 2d1 + (13b)
m
m m2

inequality constraints are given in the last row of Table I. we obtain a set of curves with Irms as a function of m with
Similar process is followed  for zone I and II. The global m∗ as a parameter (cf. Fig.8). Note that for a given plot with
optimum value of irms
is found to be in zone V for all particular m∗ , the rms current will be minimum when m =
p
m > 0. For m ∈ [0, 1], d∗2 = 1 and the value of d∗1 can be m∗ . This minimum current in Fig.8 (black dotted points) for
obtained by solution of equation (13a) in the range [0, 1]. δ ∗ a given m∗ is same as the optimal rms current Irms ∗
(m∗ ) in
∗
can be obtained from (13b). For m > 1, d∗1 = 1 and the value Fig.6a when m = m .
of d∗2 is obtained by determining the root of (14a) in the range From the plots in Fig.8, it is possible to see that rms
[0, 1]. δ ∗ can be current rises faster with change in m for m < m∗ when
∗obtained from (14b). The optimum value of compared with m > m∗ . Thus, the range of m in which we
irms ∗ V1
the ratio = Irms × Pmax is obtained for any given m
p should operate must always be greater than m∗ which implies
by evaluating the ratio (irms /p) at d∗1 (m), d∗2 (m) and δ ∗ (m). m∗ = mmin . For any given m∗ , the rms current rises for
This value is shown in Fig.6a (blue) for m ∈ [0.5, 2]. For m > m∗ . From Fig.8, it can be observed that the rate of this
validating the analytical solution, the optimization problem in current increase reduces with increasing m∗ . This implies that
(12) is solved numerically through fmincon package of MAT- a higher value of m∗ should be chosen during design. With
LAB. The optimal rms current has close agreement with the given converter specifications, the value of γ := m max V2max
mmin = V2min
analytical result (Fig.6a). The optimum modulation parameters is known a priori. The ratio∗ of rms currents at mmax =γm∗ and
are shown in Fig.6b. The values of d∗1 , d∗2 and δ ∗ for a given mmin , i.e IIrms (mmax =γm )
, for variation of m∗ is indicated
∗
rms (m =mmin )
m can be substituted in the zone V power expression, (8) to in Fig.9 (for different γ). For a given value of γ, and a
L∗ (m)
obtain the value of p∗ (m)=p(m, d∗1 , d∗2 , δ ∗ )= 2πfs Pmax
V12
. permissible limit on the variation of rms current, this curve
This process is repeated for other m and the result obtained can be used to determine m∗ . For example with γ=1.3, if we
is shown in Fig.7 (blue curve). Some important observations want the variation of rms current with respect to its minimum
can be made from the solution. value to be less than 10%, then minimum m∗ =1.3. A higher
• The global optimum of the problem occurs at m = 1. At value of m∗ (> 1.3) is not desirable since it leads to increase
this point d∗1 = 1, d∗2 = 1 and δ ∗ = 0. This means p∗ = 0 of the value of the required L∗ (cf. Fig.7). Once mmin = m∗
(or L∗ = 0) and i∗rms = 0. However, their ratio converges is fixed, the turns ratio is evaluated, n = m∗ V1 /V2min . From
V2
to unity. Operation at the global optimum point is thus subsection II-E, L = L∗ (m∗ ) = p∗ (m∗ ) × 2πfs P1 max . For
not possible. determining L∗ , p∗ (m) should be known which is given in
∗ V
• As m is increased beyond 1, the value of Irms × P 1 Fig.7. A polynomial function is fitted on Fig.7 to determine
max
slowly increases from its global optimum of 1 and then p∗ (m) once m is fixed.
stays almost constant at 1.1.
• For m < 1, the rms current increases rapidly as m
p∗ (m) = −1.9m4 + 12.6m3 − 30.9m2 + 34.3m − 14.07 (15)
reduces from unity. This value crosses 1.1 at m = 0.95. For operation of the converter at points different than
Thus, for achieving rms current less than or equal to 1.1 (Pmax , V2min ), the modulation strategy described in section
for an m < 1, m must be greater than 0.95. II-C is used [10]. The design steps are indicated as a flowchart
Fig.7 shows plot of p∗ (m) and the maximum power ( mπ 4 )
in Fig.10. For a designed n and L, the per unit power varies
which can be transferred for a given m. Close to m = 1, between pmin and pmax and m varies between mmin and
p∗ (m)  mπ 4 which implies poor controllability. For example
mmax . Thus, any operating point lies in a rectangle on m − p
at m = 0.95, p∗ (m) = 0.175 is just 23% of the maximum
1.6
power. This value reduces to zero as m = 1 point is
approached. So, it is not suggested to design L∗ for m < 1.
1.4
F. Fixing m and finalizing design
Note that V1 and fs are fixed and known a priori. For a
1.2
given choice of m∗ , the optimal value of inductance L∗ is
obtained by evaluation of p∗ at m = m∗ . For P = Pmax ,
L = L∗ and m, the optimal modulation strategy as given in 1
Section II-C can be used to obtain minimum rms current with 1 1.25 1.5 1.75 2
soft switching. The optimal parameters can then be substituted
in (9) to obtain the rms current. Now if we vary the chosen Fig. 8: Variation of rms current due to change in V2 (here m)
L∗ which is same as changing m∗ and repeat the process, for a given L = L∗ (m∗ )
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE IV: Device, Capacitor and Magnetics Rating

1.5
Switch RMS Peak
1.4 Pri. 0.84Pmax /V1 2.13Pmax /V1
Sec. 0.84nPmax /V1 2.13nPmax /V1
1.3
Capacitor Rip. RMS Capacitance
1.2 Pri. 0.645Pmax /V1 0.1027Pmax /(fs V1 ∆V1 )
Sec. 0.702nPmax /V1 0.112nPmax /(fs V1 ∆V2 )
1.1 Ac Aw n Irms
Transformer
0.641Pmax m∗ V1
Jfs Bm kw V2min
1.19 Pmax
V
1 1
1.1 1.2 1.3 1.4 1.5 Ac Aw Ip Irms
Inductor LIp Irms
Irms (γm∗ ) JBm kw
2.13 Pmax
V
1.19 Pmax
V
∗ 1 1
Fig. 9: Variation of Irms (m∗ ) with m for various γ
inductance which in this case is Ac = 4nmV 1 d2
s nBm fs
where Bm
Design Inputs
P ∈ [Pmin , Pmax ]
is the peak flux density in core. The value of Ac is maximum
V2 ∈ [V2min , V2max ] when m and d2 are maximum. The worst-case value of rms
V 1 , fs , γ = V2max current (which happens at point D) decides the window area
V2min
since Aw = 2nsknI wJ
rms
where kw and J are window factor and
Max variation Use Fig.9 to Determine the current density respectively. The required area product is
∗
†
of Irms choose m∗ n = Vm V1 indicated in Table IV.
2min
An external inductance may be required to be added in
p∗ (m∗ ) Determine series with the transformer for obtaining the desired optimal
V12 p∗ (m∗ )
using (15) L = 2πf P s max
L∗ . In such a scenario, the required area product is given by
LIpk Irms
† Percentage variation of I
rms due to change in V2 at P =Pmax
Ac Aw = JB m kw
. The rms and peak values are shown in
Table IV.
Fig. 10: Steps involved in converter design III. E XPERIMENTAL RESULTS
1.5 To validate the converter design and operation methodology,
a DC-DC converter was designed with the specifications
1 provided in Table V using the method outlined in Section II-F.
The value of m∗ is chosen to be 1.3 which gives p∗ = 0.56,
resulting in n = 1.6 and L = 73.13 µH. With these fixed
0.5
values of n, L and the modulation strategy described in Section
II-C, the maximum transformer primary rms and peak currents
(at Pmax , V2max ) are 7.8 A and 14.0 A respectively. The
1 1.25 1.5 1.75 2
secondary side rms and peak currents are 12.5 A and 22.4
A respectively. SiC MOSFETs (28 A current rating) are used
Fig. 11: Operating region of converter on m − p plane
for primary and secondary side switches. Isolated gate driver
(ADuM4135) is used for generation of gating pulses. The
plane bounded by the points A, B, C and D as shown in Fig.11. primary and secondary capacitor ripple currents are calculated
For P = Pmax and γ = 1.3 (say), the design strategy in Fig.10 to be 4.29 A and 7.38 A respectively. Film capacitors of
gives m∗ = 1.3. Thus, pmax = p∗ (m = 1.3) = 0.56, V2min 2.5 µF are used. The transformer area product is calculated
corresponds to mmin = 1.3. The point A on Fig.11 has coor- to be 9.26 cm4 . A planar transformer is ordered from Payton
dinates (1.3, 0.56), mmax = 1.3 VV2max
2min
and pmin = 0.56 PPmax
min
. with turns ratio of 24 : 15 and area product of 17.5 cm4 .
The leakage inductance of the transformer is measured to
be 20 µH at 75 kHz. Accordingly, an external inductor of
G. Component Ratings 53 µH (area product: 2.44 cm4 ) is designed using ferrite core
(Part No: 0R45530EC). The experimental setup is shown in
For a converter operating in the region shown in Fig.11, the Fig.13. The values of d∗1 = 1, d∗2 = 0.82 and δ ∗ = 0.35 are
maximum value of peak and rms currents need to be identified obtained using the modulation strategy described in subsection
for switch selection. The rms current is maximum at operating II-C. Fig.12a shows the operation of the converter at point A
point D (mmax , pmax ). The peak current is also maximum (V2min = 325 V, Pmax = 2.6 kW). The converter operates
at D. The values of these currents can be determined using in zone V (since d∗1 + d∗2 + δ ∗ = 2.17 > 2) for the set of
the design strategy in subsection II-F. The values of input modulation parameters which can be seen from Fig.12a. The
and output ripple rms currents can be then be determined experimental value of inductor RMS current is 7.14 A which is
which decides the capacitor ratings (for a given primary and
secondary voltage ripple ∆V1 and ∆V2 respectively). These TABLE V: Hardware Specifications
values are indicated in Table IV. For designing the transformer, V1 V2min V2max Pmin Pmax fs
the area product needs to be determined. The core area is 400 V 325 V 425 V 1 kW 2.6 kW 75 kHz
dependent on the volt-seconds applied to the magnetizing
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE VI: Comparison at four operating points of converter switching transition described in Section II-B2 (when iL = i1 )
P V2 (d1 ,d2 ,δ) Irms (T) Irms (S) Irms (E) Zone is shown in Fig.14 to demonstrate soft turn OFF of S2 and
A 2.6 325 (1,0.82,0.35) 7.18 7.23 7.14 V soft turn on of S1 . Switch S2 is conducting prior to its turn-
B 1.0 325 (0.77,0.59,0.18) 3.28 3.23 3.23 I off (at t0 ) since iL = i1 < 0 (cf. Fig.12a). After t = t0 , the
C 1.0 425 (0.58,0.34,0.24) 3.79 3.74 3.69 I gate voltage vgs,S2 starts to reduce. The gate voltage reduces
D 2.6 425 (0.93,0.55,0.38) 7.78 7.65 7.42 I
below threshold implying channel current is zero before vds,S2
starts to increase at t = t1 . This results in ZVS turn-off of
S2 . At t = t2 , vds,S1 reduces to zero and diode D1 starts
close to the theoretically predicted RMS value as indicated in conducting. The turn on of S1 at t = t3 happens at zero
Table VI. The operating waveforms for four boundary points of voltage indicating ZVS. Similar behaviour was observed for
the operating area with the modulation strategy in Section II-C the remaining switching transitions of the converter.
are given in Fig.12b-d respectively. The converter operation is
simulated in Simulink for the operating conditions in Fig.12. B. Efficiency and Loss breakup
The modulation parameters along-with the theoretical (T),
The analytical and experimental converter efficiency is
simulation (S) and experimental (E) rms currents for the
shown in Fig.15 for operation at minimum (along AB) and
four operating conditions are indicated in Table VI. A close
maximum (along CD) V2 (See Fig.11). A close agreement
agreement between theoretical, simulation and experimental
between the results can be observed. The peak efficiency of the
values can be observed. It can be seen that for all these
converter is 97% for operation at V2 = 325 V. The efficiency of
operating conditions, the power is less than nV 1 V2
8fs L which is the converter is slightly reduced for operation of the converter
the maximum deliverable power. Thus, the converter is able
at maximum V2 due to increased conduction losses.
to operate in the entire operating region of Fig.11.
Theoretical loss estimation is carried out for operation at the
four boundary points in the operating area of the converter. A
A. Soft Switching-Experimental Validation comparison of experimental loss and theoretical calculation is
Consider the converter operating in zone V at V2 = V2min given in Fig.16a. Variation of on state resistance with current
and P = Pmax (point A in Fig.11). Current i1 should be less and dependence of core loss on temparature leads to slight
than zero and the currents i2 , i3 and i4 should be greater than mismatch between the values. A theoretical loss breakup for
zero to ensure switch to diode transition (ZVS). For operation Pmax = 2.6 kW and V2min = 325 V (point A) is shown
of the converter at point A, the currents i1 -i4 are indicated in Fig.16b.√The primary and secondary√switch rms currents
on Fig.12a. It can be seen that all the current polarities are Irms / 2 = 5.08 A and nIrms / 2 = 8.13 A. With
are maintained as desired which ensures soft switching. The rds,on = 0.125 Ω for primary and secondary MOSFETS,

Fig. 12: Experimental results showing vab , vcd , iL and its RMS value for (a) Pmax = 2.6 kW, V2min = 325 V, (b) Pmin = 1
kW, V2min = 325 V, (c) Pmin = 1 kW, V2max = 425 V (d) Pmax = 2.6 kW, V2max = 425 V
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

14%
Exp. Anly. 20%

100

75 4%

50
35%
25
27%
A B C D

Fig. 16: (a) Comparison of analytical and experimental losses

Fig. 13: Experimental setup for the operating points A, B, C, D in Fig.11 (b) Theoretical
loss breakup for Pmax =2.6 kW, V2min =325 V

IV. C ONCLUSION
A design procedure for a dual active bridge based DC-
DC converter with a given set of specifications (power range,
uncontrolled port voltage range, controlled port voltage and
switching frequency) is presented. The design is aimed at
minimization of worst-case inductor rms current in the op-
erating range of the converter. Modelling of the converter
is carried out in time domain and optimal TPS strategy is
considered for minimum rms current and soft switching in the
entire operating range. It is identified that the maximum rms
current with optimal TPS strategy always happens at maximum
Fig. 14: Experimental evidence of soft turn OFF of S2 and power. For the converter operating at maximum power and
soft turn ON of S1 when iL = i1 in Fig.12a a given value of uncontrolled port voltage, an optimization
problem is formulated for minimization of rms current with
99 soft switching. Analytical solution of the optimization problem
provides the optimal values of the design variables i.e. trans-
98 former turns ratio and the value of the series inductance. As the
voltage of the uncontrolled port deviates from the value chosen
97 for optimal design, the rms current deviates from its optimal
value. Further analysis showed if the optimal design is done
96 at the minimum value of the uncontrolled port voltage, the
rms inductor current stays close to its optimal value, despite
95
1 1.5 2 2.5 variation in the voltage. Closed-form expressions for optimal
Input Power (kW) design variables obtained through curve-fitting are provided.
Fig. 15: Converter Efficiency A simple step by step procedure for obtaining the design
parameter values from converter specifications is provided.
Details of the selection of power devices, filter capacitors
the primary and secondary conduction losses are 12.9 W and and design of transformer and inductor is also given. A 2.6
33.04 W respectively. The transformer and inductor resistance kW hardware prototype is designed based on the outlined
is found to be rc = 0.5 Ω at 75 kHz. For rms current of 7.18 procedure. Experimental results confirm the effectiveness of
A (cf. Table VI), the conduction loss is 25.8 W. The core the design.
loss in transformer is evaluated through improved steinmetz
equation. The core parameters α = 1.098, β = 2.196, A PPENDIX
kc = 0.025 are obtained from the loss density curve given in A. Comparison with literature
the datasheet. The time averaged loss density is evaluated as
α A comparison of computational effort of the proposed
hpv i = ki |∆B|(β−α) dB(t) where ∆B is peak-to-peak flux
dt method with [24] is provided in Table VII. The proposed
density. The empirical relation for ki can be found in [25]. method is simple to implement whereas the computational
Evaluating ∆B and dB(t) dt from transformer applied volt- complexity is high in [24] for higher number of discrete
seconds, hpv i = 50.43 mW/cm3 . Multiplying by the core points N in the range of optimization variables. A detailed
volume the core loss in transformer is 4.13 W. This process performance comparison of the presented method with [23]
is repeated for the inductor core (α = 0.845, β = 2.099, is given. Same converter specifications (cf. Table V) are
kc = 0.467) and the core loss obtained is 18.66 W. The considered for both the methods. Following the design strategy
total loss at this operating condition is 94.8 W. It can be seen in [23], n = 0.94 and L = 78.4 µH. SPS modulation strategy
that major losses are the conduction losses in the bridges and is used. The worst case inductor rms, Irms (same as input
copper loses in the transformer. rms current, Irms,in ) in [23] occurs for V2 = V2min and its
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

value is indicated in Table VIII. With the proposed design TABLE IX: Comparison of component sizes
method, an improvement in the worst case rms current can Factor This paper [23]
Pmax
be observed. A considerable reduction in the worst case peak Trans. Ac Aw Jfs Bm kw
0.641 0.935
current and the output rms current can be similarly observed. Ind. Ac Aw Pmax
Jfs Bm kw
0.229 0.459
With the proposed design and modulation strategy in [10], Cap. Rip. RMS (Pri.) Pmax
0.645 1.581
V1
the converter achieves soft switching in the entire operating Cap. Rip. RMS (Sec.) Pmax
0.922 1.023
V2min
range. With the strategy in [23], the converter is partially soft
switched for low power and voltage. TABLE X: Loss comparison: P =2.6 kW and V2 =325 V
For comparing the power density and component sizes,
Factor This paper [23]
the area products of transformer, inductor and the capacitor  2
P
ripple rms requirement are indicated in Table IX for both the Cond.-Pri. V1
ron,p 2.387 6.996
 2
methods. Area product and ripple rms currents are calculated Cond. - Sec. P
V2min
ron,s 4.034 4.092
for the method in [23] using the strategy in section II-G.  2
P
Copper Loss V
rc 1.194 3.498
Proposed method results in reduction of magnetic component 1

and capacitor size. For comparing the efficiency, a loss com-

parison is provided in Table X for operation of the converter 400
395
at P =2.6 kW and V2 =325 V. It can be seen that the proposed 390
method results in reduction of conduction losses in both 0 2.5 5 7.5 10
2.6
the bridges and copper losses in transformer and inductor. 2.4
2.2
Thus the proposed method results in improvement of circuit 2
performance in terms of efficiency, component size and worst 0 2.5 5 7.5 10
360
case current stresses.
340
320
B. Closed loop operation 0 2 4 6 8 10

The modulation technique in [10] is used for converter

operation once design parameters are fixed according to sec-
tion II-F. A closed loop voltage controller having structure
as [10] is implemented in simulation and experiment for
regulating the controlled port voltageto given value V1∗ during
disturbances. The PI controller parameters are obtained as
kp =20, ki =25 × 103 following design process in [10]. Fig.17a
shows the dynamic performance of the converter for step
changes in load and V2 . The converter was initially operating
with P =2 kW, V1 =400 V and V2 =325 V. At t=1 ms, the load of
the converter is increased by 10% after which the closed loop
action brings the delivered power to 2.4 kW and V1 to 400 V. Fig. 17: (a) Simulation showing closed loop performance(b)
At t=8 ms, V2 is increased by 10%. The power settles to the Experimental result showing response to change in V1∗
same value after an initial short transient. For experimental
C. Discussion on EMC
verification, the response of the converter is shown in Fig.17b
for a step change in V1∗ (CH4) from 360 V to 400 V. Following The DAB circuit along-with LISN shown in Fig.18 is sim-
the step change at t=0, a first order dynamics can be observed ulated to analyse the common mode noise. According to FCC
in V1 after which it settles to 400 V (CH1). Since the load regulation, the common-mode voltage (vcm = 0.5(vx + vy ))
resistance is constant, the current accordingly increases from developed across 50 Ω resistance should be less than 1 mV in
4.5 A to 5 A (CH2). The measured power also increases to 2 150 kHz-30 MHz [27]. This regulation is violated without the
kW. V2 is kept constant during this event (CH3). EMI filter (cf. Fig.19a). An EMI filter is designed to attenuate
the peak (150 mV) by 150 times (43.5 dB) . Accordingly, LC
TABLE VII: Computation comparison with [24] filter (formed by Lcm and Ccm ) should have cut-off frequency
43.5
of 150 × 10− 40 =12.24 kHz. Fig.19b shows the common-
Proposed strategy Method in [24] with N discrete points
4 A, 16 M, 2 D, 0 S 7N 3 A, 22N 3 M, 4N 3 D, 2N 3 S
A: addition, M: multiplication, D: division, S: square root

TABLE VIII: Worst Case performance comparison

Factor This paper [23]

Pmax
Irms,in , Irms (Worst) V1
1.19 1.87
Pmax
Ipk (Worst) V1
2.13 2.54
Pmax
Irms,out (Worst) V2min
1.64 1.84 Fig. 18: Circuit to study EMC response(C1 & C2 from [26])
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

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[8] F. Krismer and J. Kolar, “Closed form solution for minimum conduction in 2014 and M.S degree in electrical engineering
loss modulation of DAB converters,” IEEE Trans. Power Electron., from the Indian Institute of Science, Bangalore,
vol. 27, no. 1, pp. 174–188, 2012. India, in 2017. He is currently pursuing his Ph.D.
[9] S. Chakraborty and S. Chattopadhyay, “Fully ZVS, minimum RMS in electrical engineering from Indian Institute of
current operation of the dual-active half-bridge converter using closed- Science, Bangalore, India. His research inter-
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vol. 33, no. 12, pp. 10 188–10 199, Dec. 2018.
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switching strategy of isolated bidirectional DC-DC converter with dual Kaushik Basu (S’07, M’13, SM’17) received
phase shift control,” IEEE Trans. on Ind. Electron., vol. 60, no. 10, pp. the BE. degree from the Bengal Engineering
4458–4467, Oct. 2013. and Science University, Shibpore, India, in 2003,
[12] N. Hou, W. Song, and M. Wu, “Minimum current stress scheme of dual the M.S. degree in electrical engineering from
active bridge DC-DC converter with unified phase shift control,” IEEE the Indian Institute of Science, Bangalore, In-
Trans. on Power Electron., vol. 31, no. 12, pp. 8552–8561, Dec. 2016. dia, in 2005, and the Ph.D. degree in elec-
[13] J. Huang, Y. Wang, Z. Li, and W. Lei, “Unified triple phase shift control trical engineering from the University of Min-
to minimize current stress and achieve full soft switching of isolated nesota, Minneapolis, in 2012, respectively. He
bidirectional DC/DC converter,” IEEE Trans. on Ind. Electron., vol. 63, was a Design Engineer with Cold Watt India in
no. 7, pp. 4169–4179, Jul. 2016. 2006 and an Electronics and Control Engineer
[14] Q. Gu, L. Yuan, J. Nie, J. Sun, and Z. Zhao, “Current stress minimization with Dynapower Corporation USA from 2013-15.
of dual active bridge DC-DC converter within the whole operating Currently he is an Associate Professor in the Department of Electrical
range,” IEEE Journal of Emerging and Selected Topics in Power Engineering in Indian Institute of Science. He has been an author and
Electronics, vol. 7, no. 1, pp. 129–142, Mar. 2019. coauthor of several technical papers published in peer reviewed journals
[15] S. Shao, M. Jiang, W. Ye, Y. Li, J. Zhang, and K. Sheng, “Optimal and conferences. His research interests include various aspects of the
phase shift control to minimize reactive power for a dual active bridge general area of Power Electronics. He is the founding chair of both IEEE
DC-DC converter,” IEEE Trans. on Power Electron., vol. 34, no. 10, pp. PELS and IES Bangalore Chapter.
10 193–10 205, Oct. 2019.