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EE 43 (DELD LAB)

The document outlines a series of experiments in a Digital Electronics and Logic Design Lab, focusing on the study and verification of logic gates, simplification of Boolean expressions, and the implementation of various circuits using NAND gates. It includes objectives, required components, theoretical background, procedures, and questions for each experiment. The experiments cover topics such as truth tables for logic gates, realization of basic and universal gates, and the design of flip-flops.
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0% found this document useful (0 votes)
6 views18 pages

EE 43 (DELD LAB)

The document outlines a series of experiments in a Digital Electronics and Logic Design Lab, focusing on the study and verification of logic gates, simplification of Boolean expressions, and the implementation of various circuits using NAND gates. It includes objectives, required components, theoretical background, procedures, and questions for each experiment. The experiments cover topics such as truth tables for logic gates, realization of basic and universal gates, and the design of flip-flops.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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DIGITAL ELECTRONICS & LOGIC DESIGN LAB

EXPERIMENT: 1
AIM: To study and verify the truth table of logic gates

OBJECTIVE:

Identify various ICs and their specification

a. OR gate
b. AND gate
c. NAND gate
d. NOR gate

COMPONENTS REQUIRED:

 Breadboard.
 Connecting wires.
 IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486

THEORY:
The basic logic gates are the building blocks of more complex logic circuits. These logic
gates perform the basic Boolean functions, such as AND, OR, NAND, NOR, Inversion,
Exclusive-OR, Exclusive-NOR. Fig. below shows the circuit symbol, Boolean function,
and truth. It is seen from the Fig that each gate has one or two binary inputs, A and B, and
one binary output, C. The small circle on the output of the circuit symbols designates the
logic complement. The AND, OR, NAND, and NOR gates can be extended to have more
than two inputs. A gate can be extended to have multiple inputs if the binary operation it
represents is commutative and associative.
These basic logic gates are implemented as small-scale integrated circuits (SSICs) or as
part of more complex medium scale (MSI) or very large-scale (VLSI) integrated circuits.
Digital IC gates are classified not only by their logic operation, but also the specific logic-
circuit family to which they belong. Each logic family has its own basic electronic circuit
upon which more complex digital circuits and functions are developed. The following logic
families are the most frequently used.

TTL Transistor-transistor logic

ECL Emitter-coupled logic

MOS Metal-oxide semiconductor

CMOS Complementary metal-oxide semiconductor


TTL and ECL are based upon bipolar transistors. TTL has a popularity among logic families.
ECL is used only in systems requiring high-speed operation. MOS and CMOS, are based on
field effect transistors. They are widely used in large scale integrated circuits because of their
high component density and relatively low power consumption. CMOS logic consumes far less
power than MOS logic. There are various commercial integrated circuit chips available. TTL
ICs are usually distinguished by numerical designation as the 5400 and 7400 series.
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

PROCEDURE:

1. Check the components for their working.


2. Insert the appropriate IC into the IC base.
3. Make connections as shown in the circuit diagram.
4. Provide the input data via the input switches and observe the output on output LEDs

QUESTIONS:

1. Why NAND & NOR gates are called universal gates?


2. Realize the EX – OR gates using minimum number of NAND gates.
3. Give the truth table for EX-NOR and realize using NAND gates?
4. What are the logic low and High levels of TTL IC’s and CMOS IC’s?
5. Compare TTL logic family with CMOS family?
6. Which logic family is fastest and which has low power dissipation?
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

EXPERIMENT: 2

AIM: To simplify the given expression and to realize it using Basic gates
and Universal gates

LEARNING OBJECTIVE:
 To simplify the Boolean expression and to build the logic circuit.
 Given a Truth table to derive the Boolean expressions and build the
logic circuit to realize it.

COMPONENTS REQUIRED:

IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, Connecting wires, Bread board.

THEORY:
Canonical Forms (Normal Forms): Any Boolean function can be written in
disjunctivenormal form (sum of min-terms) or conjunctive normal form (product of max-
terms).
A Boolean function can be represented by a Karnaugh map in which each cell corresponds
to a minterm. The cells are arranged in such a way that any two immediately adjacent cells
correspond to two minterms of distance 1. There is more than one way to construct a map
with this property.
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

Realization using NOR gates

PROCEDURE:

Check the components for their working.

Insert the appropriate IC into the IC base.

Make connections as shown in the circuit diagram.


DIGITAL ELECTRONICS & LOGIC DESIGN LAB

Provide the input data via the input switches and observe the output on output
LEDs Verify the Truth Table

RESULT: Simplified and verified the Boolean function using basic gates and universal gates

QUESTIONS:
1) What are the different methods to obtain minimal expression?
2) Realize I(A,B,C,D) =∑(0,1,2,3,4,5,6,7,8,9,10) and show the truthtables.
3) What is a Min term and Max term
4) State the difference between SOP and POS.
5) What is meant by canonical representation?
6) What is K-map? Why is it used?
7) What are universal gates?
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

EXPERIMENT: 3

AIM: To design and implementation using NAND gate

OBJECTIVE:

 To realize why NAND gate is known as the universal gate by implementation of :


a. NOT using NAND
b. AND using NAND
c. OR using NAND
d. XOR using NAND

COMPONENTS REQUIRED:

 Breadboard.
 Connecting wires.
 IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486

THEORY:

Boolean algebra is a branch of mathematical logic, where the variables are either true (1) or false
(0).In order to construct NOT, AND, OR, XOR gates from NAND gates only, we need to be
familiar with the following boolean algebra laws:

1. Involution Law

2. Idempotency (Idempotent) law

3. DeMorgan's Law
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

2 input XOR gate

PROCEDURE:

Check the components for their working.

Insert the appropriate IC into the breadboard.

Make connections as shown in the circuit diagram.

Provide the input data via the input switches and observe the output on output
LEDs
Verify the Truth Table

RESULT:

NOT, AND, OR, XOR gate is realized using NAND gate.


DIGITAL ELECTRONICS & LOGIC DESIGN LAB

EXPERIMENT:4
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

ii) To Realize the Full subtractor using NAND Gates only


DIGITAL ELECTRONICS & LOGIC DESIGN LAB

PROCEDURE:
 Check the components for their working.
 Insert the appropriate IC into the IC base.
 Make connections as shown in the circuit diagram.
 Verify the Truth Table and observe the outputs.

RESULT:

QUESTIONS:
1) What is a half adder?
2) What is a full adder?
3) What are the applications of adders?
4) What is a half subtractor?
5) What is a full subtractor?
6) What are the applications of subtractors?
7) Obtain the minimal expression for above circuits.
8) Realize a full adder using two half adders
9) Realize a full subtractors using two half subtractors
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

EXPERIMENT: 5

AIM: Truth Table verification of


1) RS Flip Flop
2) T type Flip Flop.
3) D type Flip Flop.
4) JK Flip Flop.
OBJECTIVE:
 To learn about various Flip-Flops
 To learn about applications of FFs
 Conversion of one type of Flip flop to another
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB

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