EE 43 (DELD LAB)
EE 43 (DELD LAB)
EXPERIMENT: 1
AIM: To study and verify the truth table of logic gates
OBJECTIVE:
a. OR gate
b. AND gate
c. NAND gate
d. NOR gate
COMPONENTS REQUIRED:
Breadboard.
Connecting wires.
IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486
THEORY:
The basic logic gates are the building blocks of more complex logic circuits. These logic
gates perform the basic Boolean functions, such as AND, OR, NAND, NOR, Inversion,
Exclusive-OR, Exclusive-NOR. Fig. below shows the circuit symbol, Boolean function,
and truth. It is seen from the Fig that each gate has one or two binary inputs, A and B, and
one binary output, C. The small circle on the output of the circuit symbols designates the
logic complement. The AND, OR, NAND, and NOR gates can be extended to have more
than two inputs. A gate can be extended to have multiple inputs if the binary operation it
represents is commutative and associative.
These basic logic gates are implemented as small-scale integrated circuits (SSICs) or as
part of more complex medium scale (MSI) or very large-scale (VLSI) integrated circuits.
Digital IC gates are classified not only by their logic operation, but also the specific logic-
circuit family to which they belong. Each logic family has its own basic electronic circuit
upon which more complex digital circuits and functions are developed. The following logic
families are the most frequently used.
PROCEDURE:
QUESTIONS:
EXPERIMENT: 2
AIM: To simplify the given expression and to realize it using Basic gates
and Universal gates
LEARNING OBJECTIVE:
To simplify the Boolean expression and to build the logic circuit.
Given a Truth table to derive the Boolean expressions and build the
logic circuit to realize it.
COMPONENTS REQUIRED:
THEORY:
Canonical Forms (Normal Forms): Any Boolean function can be written in
disjunctivenormal form (sum of min-terms) or conjunctive normal form (product of max-
terms).
A Boolean function can be represented by a Karnaugh map in which each cell corresponds
to a minterm. The cells are arranged in such a way that any two immediately adjacent cells
correspond to two minterms of distance 1. There is more than one way to construct a map
with this property.
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
PROCEDURE:
Provide the input data via the input switches and observe the output on output
LEDs Verify the Truth Table
RESULT: Simplified and verified the Boolean function using basic gates and universal gates
QUESTIONS:
1) What are the different methods to obtain minimal expression?
2) Realize I(A,B,C,D) =∑(0,1,2,3,4,5,6,7,8,9,10) and show the truthtables.
3) What is a Min term and Max term
4) State the difference between SOP and POS.
5) What is meant by canonical representation?
6) What is K-map? Why is it used?
7) What are universal gates?
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
EXPERIMENT: 3
OBJECTIVE:
COMPONENTS REQUIRED:
Breadboard.
Connecting wires.
IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486
THEORY:
Boolean algebra is a branch of mathematical logic, where the variables are either true (1) or false
(0).In order to construct NOT, AND, OR, XOR gates from NAND gates only, we need to be
familiar with the following boolean algebra laws:
1. Involution Law
3. DeMorgan's Law
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
PROCEDURE:
Provide the input data via the input switches and observe the output on output
LEDs
Verify the Truth Table
RESULT:
EXPERIMENT:4
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
PROCEDURE:
Check the components for their working.
Insert the appropriate IC into the IC base.
Make connections as shown in the circuit diagram.
Verify the Truth Table and observe the outputs.
RESULT:
QUESTIONS:
1) What is a half adder?
2) What is a full adder?
3) What are the applications of adders?
4) What is a half subtractor?
5) What is a full subtractor?
6) What are the applications of subtractors?
7) Obtain the minimal expression for above circuits.
8) Realize a full adder using two half adders
9) Realize a full subtractors using two half subtractors
DIGITAL ELECTRONICS & LOGIC DESIGN LAB
EXPERIMENT: 5