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The document is a micro project report on building a 4-bit adder circuit, completed by students at Rajgad Dnyanpeeth Technical Campus under the guidance of Prof. Malusare K.B. It outlines the project's objectives, components used, working explanation, and applications of the adder in digital systems. The report also includes acknowledgments, a circuit diagram, and references.

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Vaishnavi Shingare
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9 views

fluid mechanics. pdf-1

The document is a micro project report on building a 4-bit adder circuit, completed by students at Rajgad Dnyanpeeth Technical Campus under the guidance of Prof. Malusare K.B. It outlines the project's objectives, components used, working explanation, and applications of the adder in digital systems. The report also includes acknowledgments, a circuit diagram, and references.

Uploaded by

Vaishnavi Shingare
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 12

Rajgad Dnyanpeeth Technical Campus Polytechnic, Dhangawadi

Tal. Bhor, Dist. Pune – 412206 (M.S) India

A MICRO PROJECT REPORT


On
“Build a circuit to implement 4 bit adder ”

Is by

Miss. Lad Tejaswini (2215320008)


Miss.Harane Prajakta Dhanaji(2215320009)
Miss.Shinde Janhavi Jalindar(2215320010)

Under the guidance of Submitted


Prof. Malusare K.B

Subject: - Digital Technique


In partial fulfilment of
Diploma in S. Y Computer Engineering

(Academic Year 2023-2024)


Maharashtra State Board of Technical Education, Mumbai
1
Certificate

This is to certify that following students

Miss. Lad Tejaswini (2215320008)


Miss.Harane Prajakta Dhanaji(2215320009)
Miss. Shinde Janhavi Jalindar(2215320010)

Has successfully submitted their micro project report on “Build a circuit to


implement 4 bit adder’’during the academic year 2023-2024 in the partial
fulfilment towards the completion of micro project in S.Y Computer
Engineering under MSBTE MUMBAI

Project Guide Head of Department

Prof. Malusare K.B Prof. S a l u n k h e . A . A

2
Index

Sr.no Points
1 Introduction
2 Benefits
3 Specification
4 Features
5 Circuit Diagram
6 Working Explanation
7 Application
8 Conclusion
9 References
ACKNOWLEDGEMENT
I am personally indebted to a number of people who gave me their useful insights to
aid in my overall progress for this project. A complete acknowledgement would therefore be
encyclopedic. First of all, I would like to give my deepest gratitude to my parents for permitting
me to take up this course.

My heartfelt sense of gratitude goes to our respected Principal Prof. Khopade D. K.,
for all his efforts and administration in educating us in his premiere institution. I take this
opportunity to also thank our Head of the Department, Prof.Salunkhe.A.A for her
encouragement throughout the seminar.

I would like to express my sincere thanks and gratitude to my guide Prof. MalusareK.B
for her commendable support and encouragement for the completion of Project with perfection.
I also convey my sincere thanks to Prof. Malusare K.B for his invaluable suggestions and for
his technical support rendered during the course of my project.

I would like to thank all faculty members and staff of the Department of Computer
Engineering for their generous help in various ways for the guidance of this project.

Student Name Enrollment no Sign


Lad Tejaswini 221532008

Harane Prajakta Dhanaji 2215320009

Shinde Janhavi Jalindar 2215320010


ABSTRACT

An adder is a digital circuit that performs addition of numbers. The operation of


adding two binary numbers is one of the fundamental tasks performed by a digital
computer. In many computers and other kinds of processors adders are used in the
arithmetic logic units or ALU. They are also utilized in other parts of the
processor, where they are used to calculate addresses, table indices, increment and
decrement operators, and similar operations. A full adder adds binary numbers and
accounts for values carried in as well as out. The four basic addition operations are
0 + 0 = 0, 1 + 0 = 1, 0 + 1 = 1 and 1 + 1 = 10. In the first three operations, each
binary addition gives sum as one bit , i.e. , either 0 or 1. But the fourth addition
operation gives a sum that consists of two binary digits. In such result of the
addition, lower significant bit is called as the sum bit, whereas the higher
significant bit is called as the carry bit. Experiment Detail In this experiment we
have done 4 Bit addition by using a single IC 7483. This is a 4 bit parallel adder
which consists of four interconnected full adders along with the look ahead carry
circuit. It is a 16 pin IC. The inputs to the IC are A, B, C 0 while outputs are S and
C 4. A 3 A 2 A 1 A 0 is a 4 bit input word 'A' and B 3 B 2 B 1 B 0 is the second 4
bit input word 'B'. The IC adds the two four bit words along with input carry to
produce a 4 bit sum and a one bit carry-out. C out3 represents the output carry, S 3
,S 2 ,S 1 ,S 0 represents sum output with S 3 as the MSB. The Pin diagram of IC
7483 along with details of internally connected X-OR gates at the inputs of word
"B" are shown in FIG:1. We also find that by applying a "0" or "1" to the mode
select pin "13" the IC can perform Addition or Subtraction of the two numbers "A"
and "B" respectively. As given in the block diagram of the experiment in FIG:2
inputs are connected to A1~A4, B0~B3 to DIP Switches DIP2: O~3 and DIP1:0~3
respectively along with LEDs which represent the state of the input. Connect S 1 ,
S 2 , S 3 , S 4 , C 4 to LEDs L 1~L5. Follow input sequences in the table-1 below,
record carry and sum in hexadecimal numbers

4
INTRODUCTION

The topic of the course project is to design a 4-bit adder in the standard 0.25
um CMOS Technology. The main objectives of the project is to minimize the
total delay of the adder (i.e. the worst case delay of the circuit), the area used
to implement the adder, and its average power consumption. That in mind, the
team was able to split the project into 2 phases: the research phase and the
simulation phase. In the research phase, the team had to compare different
adder architectures clearly defining the advantages and disadvantages of each
one in terms of area and delay to be able to choose what could be the most
efficient adder architecture for the design of a 4-bit adder. Another essential
task in the research phase was to decide on the gate level implementation of
the circuit, compare the different logic families’implementations for each gate,
and finally decide on the proper logic family implementation for each gate in
light of the project objectives stated beforehand. Once the research phase was
accomplished, the team had to move on to the simulation phase. In the
simulation phase, the team had to design each gate separately and optimize it
to achieve the optimum delay and powerconsumption,thensimulate a 1-bit full
adder, and finally simulate the whole 4-bit adder. The simulation phase
concludes the project by estimating the worst case delay of the 4-bit adder
design and the average power consumption of the circuit.

As the project description is to design a 4 bit adder, group members assumed they
have 8 inputs which are the 2 sets of 4 bits to be added, so in the design it is more
efficient in terms of delay, area, and power to design a half bit adder for the first
bit adder as there is no carry-in bit for the first adder. This will show great
performance improvement because the Cout bit will be result of 2 gate delays
instead of 3.
Benefits:-

• Arithmetic operations in digital computers and other digital devices.


• Binary addition in digital signal processing systems.
• Binary addition in control systems and other embedded systems.
• Binary addition in digital logic circuits and other digital logic systems.
It is important to note that as technology advances, larger and more complex
adders are typically used in modern digital systems.
APPLICATION :-

An adder is a digital circuit that performs addition of numbers. In


many computers and other kinds of processors adders are used in
the arithmetic logic units (ALUs). They are also used in other parts of
the processor, where they are used to calculate addresses , table
indices, increment and decrement operators and similar operations.
Although adders can be constructed for many number representations ,
such as binary-code decimal or excess-3 , the most common adders
operate on binary numbers. In cases where two's complement or ones'
complement is being used to represent negative numbers , it is trivial to
modify an adder into an adder–subtractor. Other signed number
representations require more logic around the basic adder.

IC 7483 to 4 bit adder


COMPONENTS :-

• Arduino Uno

• 2x Standard Breadboard

• Jumper Wires

• 2x DIP Switches

• 2x XOR Gates

• 2x AND Gates

• 1x OR Gate

• 5x LEDs
Circuit Diagram
WORKING EXPLANATION

A 4-bit binary adder is a fundamental electronic circuit used


to do addition operations. The adder takes two 4-bit inputs, A
and B to produce a 4-bit output, sum along with a carry out.
This means you can calculate 1111+1111, which will give you
11110 ( 15+15 = 30). unlike a half adder which uses one half
adder and one full adder, the 4-bit adder uses one half adder
and 3 full adders. The logic gates used in this circuit are XOR,
AND, OR. if you like to build the whole project here are the
steps required .
CONCLUSION

A 4 bit adder has been proposed in this paper and imple-


mented in 4X4 multiplier using Vedic sutras. It is seen that the
speed of the proposed multiplier is higher than that of normal
array multiplier i.e. the delay has been drastically reduced. 4X4
multiplier can be extended to 8 bit and higher order multipliers.
This multiplier can be used in applications such as digital signal
processing, encryption and decryption algorithms in cryptogra-
phy. The proposed design can further be implemented at transis-
tor level and verified.

1
REFERENCES

1.Online Resources.
2.Different Websites.
3.DTE Books.

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