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Microprocessor

Mohammad Hosseini

Microprocessor Systems

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Outline

❖ Microcomputer systems

❖ Types of processors

❖ Components of microcomputer systems

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Von Neumann Architecture

❖1945, “First Draft of a Report on the EDVAC”

➢ The first published description of the logical design
of a computer using the stored-program concept

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Harvard Architecture
❖ Von Neumann architecture
➢ Program instructions and data share the same
memory and pathways
➢ The CPU cannot simultaneously read an instruction
and read or write data from or to the memory.

❖ Harvard architecture
➢ Separate storage, signal pathways, and
address spaces for instructions and data
➢ The CPU can both read an instruction
and perform a data memory access at
the same time

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CPU and Microprocessor

❖ CPU (Central Processing Unit)

➢ The part of a computer that executes instructions
➢ This can be implemented using a single IC, a number of ICs, discrete
transistors or a room full of vacuum tubes

❖ Microprocessor
➢ A single-chip implementation of a CPU, consisting of ALU, CU and registers
➢ Contains no RAM, ROM, or I/O ports on the chip itself
➢ e.g., Intel’s x86 family (8088, 8086, 80386, 80386, 80486, Pentium);
Motorola’s 680x0 family (68000, 68010, 68020, etc)

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Microcomputer
❖ CPU: processes information stored in the memory
➢ Microprocessor
❖ Memory: stores both instructions and data
➢ RAM, ROM
❖ Input/Output ports: provide a means of communicating with the CPU
❖ Connecting I/O devices, e.g., keyboard, monitor, tape, disk, printer and etc.
❖ Bus: strips of wire interconnecting the parts. Bus carries information from place to place
➢ Address bus
➢ Data bus CU Address bus
➢ Control bus
CPU Memory I/O Ports
ALU

Registers Data bus

Control bus

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Microcomputer System
❖ Microcomputer
❖ Peripheral I/O devices
❖ Software
➢ Software system
✓ OS, Compiler, Drivers, …
➢ Application software Sometimes we refer to Microcomputer System
✓ Word, Matlab, Media player, … simply just as Computer

CU Address bus

CPU Memory I/O Ports

I/O
ALU Devices

Registers Data bus

Software
Control bus

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Microcontroller
❖ Microcontroller: a microcomputer on a single chip
➢ A microcontroller incorporates all of the necessary computing components
onto a single chip: CPU, memory, interrupt controls, timer, serial interfaces,
I/O ports, and other peripherals.

▪ Compared to microprocessor:
➢ Specific task or application (typically in embedded systems such as
automobile engine control systems, implantable medical devices, remote
controls, office machines, home appliances, toys, …)
➢ Simpler CPU
➢ Lower clock speed
➢ Lower power consumption
➢ Less design time
➢ Results in simpler board design

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Block Diagram of
LPC1768 microcontroller

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System on a Chip
❖ SoC: integrates not only CPU, memory, and typical peripherals, but also
advanced peripherals like graphics processing unit (GPU), Wi-Fi interface
controller, and mixed-signal functions in a single chip.

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Programmable Logic Controller
❖ PLC: a specialized form of a microcontroller ruggedized and adapted
for the control of manufacturing processes, such as assembly lines,
machines, robotic devices.

▪ Ruggedized computer: a computer

specifically designed to operate reliably in
harsh usage environments and conditions,
such as strong vibrations, extreme
temperatures and wet or dusty conditions.

▪ Ladder Diagram: graphical programming

language

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Digital Signal Processor
❖ DSP: a type of processor optimized for the operational needs of digital signal
processing, including specific math operations to be performed quickly and
efficiently (typically in real time).
➢ Applications: audio and video processing, image processing, radar, medical
electronics, …
➢ Operations: multiply–accumulates (MAC), matrix operations (convolution for
filtering, dot product)
➢ Large amounts of data
➢ Harvard architecture
➢ Highly parallel multiplier–accumulators (MAC units)
➢ Addressing modes: supporting auto-increment, circular buffers, and bit-reversed
addressing (for FFT)
➢ Supports fixed-point arithmetic to speed up arithmetic processing
➢ Difficult to program: Assembly or specialized (assembly-coded) C Libraries

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Graphics processing unit
❖ GPU: A specialized many-core processor designed especially to
perform the calculations required in graphics rendering

➢ GPUs have evolved towards more general programming models

(CUDA, OpenCL)

➢ Typically quite power hungry

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More on CPUs

❖ A program stored in memory provides instructions to the CPU to

perform an action.

❖ An instruction is a pre-defined code which defines a specific operation,

processing and exchanging information among CPU, memory and I/O
devices.

❖ CPU fetches these instructions from memory and executes them.

❖ To perform the actions of fetch and execute, all CPUs are equipped with
resources such as the following …

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Inside CPUs

❖ Registers: store information temporarily

CU

❖ Arithmetic Logic Unit (ALU): CPU

➢ Performs arithmetic and logic functions: add, subtract, AND, OR, … ALU

Registers
❖ Control Unit (CU): works under instructions
➢ Instruction Register
➢ Instructor decoder
✓ Interprets the instruction fetched into CPU and generates all control signals,
coordinating all activities within the computer
➢ Program Counter
✓ Points to the address of the next instruction to be executed. Its contents are placed
on the address bus to find and fetch the desired instruction

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Memory System

Address bus

Primary storage
Secondary storage
CPU (main memory,
I/O (external memory)
internal memory)
[HDD, SSD]
[RAM, ROM]
Cache
Data bus

❖ Main memory is directly accessible to the CPU

➢ The CPU continuously reads instructions stored there and executes them as required
➢ Data and variables actively operated on is also stored in the main memory
❖ Secondary Memory is not directly accessible by the CPU
➢ The computer usually uses its input/output channels to access secondary storage and
transfer the desired data to primary storage

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Types of Memories

❖ Random-Access Memory (RAM)

❖ Read-Only Memory (ROM)

❖ Flash Memory

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Memory Characteristics
❖ Location
➢ CPU (register), Internal (cache, RAM), External (Disk, DVD)

❖ Capacity
➢ Word size, Number of words

❖ Unit of transfer
➢ Word or Block

❖ Access method
➢ Sequential (tape), Direct (hard disk), Random (RAM, ROM), Associative (Cache)

❖ Performance
➢ Access time (latency), transfer Rate

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Random-Access Memory (RAM)
❖ Same amount of time is required to access any location on
the same chip
❖ Typically used to store working data and machine code
❖ Volatile (loses its data quickly when power is removed)

➢ Dynamic random-access memory (DRAM)

▪ Memory cell: a tiny capacitor and a transistor
▪ Periodic refresh is required to maintain the contents
of a DRAM chip
➢ Static random-access memory (SRAM)
▪ Uses latching circuitry (flip-flop) to store each bit
▪ No periodic refresh is required
▪ Faster than DRAM
▪ More expensive in terms of silicon area and cost

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Random-Access Memory (RAM)
Where are DRAM and SRAM used?

DRAM SRAM

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Read-Only Memory (ROM)
❖ Can only be read but not written by the processor
❖ For storing software that is rarely changed during the life of the system (Firmware)
❖ Non-volatile
➢ Mask-programmed read-only memory (MROM)
▪ Programmed when being manufactured (hard-wired, cheap)
➢ Programmable read-only memory (PROM)
▪ The memory chip can be programmed by the end user (can’t be reprogrammed)
➢ Erasable programmable ROM (EPROM)
▪ Electrically programmable many times
✓ erasable by ultraviolet light (through a window, at a slow speed)
✓ erasable in bulk (whole chip in one erasure operation)
➢ Electrically erasable programmable ROM (EEPROM)
▪ Electrically programmable many times
✓ Electrically erasable many times
✓ Typically can only be erased in bulk

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Flash Memory
❖ Non-volatile
❖ Electrically programmable many times
❖ Electrically erasable many times
❖ Can be erased and programmed in blocks (pages)

A disassembled USB flash drive.

The chip on the left is flash memory.
The controller is on the right

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I/O Devices

❖ Input devices such as switches and keyboards provide

binary information to the microprocessor

❖ Output devices such as LEDs, video screens, and printers

receive information from the microprocessor

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Data Bus

❖ Used to provide a path for moving data between system modules

❖ Bidirectional
➢ CPU read: Memory (I/O device) → CPU
➢ CPU write: CPU → Memory (I/O device)

❖ The width of data bus

➢ is as wide as the registers of a CPU (i.e. the width of a word)
➢ determines how much data the processor can read or write in one
memory or I/O cycle
➢ which also defines a word of this computer

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Control Bus

❖ Used to control each module and the use of data and address
buses
➢ Command and timing information between modules
➢ e.g., memory read/write, IO read/write, Bus request/grant

❖ Consists of two sets of unidirectional control signals

➢ Command signal: from CPU to Memory (I/O device)
➢ State signal: from Memory (I/O device) to CPU

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Address Bus

❖ Used to designate the source or destination of the data on the data

bus that the processor intends to communicate with

❖ Unidirectional
➢ From CPU to memory and I/O device

❖ The width of the address bus, n

➢ determines the total number of memory locations addressable by a given
CPU, which is 2𝑛
➢ e.g., 8086 has a 20-bit address bus which corresponds to 220 addresses
or 1M (1 Meg) addresses or memory locations

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A Simple Example
An imaginary CPU:
➢ Registers: A, B, C, and D
➢ 8-bit data bus Memory Contents
➢ 16-bit address bus (can access memory from 0000 to FFFFH) address
❖ Action (program): adding values 21H, 42H, and 12H 1400 B0
1401 21
➢ CPU opcode for moving a value to register A: 10110000 (B0H)
1402 04
➢ CPU opcode for adding a value to register A: 00000100 (04H)
1403 42
1404 04
Action Code Data
Move value 21H into register A B0H 21H 1405 42
Add value 42H to register A 04H 42H 1406 F4 halt
Add value 12H to register A 04H 12H

Suppose the program is stored in memory locations starting at 1400H.

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Assembly Programming
❖ A CPU can work only in binary (0 and 1)
❖ A program that consists of 0s and 1s is called machine language
❖ It is quite tedious and slow for humans to deal with 0s and 1s in order to program
a computer
❖ Assembly languages were developed, which provide mnemonics for the
machine code instructions, plus other features that made programming
faster and less prone to error.
➢ An Assembly language instruction consists of a mnemonic
(command to the CPU), optionally followed by one or two MOV A, 21H
operands (data items being manipulated).
❖ Assembly language programs must be translated into machine code by a
program called an assembler.
❖ Assembly language is referred to as a low-level language because it deals
directly with the internal structure of the CPU.

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I/O Approaches

❖ Methods of performing input/output (I/O) between CPU

and peripheral devices

➢ Memory-mapped I/O

➢ Isolated I/O (Port-mapped I/O)

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Memory-mapped I/O

❖ One single address space for both memory and I/O

❖ Status and data registers of I/O modules are treated as memory
locations
❖ Same instructions can control both I/O and Memory

➢ How do peripherals Address

become activated?
CPU Memory I/O

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Isolated I/O (Port-mapped)

❖ Two separate address spaces for memory and I/O modules

❖ Separate instructions control read and write operations in I/O and
Memory

MA Address

CPU Memory I/O CPU Memory I/O

En En

IOA

Dedicated address lines Multiplexing address lines

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CPU Performance

❖ How can we make a CPU process information faster?

➢ Increasing its working frequency
▪ Technology dependent
▪ Heat

➢ Improving its internal architecture

▪ Performing parallel tasks
▪ Pipeline
▪ Caching mechanisms
▪ Branch prediction

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CPU Design Philosophies
Program for CPU1 Program for CPU2
MULT [0200H], [0100H], [0104H] LOAD A, [0100H]
LOAD B, [0104H]
MULT A, B
STORE [0200H], A

❖ A common classification is by architectural complexity

➢ Complex Instruction Set Computer (CISC)
▪ Has many specialized instructions, some of which may only
be rarely used in practical programs.
➢ Reduced Instruction Set Computer (RISC)
❖ Simplifies the processor by efficiently implementing only the
instructions that are frequently used in programs

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CPU design philosophies
CISC RISC
Complex Instruction Set Computer Reduced Instruction Set Computer
Less and easier work to translate Compiler
Less RAM is required to store
the program RAM

Variable Instruction length Fixed (1 word)

Variable Execution time (Clks) Fixed

Pipeline Easier and more efficient

Design cost, complexity Simpler, lower cost

Transistors fewer

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Expressing a Computer’s Performance

𝑡𝑖𝑚𝑒 𝑖𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛𝑠 𝑐𝑦𝑐𝑙𝑒𝑠 𝑡𝑖𝑚𝑒

= × ×
𝑝𝑟𝑜𝑔𝑟𝑎𝑚 𝑝𝑟𝑜𝑔𝑟𝑎𝑚 𝑖𝑛𝑠𝑡𝑟𝑢𝑐𝑡𝑖𝑜𝑛 𝑐𝑦𝑐𝑙𝑒

The CISC approach attempts to minimize the number of instructions per

program, sacrificing the number of cycles per instruction.

RISC does the opposite, reducing the cycles per instruction at the cost of the
number of instructions per program.

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Performance Measurement Units

❖ Instruction Per Seconds (IPS)

➢ A measure of a computer's processor speed
➢ MIPS: million instructions per second

❖ Floating Point Operations Per Second (FLOPS)

➢ A measure of computer performance
➢ Useful in fields of scientific computations that require floating-point
calculations
➢ Prevalent in the performance measurement of supercomputers (HPC)
➢ MFLOPS, GFLOPS, TFLOPS, …

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