1264 Theperformance of injectionlocked IMPATT oscillators under transient ionizing radiation, IEEE Trans. Nucl. Sci.

(Short Paper), vol. NS-20, pp. 388-391, Dec. 1973. 1481 P. T. Greiling and J. Clark, T r a n s i e n t radiation effects in GaAs IMPATT diodes, R o c . IEEE (Lett.), 60, 753-754, vol. pp. June 1972. 1471

PROCEEDINGS OF THE IEEE, VOL. 62, NO. 9, SEPTEMBER 1974

Transient:
[ 51 1 J. M. Borrego, R. J. Gutmann, H. J . Geipel, and S. K. Ghandhi, Operation TRAPATT of oscillators under transient ionizing radiationconditions, IEEETrans. Nucl.Sci., vol.NS-20,pp. 144-148, Dec. 1973.

TRAPAZT Radiation Effects Permanent: 1491 E. P. EerNisseand R. J. Chaffin,Designofneutronradiation tolerant efficiency high microwave avalanche sources diode (TRAPATToscillators), IEEE Trans. Nucl.Sci., vol. N S 1 7 , pp. 227-229, Dec. 1970. [SO]R. J. Chaffin, E. P. EerNisse,and J. A. Hood,Theeffectof neutron irradiation on the TRAPATT diode,Proc.IEEE (Lett.), Vol. 57, pp. 2063-2064, NOV. 1969.

BARITT Radiation Effects

Permanent and Transient: 1521 R. J. Chaffin, Permanent transient and radiation effects in R o c . IEEE Annu.Conf. BARITT microwave oscillators, in Nucl. and Radiation Effects,pp. 239-242, 1972. Tmnsien t: 1531 J. M. Borrego, R. J. Gutmann, and J. Narain, The performance to be of BARITT diodes transient with ionizing radiation, published.

devices (MIS) tend to be limited by the ionization produced, since ionization leads to charge buildup in insulator layers and of semiconductordwice performmce. D m techniques for minimizing the radiationinduced degradationare evaluated. Emphrsis is placed to an increase in surface-state density at insulatorsemiconducon the effects of neutron-produceddisplacement damage on dwices tor interface. The characteristics of bulkeffect devices are usually degraded by displacement damage, since this damage can and on the effects of ionizing d u t i o n on MOS structures. Transient ionization effects pad circuit latchup are considered. Thepresent de significantlydecreasecarrier concentration, carriermobility, gree of undeastnnding of radiation effects m silicon devices is and carrier lifetime. The carrier concentration is reduced by summlrized. is loweredbyscattering compensatingcenters,themobility centers, and the lifetime decreased by recombination centers. is INTRODUCTION The nature of the changes in these bulk parameters by the HEN high-energy radiation is incident on a semicon- displacement damage depends strongly on the typeof incident ductor device, energy is deposited in the semiconduc- radiation and also on material parameters and irradiation contor via two mechanisms, atomic collisions and elec- ditions. The incident radiation is important because it determinesthenature of theprimarydefectsintroduced.For tronic ionization. relative The importance of these two 6oCo gamma or example,the initially produceddefectfor mechanisms in asemiconductorstructuredependsbothon the type of radiation and the nature of the device. For elec- electron irradiation is quite simple, probably a single displaced On the other hand, tron, proton, and y a y environments, most of the deposited lattice atom and its associated vacancy. energy goes into ionization processes, i.e., excitation and pair irradiation with fast neutrons is thought to produce regions of several hundred disproduction. For fast-neutron environments, on the other hand, damage orclusters,eachcontaining placed atoms. Since the defects, as initially produced, are not a large fraction of the deposited energy (up to approximately thermally stable in the temperature range where semiconductor 50 percent) resultsdirectlyinatomicdisplacementdamage devices are normally operated, it is also necessary to underfromcollisions.Theradiation-producedchanges in a device, the processes. Material factors and for any environment, depend on its relative sensitivity to ion- stand defect-reordering as resistivity, impuritycontent, izationandtobulkdisplacement damage. Surfacecontrolled irradiationconditionssuch irradiation temperature, and minoritycarrier injection level are quite important, in influencing not only the reordering proManuscriptreceivedMarch 15, 1974. This work was supportedby cesses but also thebasic nature of the final damage. the US. Atomic Energy Commission. This paperhasbeendividedintothreesections.First,, we The authors are with the Sandia Laboratories, Albuquerque, N. Mex. examinepresentlyusedsemiconductor devices andidentify 871 15.

A h c t -The radiation-induced degradation of semiconductor materht pmmetgs is miewed. These results are related to the degradation

GREGORY AND GWYN: RADIATION EFFECTS ON SEMICONDUCTOR DEVICES

1265

primary and secondary radiation failure modes for each type. Secondly, we explore in detail typical effects of displacement damage in devices. We have chosen to discuss only fast-neutron displacement effects, for two reasons: 1) the effects discussed represent real problems,sincedisplacement damage severely degrades device performance infast neutronenvironments; 2) the effects of fast neutron displacement damage on device characteristicsarerepresentative of displacement damage in general. The effects of carrier removal (compensation), carrier trapping, and lifetime degradation on device performance are considered in detail. A particularly important example of defect reordering, namely transient annealing of neutron damage, is discussed. The third topic considers ionization effects. We discuss the permanent effects of ionization on MOS devices and I and Cs also transient effects. The effects of radiation-produced photocurrentandcompensationtechniquesare presented. The effect of latchup due to parasitic p-n-p-n action in an intetransient is examined in grated circuit during a radiation detail for CMOS circuits. Finally, the current status of understanding of damage mechanisms and device hardness is summarized.

TABLE I
PRIMARY AND

SECONDARY RADIATION FAILURE MECHANISMS FOR SEMICONDUCTOR DEVICES

t
DEVICE TYPE
ScmiconductarResistors

I I I mide Carkr charqe anb R e m l m d mobility s u r f a c e Lletime Trsping DegrMi affects Cqadatii

Failure Mechanisms

I I

Diodcs I L. forward current, photocurrent1

l p l s I
I

I s 1

MiQBulk Oxillrbrs IGunn. L S N

I p I s I I

FAILURE MECHANISMS IN DEVICES

In Table I, we have listed the most important modem semiconductor devices, and have attempted to identify thedegradation mechanisms for device failure [ 11.Thetable uses the symbols P and S to denote the primary and secondary failure mechanisms. One will note that devices which depend on resistivity or majority carrier concentration for their operation fail predominantlydueto carrierremoval or trapping.This includes semiconductor resistors,diodes, (certain characteristics),solid-state microwave sources, andfieldeffect devices. Devices or device characteristics based on minority-camer injection degrade due to lifetime effects. This category includes the forward and reverse currents and photocurrents of diodes, most characteristics of bipolar transistors, and most switching and optoelectronic-device properties. Surfacecontrolled devices, such as, MIS fieldeffect transistors and capacitors fail primarily because of oxidecharge buildup and surface effects. Radiation-produced changes in lifetime, carrier concentration, and mobility are the result of lattice atom displacements (atomic disorder), whereas the oxide and surface effects are caused by the ionization dose received. In addition to the permanent degradationmechanisms listed in Table I, ionizing radiation produces electron-hole pairs in materials during theexposure.For mixed nuclear environments, the ionization produced by neutrons is much less than that produced by X- and y r a y photons. Carriers produced in device depletion regions, or within a diffusion length of these regions, can producephotocurrentsatthe device terminals. These photocurrents can cause large transients in linear circuits and can cause errors in the information stored by logic circuits.

Fig. 1. Calculated parameter degradation for 1 51 crn n-type silicon near room temperature. p/po fromStein dataat 280 K, n/no from Stein andGerethdataat 270 K, r/ro from Gregorydataat 300 K. 6 is in units of neutronslcm (SPR, E > 10 keV) [2]-[4].

FAST-NEUTRON EFFECTS
The most important effects of fast neutrons on semiconductor materials is to alter thebulk electrical properties. The neutron sensitivity of mobility, carrier concentration, and minoritycarrier lifetime is plotted in Fig. 1 for 1 52 * cm silicon. The mobilitydata [ 2 ] showthat degradation doesnot become severe until the neutron fluence (&) exceeds 10 neutron/ cm. At this fluence the bulkcarrier concentration has floating-zone (FZ) and dropped essentially to zeroinboth

crucible-grown (CG)silicon. The observed lifetime degradation is quite complex. The fluence at which degradation becomes severe depends both on the initial lifetime 70 and the measurement injection level. The range of curves for 7/70 against r#~,, corresponds approximately to the range of lifetime values and injection conditions found in typical devices. The low-injection (LI)curve for 70 = 1 U 6 s would typify the behavior in solar cells at low injection. Here the lifetime has decreased by 50 percent at &, = 5 X 10 neutron/cm. At the other extreme, the high-injection (HI) curve for r0 = 1 0 * s @ght typify the behavior observed in a modem, golddoped transistor. In this case,afluence of approximately 5 X 10 neutron/cm is required for a SO-percent lifetime reduction. As will be shown later, however, the effects of radiation on a modem, narrow-base bipolar transistor are quite complex and can only generally be related to a specific lifetime value.

PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

Fig. 2. Degradation ofcutoff frequency /s withneutronfluence HP-3582 1E (phosphorous emitter).

for

'
Carrier Removal in Bulk Regions As Fig. 1 indicates, carrier removal and lifetime degradation are the two limiting effects in most neutron-irradiated silicon devices. Examples of the effects of carrier removal in devices are the increase in saturation voltage in power bipolar transistors [ 51 and the falloff in fs' in microwave transistors [ 61. Both effects occur because of an increase in the unrnodulated series collector resistance due to carrier removal in the lightly doped collector region. Fig. 2 illustrates theexperimentally observed degradation in fs for a commercial silicon microwave device (HP-3582 1E). Upon neutron irradiation, a reduction occurs in & which is most severe at low values of collectoremitter bias. The increased series collector resistance, due to carrier removal, reduces the collector-base reverse bias at low values of V, , , and base widening intothe collector (Kirk effect) occurs. This increases the base charge storage after radiation, hence reduces f , . At the higher values of VCE (25 V), thete is sufficient collector-base reverse bias at this current level to prevent base widening until much higher irradiation levels. Simhar effects have been observed in microwave-power devices operated in class C circuits [ 71. Base widening due to neutron irradiation produces a nonlinear relationship between the emitter and collector current. This distorts the collector current waveform and leads to a decrease inoutputpower afterirradiation.The change is directly attributable to the increased collector resistance produced by carrier removal. As a result, the operating point for device operation shifts with irradiation. The effect is observed as a detuning of the circuit from the designed operating frequency.

BULK DAfA INAPPROPRIATE

BULK DATA OK

Fig. 3. Trap occupancy versus position in the spacexharge region of a

p+-njunction.

"1

10

I&

FREQUENCY (Hz)

12

14 0

1 2

lo6

107

Fig. 4. Small-signal capacitance against frequency for a neutron-irradiated p+-n junctionat zero bias.

the defect occupancy is a function of both x and t (or frequency f for small-signal operation). Since the width of the space-charge regonafterirradiationdependsonthe carrier removal in t i region and not in the bulk, device parameters hs which depend on the space-charge region width will exhibit degradationcharacteristics different from bulkmaterial. For example,thebreakdown voltage andlow-frequency capacitance of the p*-n junction in Fig. 3 will both change less with irradiation than indicated by bulk data if the added compenspace-charge region. sating levels are void of electrons in the When a small-signal alternating bias is applied to the reversespacebiased junctionin Fig.3, thedefects(traps)atthe Carrier-Trapping Effects in Device Space-Charge Regions charge-region edge will alternately chargeand discharge. At To understand the effects of radiation-produced defects in high frequencies, the capture andemission of carriers from the device space-charge regions, it is first necessary to consider the trapping centers will be unable to follow the applied signal and steady-state or dceffects. Consider the p*-n junction shown in the device response will become frequency dependent. PreviFig. 3, where a single deep acceptor is present with a level at Et. ous papers [ 9 ] -[ 141 have discussed such effects in reverseAlthough one or more isolated levels may not adequately debiased junctions, primarily for various types of chemically inscribe the damage produced by neutron irradiation, a model duced traps. The primary effect of such traps is to produce a based on discrete levels is nevertheless useful in understanding frequency dependency in the small-signal capacitance and conthe effects which occurinthemorecomplexsituation. As ductance of the junction. Typical results [ 151 for the capaciFig. .3. jllugtrates, bulkcarrier removal data are appropriate in tance of a neutron-irradiated junction are shown in Fig. 4. Bethe neutral n-type region of this structure butcan be incorrect fore irradiation the capacitance is essentially independent of in the space-charge region [ 81. Within the space-charge region frequency, up to lo' Hz. However, after irradiation the capacitanceat high frequencies is much lower thanthe low-frequency value, since theaddedtrapscannotrespondatthe Ifs is the frequency at which the forward-transfer ratio IS, I I becomes higher frequencies. in other words, the effective space-chare unity (0 dB).

GREGORY AND GWYN: RADIATION EFFECTS ON SEMICONDUCTOR

DEVICES
1.0
I
I

1267

E 0.8a

.-

"

t
Frequency

:I[
0.2
0.0 0.5

,
Frequency

. i

"

- Hz Fig. 5 . Calculated and experimental capacitance at zero dc voltage bias after a neutron fluence of 4.4 X lo1' neuhon/cm2 E > 10 keV.

density at the edge of the space-charge region is smaller at hgh frequencies; hence, the junction width modulation is greater (or capacitancesmaller) for a given applied AV. As Fig. 4 shows, the capacitance-frequencycharacteristics of neutronirradiated p*-n junctions are characteristic of two energy levels, i.e., the low-temperature data indicates two distinct steps in the capacitance-frequency characteristic. Exact small-signal calculations [ 161 have been performed using values for the two levels obtained byGregory and by Naik and Oldham [ 81. Fig. 5 shows the calculated and experimental data for alightly doped n-typediode. The low- and high-frequency capacitance calculated using a trap density of 1.5 X 10'' cm-' agree almost identically with the experimental data. Although the shapes of the curves are similar, the transitioninthe calculatedcurve is moreabruptthanthe experimental data. This lack of agreement at low frequencies suggests that another deeplevel may be present which accounts for a change of about 10 percent in the capacitance characteristic. Such a level would probably have escaped detection in the experiments cited because of the uncertainties involved in determining theenergy-level values. The calculated conductance shown in Fig. 5 is basically a function of recombination in the spacecharge region of the device. For lowfrequencies, theconductance is low,corresponding to high impedance and small recombination in the relatively narrow space-charge region. At moderatefrequencies, theconductance increases because of the increase in average spacecharge-region width. For very-high frequencies, the effective conductance of the device increases rapidly with frequency, since the total conductance of a diode is proportional to the sum of the junction conductance and term cona taining the product of frequency squared and the series resistance of the device [ 171. These calculations also yield information concerning the changes in free and trapped charge distributions in the vicinity of the junction. Typical results are shown in Fig. 6 . For low frequencies, the incremental change in trapped charge in the space-charge region is quite large, indicating that the trapoccupancy follows the applied signal. At high frequencies, the incremental change in trapped charge is much less, since the trap occupancy cannot follow the applied signal, and the capacitance is determined entirely by the changes in the free-carrier distributions at the edge of the now wider space-charge region. The results of the calculations indicatethatthetrapping centers produced by neutron irradiation respond in the fre-

~ i s t a n c e microns Fig. 6. Incremental trapped and free charge in a p+-n junction at low and high frequencies. Two-level trapping model from Gregory et el. [ S ] for neutron-irradiated n-type silicon.

quency range between lo3 and lo6 Hz. Based on this result, the small-signal response of irradiated bipolar transistors can be predicted. For low frequencies,carrier capture and emission occur in a time much less than the period of the applied signal andthe small-signal response is determined primarily by the degradation in the dc characteristics of the device. At microwave frequencies, the trapped charge cannot follow the applied signal andthefrequency response is determinedby changes in device parameters produced by carrier removal and the increased recombination. At intermediate frequencies, the change in lifetime, carrier removal, and the response of the trappingcenters with applied signal can influencethe frequency response of the device.

Lifetime Effectsin Devices Most lifetime studies in irradiated samples bulk are performed by either photodecay [ 181 or steady-state photoconductivity techniques [ 191.The results of thesestudies are valuable, but can only infrequently be applied directly in device structures to predict radiation effects. Thephotodecay studies are frequently hampered by trapping effects andsteadystatephotoconductivity is difficult to employ in materials doped to typical device levels. The lifetimecurves in Fig. 1 are not true bulkresults but are obtained from diffusion-length measurements in solar cells. These measurements are steadystate minority carrier measurements; hence, transientinjectionlevel changes and trapping effects are avoided 141. This and other lifetime data from bulk and device studies provide a basis for device hardness calculations; however, incorporating such data into the physics of a modem transistor is a major problem. To appreciate this problem one needs to understand certain features of a bipolar transistor. In basic terms this device is a three-terminal structure where a small base current ( z b ) is utilized tomodulate a larger collector current (I,). Thedc gain (common emitter) isdefined simply as ~ F = IC/&. E The displacement damage produced by neutron irradiation results in recombination centers throughout a bipolar transistor which cause the base current to increase and the device gain to decrease. For an n-p-n structure, the total base current in a device can be written as

1268

PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

In t i equation, the total base current is seen to consist of hs the recombination occurring in all the device regions. These terms are: i) recombination in the neutral emitter (the emitter contribution to base current includes all of the back-injection current from the base into the emitter); ii) recombination in i i the emitter-base spacecharge region; i )recombination in the neutral base region; iv) recombination in the collector region; T is the lifeand v) surface recombination. In this equation, time (asa function of injection level) ineach region. Past efforts at improving device hardness have concentrated on rei i ducing the base recombination term i )by narrowing the base region. Concomitantly, the changein device properties with irradiation has been minimized by using gold doping to reduce the preirradiation lifetime. However, recent studies [ 201 -[ 231 have shown that the first two terms in this expression are normally dominant in modem, narrow-base devices. It was recognized that future improvements in device hardness must be based on reducing these terms. In order to effect these improvements in device hardness, a more detailed understanding is required of the neutron degradation in the different regions. Two prerequisites exist to enable such studies. First, alifetime model is needed forthe neutron damage, to predict the proper recombination values in the neutralp- and n-type regions and in spacecharge regions. The "hybrid" recombination model' [201 although almost totally empirical, has proven to be adequate, and accurate, in most devices. Second, the boundariesbetween thedifferent regions in modern devices are so imprecise, owing to the small dimensions and large dopinggradients, that accurate closedformanalyticsolutionsarenot achievable. This means that numerical solutions of the equationsgoverning carrier flow inside the device are an absolute necessity. The numerical techniques to obtain such solutions 1241, have been extended to treat neutron damage in modern devices [ 21 ] . Calculations were performed [ 2 11 to determine quantitatively the importance of the various regions of a typical submicrometer base width diffused phosphorus emitter transistor. The sum of the neutral emitter region and spacecharge region recombination was seen to account for more than 85 percent of the total base current.Theneutral base region thuscontributed less than 15 percent of the base current. Distance The calculatedresults of employingamore-nearly-abrupt profile for an emitter junction are shown in Fig. 7, where the recombination rate has been plotted versus position for the two device profiles shown in the inset of Fig. 7. As noted, the collector current density,base-region doping, and collector bias conditions are identical for the two profiles. The calculations indicate the base current and hence recombination for thediffusedprofilecanbereducedby approximately one-half by employing an abrupt emitter profile. Since a shallow arsenic diffusion approximates an abrupt profile in silicon, due to the nonlinear arsenic diffusionconstant,such devices were explored both theoretically andexperimentally. The doping profiles for two units in this study, designated AS500 and P700 (in this designation the prefix is the emitter dopant and the attached number is the approximate base width in angstroms), are shown in Fig. 8. The significantdifference betweenthe
'The hybtid recombination model assumes a p o w e r law relationship between effective minority carrier lifetime and the carrier injection ratio. This model uses experimental lifetime data in the neutral regions of the device and combinesexperimentaldatawith known physical informationaboutneutron-produced damage to modelrecombination in device sprcecharge regions.

I
1.0

2.0

3.0

4.0

I I

Distance (Microns)

Fig. 7. Recombination versus position in the emitter

and base regions.

(Microns)

Distance

(Microns1

(a) Fig. 8. Dopingprofiiesfor two experimentalshallowemitterdevices. (a) Arsenic emitter (ASSOO). (b) Phosphorous emitter (P700).

two devices is the shape of the emitter profile. The impurity gradient in the vicinity of the emitter base junction is much steeper for thearsenic unit than for the phosphorus device. The effects of the profile variation on the device characteristics can be seen by examining the calculated recombination as a function of position in Fig. 9. The peak recombination rate occurs in the spacecharge region and is essentially identical for the two devices. The important difference in recombination rate occurs in the emitter region of the devices. By comparing relative areas in Fig. 9, it can be seen that the emitter region recombination is larger in the phosphorusdevice than in the arsenicemitter device. These devices were irradiated in steps at the Sandia Pulse Reactor (SPRII) facility to a total fluence level in excess of 1OI6 neu!xon/cm2 ( E > 10 keV). The device gain does not degrade substantially in either device below a neutron fluence level of 10'' neutron/cm2. After a neutron fluence of 10l6 neutron/cm', the arsenic device has a gain of 11, while

GREGORY AND GWYN: RADIATION EFFECTS

I P 1026

ON SEMICONDUCTOR DEVICES

1269

Arsenic emitter

t
i Distance (Microns) Distance IMicronrl
0

(a)

(6)

Fig. 9. Recombinationrate versus positionforthe two experimental devices. (a) Arsenic emitter (AS500). (b) Phosphorous emitter (P700).

, Yc

$7
5
E

F .11. Typical transient annealing curve for bipolar transistor followi

ingexposure to neutronpulse.Annealingfactor (AF)is defined 88 the ratio o f the damage, at MY time after exposure, to the final stable damage.

creases its sensitivity to neutronirradiation, as discussed in [ 21 1. The wider base regions and lower emitter-base junction impuritygradientsin the p700 andtheAS1200 devices increases both the neutral region and space-charge region recombination components. Both the experimental and theoretical results illustrate the advantages achieved using the shallow As emitter profile.

Transient Annealing Inanuclearradiationenvironment,onefrequentlymust operate a semiconductor device soon after exposure to a pulse [ 251 -[ 3 11 have shown that of neutrons.Previousstudies when this occurs the damageto device parameters canbe much moresevere than wouldbepredictedbased on passive longterm exposure data. This is illustrated in Fig. 1 1 [ 3 11 where both the current gain (hfe) and inverse current gain ( l/hfe) for Fig. 10. Neutron fluence required to reduce hFE t o unity versusbase a bipolar transistor are plotted as a function of time following width. an exposure to a pulse of neutrons at time t o . As the inset shows,alargedecreaseoccurs in the device gain during the the phosphorus device has a gain of 7. For comparison, ahigh- neutron pulse. However, the gain subsequently increases to a frequency commercial device, the 2N918, typically has a gain stable value a few seconds after exposure. the of 10 after a neutron fluence of 1 X 10 neutronlcm, an orThe quantity in Fig. 11 termed the annealing factor, in realder of magnitude lower. These devices (AS500 and P700) are ity a damage magnification factor, allows long-term data to be substantially more tolerant than existing commercial devices. derated such that it can be applied at any given time after exThe theoretical and experimental results [2 1 I are summaposure to a neutron pulse. Detailed measurements have been rized in Fig. 10 in aplot of theneutronfluenceforunity reported [ 3 1] which explore the dependence of neutron damcurrent gain against device base width. For conventional deep age annealing on dopanttype and concentration,operating phosphorusemitter devices, with a fixed number of base im- temperature,andinjection level. Thesestudiesshowrather purities (NB) calculations indicate that an optimum base conclusively that, near room temperature, the primary factor the width occurs, below which emitter region recombination in- in determiningannealingrate is theelectrondensity in the creases significantly. For the narrow-base devices with moreactiveregion of adevice. For situations where the electron nearly-abrupt shallow emitters, no optimum base width occurs, density is quite small, such as in a transistor base-emitter spacesince the emitter region recombination does not show the same charge region, or in the neutral-base region of a passive n-p-n rapidincreasewithdecreasingbase width. The experimental transistor, the recovery after neutron irradiation can be quite data (closed symbols) are in excellent agreement with the cal- slow. In ti case, large values of annealing factor can persist hs AS500, P700, and for several seconds after exposure. culated results (open symbols) the for AS 1200 narrow-base devices and are consistent with the calcuThe transient annealing observed in a wide variety of semilationsforthe wide-basedevices. The largerintegratedbase conductor devices is quite consistent when electron density is in doping (NB) the AS400 device than the AS500 device in- assumed to be themajor drivingforce for annealing.This

1270

PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

' 7

studies [33]-[36] have shown that ionizing radiation causes failure of silicon devices due to two mechanisms: 1) trapped charge buildup in the silicon dioxide passivation layer and 2) an increase in the density of surface states at theSi-SiOz interface. Both of these mechanisms can be important in determining ionization effects in typical surface-controlled devices such as MOSFET's and in bulk devices such as planar bipolar transistors.

Permanent Effects
In a MOS transistor the dominant effect the trapped-oxide of charge is to produce semi-permanent shifts in the VGS-IDS characteristics for the device, by altering the device threshold voltage. . Past studies in the Si-SiOz system have shown that the polarity of the trapped-oxide charge is positive (trapped holes) and that its location in the SiOz varies with the applied gate bias during irradiation. Negative gate-substrate bias results in a positive charge distribution near the gate electrode, while positive gate-substrate bias producesthedistribution near the substrate. The latter bias condition results in greater shift in threshold voltage, since a larger applied voltage is requiredin this case to return the MOS structure to flatband conditions (zero field at the silicon surface). Based on the geometrical location of the trapped-charge, pchannel devices utilizing negative values of gate voltage tend to be less sensitive to ionizing radiation than nchannel devices. Several models have beenproposed to explain the charge buildup observed in the oxide after exposure to ionizing radiation. Basically, themodels fall into two categories [35] ; intrinsic models based on bonding defects in pure SiOz and extrinsic models based on motion and trapping by impurities. Experimental results indicate the absolute magnitude of the trapped-chargedensity depends greatly on the details of the processing employed. The dependence of charge trapping on processing can be related to specific characteristics of either model. Recent work by Aubuchon [331 and Hughes [341 have shown that both optimized oxidation growthcycles and oxide cleanliness are important in increasing MOS radiation tolerance. grown In particular Aubuchon [ 331 has shown that dry oxides near 1000C can produce very tolerant devices while the work of Hughes [34] has shown that the immobile sodium present in contaminated oxides may lead to a much lower radiation tolerance than is characteristic of a similar, but clean, oxide. Recent studies [37] have shown that the sodium contamination in the oxide can be reduced by using chlorine to preclean furnacetubesprior to oxidegrowth. Although the chlorine has a beneficial cleaning effect, chlorine incorporated into the oxide during the growth phasecancausea reduction in the radiation hardness of the oxide layer. Recent studies by Burghard and Gwyn [36] of commercial andhardenedlaboratory processes for CMOS, a technology which employs both p and nchannel transistors have shown that certain commercial processes yield devices which are tolerant to near lo6 rad Si, while others fail substantially below 10' rad Si. The hardened laboratory processes are generally moretolerant, witha few exceptions. The results of their extensive evaluation have been reproduced in Table 11. The processes have been grouped as radiation-tolerant commercial, intolerant commercial and hardened laboratory. The radiation levels at failure are shown for both bias conditions for a CMOS inverter (input high (+lo V) and input low V ) (0 ) , for the four possible modes of failure shown in the table. The

ao

Fig. 12. Nomograph for prediction of annealing factors, at room tcmperature. Theappropriateannealingfactor is indicatedattheintersection of the annealing factor curve and a straight line drawn from VBE and the time after the neutron burst.

VDD(lQ)

Substrate (W

N-Source

N-WOL 1 4

CAMOM
"SS'A

(a)

(b)

Fig. 13. Equivalentcircuitsfor SCR structures present on CD4007. (a) For worst-case bias. (b) For normal inverter bias.

unique dependence onelectron density hasbeenutilizedto generate thenomograph [32] in Fig. 12, whichcanbe employed to predict the annealing factor in a device at a given time after exposure,simply by knowing the electron density in the device active region. In high-frequency transistors, such as those we discussed, the post-irradiation gain is determined by recombination in the base-emitter space-charge region [21I . Hence the injected electron density at the centerof the spacecharge region is the limiting parameter. Since this density is a unique function of V, the annealing factor for a high-fre, , quency transistor can be predicted merely by using the measured VBE at the desired operating point. Although this estimate is not exact, it is within k10 percent over the range of Fig. 12, hence, quite adequate for design purposes. As noted from the figure, the annealing factor is very large for devices which are turned off during or immediately after the exposure or for devices required to function at early times after exposure.

IONIZATIONEFFECTS (7) The radiation-induced ionization produced in a semiconductor device can produce failure modes distinct from those discussed in the previous section for neutron damage. Previous

GREGORY AND GWYN: RADIATION EFFECTS ON SEMICONDUCTOR DEVICES TABLE I1 APPROXIMATE CIRCUIT FAILURE LEVELS (RAD SI)

1271

Mode 4

Failure

hknufacturer/Ftocess Tolerant Commercial

A/Commercial

H& i
>lo7
-106

Low

High

Low

High

Low

High

Low

hput Voltage

BICommercial (Lot 1) (Lot 2) Intolerant Commercial C/Commercial D/Commercial E/Advanced development F/CoMnercial
G/ColMlercial

> lo6

- > >
-lo5 >lo5
<lo5
-lo5

lo6 lo7 lo6 lo6 <lo7 >lo5

H/commercial Hardened Lab. Processes

I/SiO2 Ja/Si02Cr K/SiO*-Al

<los <lo5 <lo5 > lo5 <losb <lo5

< lo5 <lo5 <lo5

<losb

<lo5 -lo5
<lo5 <lo5

-lo5

< 10:b
-10

<lo5 <los
<los
>lo7

>lo7

>lo7 >lo7 >lo7

-lo7 -lo5 > lo7 > lo7 -lo7 > l o 7

1) Fded to switch states (90 percent). 2) Delay times increased a factor of 4 ( e.ue qas rd 3) Leakage current i n a e above 10 A. n esd 4) immunity [ ):::( ~h for Vout =

at SO-percent level).

~00p.I.

allhe prerad1 n threshold voltages were much higher for manufacturer J (-45 V) than other manufacturers. b m a g e paths other than transistor channels are most important.

basic conclusion of their study is that by selecting particular volume for the reverse-biased collector-base junction is usually commercial processes, CMOS circuitscanbe obtained which much larger than the volume of the emitter-base spacecharge will operateafterexposure to ionizing radiation doses near region, the dominant transient effect is the creation of photolo6 rad. current by the collector-base junction [ 391 Unless the photoAlthough the charge trapped in the oxide region produces an current is removed by the base terminal, the current injected essentially permanent shift in the threshold voltage, some tran- into thebase region causes the baseemitter junction become to sient annealing of the charge occurs immediately after the ion- forward biased. In this manner,the primary collector-base izing radiationexposure. This annealing is analogous to the junction photocurrent can be effectively amplified by the detransient annealing occurring in bipolar transistors after a neu- vice gain to produce a larger, longer duration secondary photoMOS transistor characteristics current. In a digital IC such photocurrents will cause logic failtron exposure, in that the change with time. The threshold-voltage shift is largest imme- ure. In linear ICs, analog errors will result. To minimize the diately after the exposure and recovers to a lower value within circuit effects of collector-junction photocurrents in bipolar several seconds. The results of a study performed by Habing ICs, several techniques areemployed.Secondaryphotocurand Shafer [38] on theroom-temperature annealing of the rents are avoided by employing compensating diode junctions trapped charge in a CMOS inverter indicates the threshold-volt- to shunt the collector-base photocurrent away from the device age recovery is essentially logarithmic with time and that the emitter-base junction [ 4 0 ] . Thin-fiim metallic resistors are time required to reach a steady-state value may be as long as employed both to increase the transient levels at which the 1000 s. The study also indicated that the gate bias after the circuits can be operated and to prevent permanent failure due irradiation exposure can substantially influence the annealing to excessive supply currents which could flow at higher dose rates. characteristics. Furthermore, a radiation enhancedannealing .Photocurrents can produce semiconductorcontrolled rectican occur if the device remains in a low-intensity ionizing radifier(SCR) action inparasitic four layer pn-p-nor n-p-n-p initial exposure. ation environment after the paths in bipolar ICs. Once a parasitic SCR has been triggered Transient Radiation Effects a low resistance path is produced between two regions of the The final component of the nuclear environment to be con- circuit, usually between the power supply and ground. Circuit sidered is the transient environment. Most systems have two latchup occurs if t i low resistance path remains after the hs transient requirements, one for undisturbed operation and one radiation pulse. The Occurrence of circuit latchup in ICs can for survival. The survival dose rate is usually several orders of cause long lasting, perhaps catastrophic, failure in certain magnitude higher than the level causing transient upset. Opera- bipolar and MOS ICs (41 1. Although there are several techtion through a transient is made difficultby the photocurniques which can be employed to eliminate latchup, the most rents and conductivity modulation produced by the radiation common one at present in bipolar circuits is to use dielectric of isolation to isolate electrically the different circuit elements, pulse. The photocurrent producedthe by collection electron-hole pairs created in the depletion regions of a device thus preventing theformation of undesired latchuppaths (promptphotocurrent) essentiallyfollows theshape of the during transient radiation exposure. ionization pulse. A delayed component of photocurrent is Recent studies by Gregory and Shafer [42] on junction-isoproduced by the diffusion of carriers from bulk regions of the lated CMOS ICs have identified the p-n-p-n paths on these cirFig. 13,the equivalent device into the space-charge regions. Since the depletion region cuits which canlead to latchup.In

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PROCEEDINGS OF THE IEEE, SEPTEMBER 1974

(b)

Fii. 14. SCR characteristics for the RCA CD4007A CMOSIC. (a) For worst-casebias conditions.(b) For normalinverterbias conditions.

circuits of SCR structures present on a CMOS circuit (CD4007A) for 1) worst-case bias and 2) normal inverter bias conditions are shown. Worst-case bias is that where the potential SCRs aredeliberately biased to encourage latchup. The same essential p-n-p-n structures are active in both bias situations; however, for the normal bias case, the forward bias on the two emitter junctions (gates) must be provided by lateral voltage drops due to photocurrent (or SCR current after turnon) flowing laterally through the substrate and pwell resistances, R, and R . For this reason, the active SCR in case , 2) is less sensitive and has a higher holding current. Latchup of the 4007 circuit can be induced electrically for either of the bias conditions and also occurs if the circuit is exposed to an appropriate radiation transient ( lo9 rad/$. Fig. 14 shows the observed SCR characteristics for the 4007 for these two bias conditions. Although these studies demonstrate that SCR action is prevalent in CMOS circuits, thereare several techniques which can be employed to eliminate latchup. The prbposed technique to be employed in future design and fabrication can be grouped in three categories: 1) variations in materialparameters, 2) variations in circuit layout,and 3) variations in CMOS processing. Detailed suggestions are given in [421.

SUMMARYAND CONCLUSIONS
The previous sections of this paper have presented an overview of radiation effects in semiconductor devices and have discussed several important effects in considerabledetail. In this summary the goal is to attach labels to the effects discussed, to indicate thedegree to which they presently are characterized and understood. Three categories have been chosen to represent these different levels of understanding. These categories are: 1) effects which are both characterized and understood, 2) effects which are characterized but not understood, and 3) effects which are neither characterized or understood.

Transient ionization effects and the mechanisms of point defectproductionand annealing belong in category l).It is fairly straightforward to calculate the hole-electron pair production due to a pulse of ionization and most of the effects of such ionization have been explored and characterized. Photocurrents in transistors and ICs can be predicted and, to some extent, compensation techniques can be used to minimize the photocurrent effects in circuits. Circuit latchup effects due to ionization-activatedparasitic devices has been exploredand the mystery is now removed. The intrinsic point defects produced by high energy electron or y-ray irradiation have been identified and the interactions of these primary defects with impurities such as P, B, As, Sb, 0, C, and Li to form defectimpurity complexes are understood [ 3 1] . Into category 2), we can place the area of fast-neutron damage. Empiricalmodelsexist for the permanent and transient effects of neutron irradiation of lifetime, mobility, and carrier concentration. These models allow prediction of neutron effects ina given device structure; however, the supporting models and theory are presently incomplete and inadequate. As mentioned earlier, it is generallyaccepted thatneutron damage occurs inclusters. Thisfact greatlycomplicates the modeling of neutron damage on the above parameters. The clustered nature of the damage produces strong dependences of postirradiation lifetime and carrier concentration on injection level. Several models have been developed to characterize these dependences but none have yet been completely satisfactory. Similarly, models have been created to explain the unique character of the transient annealing observed after neutron irradiation, but none have beenproven to be uniquely as valid. The area of neutron damage can be summarized follows. Theeffectsonsemiconductor parametersare wellcharacterizedand data exists to allow the device or circuit designer to predict the effects in his structures. Most of the differences between neutron damage and point-defect behavior have been assigned to the cluster nature of the neutron damage and cluster models have been developed which are qualitatively successful inexplaining most of the observed effects. However, unique quantitative models do not yetexist. The topic of charge trapping in insulators and fast surfacestate creation at insulator-semiconductor interfaces definitely belongs in category 3). These effects depend strongly on processing and the quality of the materials. Some of the important parameters such as oxide-growth temperature, silicon orientation, and importance of cleanliness during device fabrication have been determined, however, all aspects of these dependences are not yet known. The theoretical models which have been advanced to explain the various observed effects are somewhat speculative. This area is presently receiving considerable attention and our understandingshould advance rapidly in the near future. The understanding of the effects of radiation on semiconductor device properties has increased tremendouslyduring the past few years. This knowledge along with improved fabrication techniques have essentially removed the limitations in producing radiation hard bipolar devices. Several unsolved problems exist in improving the ionizing radiation hardnkss of MOS devices. This is one of the remaining areas where a concentrated research effort is required.
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